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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/SystemZ/int-add-10.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/SystemZ/int-add-10.ll')
-rw-r--r-- | test/CodeGen/SystemZ/int-add-10.ll | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/test/CodeGen/SystemZ/int-add-10.ll b/test/CodeGen/SystemZ/int-add-10.ll index 01d0a66..f55788d 100644 --- a/test/CodeGen/SystemZ/int-add-10.ll +++ b/test/CodeGen/SystemZ/int-add-10.ll @@ -9,7 +9,7 @@ define void @f1(i128 *%aptr, i32 %b) { ; CHECK: algfr {{%r[0-5]}}, %r3 ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 %bext = zext i32 %b to i128 %add = add i128 %xor, %bext @@ -23,7 +23,7 @@ define void @f2(i128 *%aptr, i64 %b) { ; CHECK: algfr {{%r[0-5]}}, %r3 ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 %trunc = trunc i64 %b to i32 %bext = zext i32 %trunc to i128 @@ -39,7 +39,7 @@ define void @f3(i128 *%aptr, i64 %b) { ; CHECK: algfr {{%r[0-5]}}, %r3 ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 %bext = zext i64 %b to i128 %and = and i128 %bext, 4294967295 @@ -54,9 +54,9 @@ define void @f4(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, 0(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %b = load i32 *%bsrc + %b = load i32 , i32 *%bsrc %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -69,10 +69,10 @@ define void @f5(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, 524284(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %ptr = getelementptr i32 *%bsrc, i64 131071 - %b = load i32 *%ptr + %ptr = getelementptr i32, i32 *%bsrc, i64 131071 + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -87,10 +87,10 @@ define void @f6(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, 0(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %ptr = getelementptr i32 *%bsrc, i64 131072 - %b = load i32 *%ptr + %ptr = getelementptr i32, i32 *%bsrc, i64 131072 + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -103,10 +103,10 @@ define void @f7(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, -4(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %ptr = getelementptr i32 *%bsrc, i128 -1 - %b = load i32 *%ptr + %ptr = getelementptr i32, i32 *%bsrc, i128 -1 + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -119,10 +119,10 @@ define void @f8(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, -524288(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %ptr = getelementptr i32 *%bsrc, i128 -131072 - %b = load i32 *%ptr + %ptr = getelementptr i32, i32 *%bsrc, i128 -131072 + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -137,10 +137,10 @@ define void @f9(i128 *%aptr, i32 *%bsrc) { ; CHECK: algf {{%r[0-5]}}, 0(%r3) ; CHECK: alcg ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 - %ptr = getelementptr i32 *%bsrc, i128 -131073 - %b = load i32 *%ptr + %ptr = getelementptr i32, i32 *%bsrc, i128 -131073 + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr @@ -152,12 +152,12 @@ define void @f10(i128 *%aptr, i64 %src, i64 %index) { ; CHECK-LABEL: f10: ; CHECK: algf {{%r[0-5]}}, 524284({{%r4,%r3|%r3,%r4}}) ; CHECK: br %r14 - %a = load i128 *%aptr + %a = load i128 , i128 *%aptr %xor = xor i128 %a, 127 %add1 = add i64 %src, %index %add2 = add i64 %add1, 524284 %ptr = inttoptr i64 %add2 to i32 * - %b = load i32 *%ptr + %b = load i32 , i32 *%ptr %bext = zext i32 %b to i128 %add = add i128 %xor, %bext store i128 %add, i128 *%aptr |