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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-08 08:55:49 -0700 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-09 15:04:38 -0700 |
| commit | 4c5e43da7792f75567b693105cc53e3f1992ad98 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/SystemZ/unaligned-01.ll | |
| parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
| download | external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.zip external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.gz external_llvm-4c5e43da7792f75567b693105cc53e3f1992ad98.tar.bz2 | |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
Diffstat (limited to 'test/CodeGen/SystemZ/unaligned-01.ll')
| -rw-r--r-- | test/CodeGen/SystemZ/unaligned-01.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/SystemZ/unaligned-01.ll b/test/CodeGen/SystemZ/unaligned-01.ll index 526a068..94cad0e 100644 --- a/test/CodeGen/SystemZ/unaligned-01.ll +++ b/test/CodeGen/SystemZ/unaligned-01.ll @@ -12,9 +12,9 @@ define void @f1(i8 *%ptr) { ; CHECK: iilf [[REG:%r[0-5]]], 66051 ; CHECK: st [[REG]], 0(%r2) ; CHECK: br %r14 - %off1 = getelementptr i8 *%ptr, i64 1 - %off2 = getelementptr i8 *%ptr, i64 2 - %off3 = getelementptr i8 *%ptr, i64 3 + %off1 = getelementptr i8, i8 *%ptr, i64 1 + %off2 = getelementptr i8, i8 *%ptr, i64 2 + %off3 = getelementptr i8, i8 *%ptr, i64 3 store i8 0, i8 *%ptr store i8 1, i8 *%off1 store i8 2, i8 *%off2 @@ -28,7 +28,7 @@ define i16 @f2(i16 *%src, i16 *%dst) { ; CHECK: lh %r2, 0(%r2) ; CHECK: sth %r2, 0(%r3) ; CHECK: br %r14 - %val = load i16 *%src, align 1 + %val = load i16 , i16 *%src, align 1 store i16 %val, i16 *%dst, align 1 ret i16 %val } @@ -40,8 +40,8 @@ define i32 @f3(i32 *%src1, i32 *%src2, i32 *%dst) { ; CHECK: s %r2, 0(%r3) ; CHECK: st %r2, 0(%r4) ; CHECK: br %r14 - %val1 = load i32 *%src1, align 1 - %val2 = load i32 *%src2, align 2 + %val1 = load i32 , i32 *%src1, align 1 + %val2 = load i32 , i32 *%src2, align 2 %sub = sub i32 %val1, %val2 store i32 %sub, i32 *%dst, align 1 ret i32 %sub @@ -54,8 +54,8 @@ define i64 @f4(i64 *%src1, i64 *%src2, i64 *%dst) { ; CHECK: sg %r2, 0(%r3) ; CHECK: stg %r2, 0(%r4) ; CHECK: br %r14 - %val1 = load i64 *%src1, align 1 - %val2 = load i64 *%src2, align 2 + %val1 = load i64 , i64 *%src1, align 1 + %val2 = load i64 , i64 *%src2, align 2 %sub = sub i64 %val1, %val2 store i64 %sub, i64 *%dst, align 4 ret i64 %sub |