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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:56:23 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:56:23 +0000 |
| commit | 185ef05ad6fdcaad1e831020b1f88d0046dd15d6 (patch) | |
| tree | 08ebf3788fe3c4a93e07dbc8102b136e5cc9dff4 /test/CodeGen/SystemZ | |
| parent | ad366a3f67679a56d25464dc2bcad3a0a6a51780 (diff) | |
| download | external_llvm-185ef05ad6fdcaad1e831020b1f88d0046dd15d6.zip external_llvm-185ef05ad6fdcaad1e831020b1f88d0046dd15d6.tar.gz external_llvm-185ef05ad6fdcaad1e831020b1f88d0046dd15d6.tar.bz2 | |
[SystemZ] Add comparisons of large immediates using high words
There are no corresponding patterns for small immediates because they would
prevent the use of fused compare-and-branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191775 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ')
| -rw-r--r-- | test/CodeGen/SystemZ/asm-18.ll | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/asm-18.ll b/test/CodeGen/SystemZ/asm-18.ll index e16bf65..d39de6d 100644 --- a/test/CodeGen/SystemZ/asm-18.ll +++ b/test/CodeGen/SystemZ/asm-18.ll @@ -669,3 +669,37 @@ define void @f30() { call void asm sideeffect "stepd $0", "r"(i32 %add3) ret void } + +; Test large immediate comparison involving high registers. +define i32 @f31() { +; CHECK-LABEL: f31: +; CHECK: stepa [[REG1:%r[0-5]]] +; CHECK: cih [[REG1]], 1000000000 +; CHECK: stepb [[REG2:%r[0-5]]] +; CHECK: clih [[REG2]], 1000000000 +; CHECK: br %r14 + %res1 = call i32 asm "stepa $0", "=h"() + %cmp1 = icmp sle i32 %res1, 1000000000 + %sel1 = select i1 %cmp1, i32 0, i32 1 + %res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1) + %cmp2 = icmp ule i32 %res2, 1000000000 + %sel2 = select i1 %cmp2, i32 0, i32 1 + ret i32 %sel2 +} + +; Test large immediate comparison involving low registers. +define i32 @f32() { +; CHECK-LABEL: f32: +; CHECK: stepa [[REG1:%r[0-5]]] +; CHECK: cfi [[REG1]], 1000000000 +; CHECK: stepb [[REG2:%r[0-5]]] +; CHECK: clfi [[REG2]], 1000000000 +; CHECK: br %r14 + %res1 = call i32 asm "stepa $0", "=r"() + %cmp1 = icmp sle i32 %res1, 1000000000 + %sel1 = select i1 %cmp1, i32 0, i32 1 + %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1) + %cmp2 = icmp ule i32 %res2, 1000000000 + %sel2 = select i1 %cmp2, i32 0, i32 1 + ret i32 %sel2 +} |