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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-16 10:22:54 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-16 10:22:54 +0000 |
commit | 6c51f89498dd813c8dd16e46069decf2897b31b2 (patch) | |
tree | c696124346ab4fd26b3a88896a16fcc41f5c0e85 /test/CodeGen/SystemZ | |
parent | 6f297afb7ea6ab53be1feae4a335e7b1cb7a1f02 (diff) | |
download | external_llvm-6c51f89498dd813c8dd16e46069decf2897b31b2.zip external_llvm-6c51f89498dd813c8dd16e46069decf2897b31b2.tar.gz external_llvm-6c51f89498dd813c8dd16e46069decf2897b31b2.tar.bz2 |
[SystemZ] Fix sign of integer memcmp result
r188163 used CLC to implement memcmp. Code that compares the result
directly against zero can test the CC value produced by CLC, but code
that needs an integer result must use IPM. The sequence I'd used was:
ipm <reg>
sll <reg>, 2
sra <reg>, 30
but I'd forgotten that this inverts the order, so that CC==1 ("less")
becomes an integer greater than zero, and CC==2 ("greater") becomes
an integer less than zero. This sequence should only be used if the
CLC arguments are reversed to compensate. The problem then is that
the branch condition must also be reversed when testing the CLC
result directly.
Rather than do that, I went for a different sequence that works with
the natural CLC order:
ipm <reg>
srl <reg>, 28
rll <reg>, <reg>, 31
One advantage of this is that it doesn't clobber CC. A disadvantage
is that any sign extension to 64 bits must be done separately,
rather than being folded into the shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188538 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ')
-rw-r--r-- | test/CodeGen/SystemZ/memcmp-01.ll | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/test/CodeGen/SystemZ/memcmp-01.ll b/test/CodeGen/SystemZ/memcmp-01.ll index 3747769..4d8cd14 100644 --- a/test/CodeGen/SystemZ/memcmp-01.ll +++ b/test/CodeGen/SystemZ/memcmp-01.ll @@ -17,9 +17,9 @@ define i32 @f1(i8 *%src1, i8 *%src2) { define i32 @f2(i8 *%src1, i8 *%src2) { ; CHECK-LABEL: f2: ; CHECK: clc 0(2,%r2), 0(%r3) -; CHECK: ipm %r2 -; CHECK: sll %r2, 2 -; CHECK: sra %r2, 30 +; CHECK: ipm [[REG:%r[0-5]]] +; CHECK: srl [[REG]], 28 +; CHECK: rll %r2, [[REG]], 31 ; CHECK: br %r14 %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 2) ret i32 %res @@ -101,14 +101,13 @@ exit: } ; Check the upper end of the CLC range. Here the result is used both as -; an integer and for branching, but it's better to branch on the result -; of the SRA. +; an integer and for branching. define i32 @f7(i8 *%src1, i8 *%src2, i32 *%dest) { ; CHECK-LABEL: f7: ; CHECK: clc 0(256,%r2), 0(%r3) -; CHECK: ipm %r2 -; CHECK: sll %r2, 2 -; CHECK: sra %r2, 30 +; CHECK: ipm [[REG:%r[0-5]]] +; CHECK: srl [[REG]], 28 +; CHECK: rll %r2, [[REG]], 31 ; CHECK: jl {{.L*}} ; CHECK: br %r14 entry: |