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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-27 15:14:04 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-27 15:14:04 +0000 |
commit | 8dac19c0708c9bd0da0b832014918e00ded44d86 (patch) | |
tree | 008a633a794b968815a5e6d8112a4aa931e06cc3 /test/CodeGen/SystemZ | |
parent | 4d835f1cbe5d8c5f6cea4040bea9b180927a1c05 (diff) | |
download | external_llvm-8dac19c0708c9bd0da0b832014918e00ded44d86.zip external_llvm-8dac19c0708c9bd0da0b832014918e00ded44d86.tar.gz external_llvm-8dac19c0708c9bd0da0b832014918e00ded44d86.tar.bz2 |
[SystemZ] Improve handling of PC-relative addresses
The backend previously folded offsets into PC-relative addresses
whereever possible. That's the right thing to do when the address
can be used directly in a PC-relative memory reference (using things
like LRL). But if we have a register-based memory reference and need
to load the PC-relative address separately, it's better to use an anchor
point that could be shared with other accesses to the same area of the
variable.
Fixes a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191524 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ')
-rw-r--r-- | test/CodeGen/SystemZ/int-move-08.ll | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/int-move-08.ll b/test/CodeGen/SystemZ/int-move-08.ll index f16dd8e..56fcbc6 100644 --- a/test/CodeGen/SystemZ/int-move-08.ll +++ b/test/CodeGen/SystemZ/int-move-08.ll @@ -10,6 +10,8 @@ @gsrc32u = global i32 1, align 2, section "foo" @gdst16u = global i16 2, align 1, section "foo" @gdst32u = global i32 2, align 2, section "foo" +@garray8 = global [2 x i8] [i8 100, i8 101] +@garray16 = global [2 x i16] [i16 102, i16 103] ; Check sign-extending loads from i16. define i32 @f1() { @@ -97,3 +99,36 @@ define void @f8() { store i32 %val, i32 *@gdst32u, align 2 ret void } + +; Test a case where we want to use one LARL for accesses to two different +; parts of a variable. +define void @f9() { +; CHECK-LABEL: f9: +; CHECK: larl [[REG:%r[0-5]]], garray8 +; CHECK: llc [[VAL:%r[0-5]]], 0([[REG]]) +; CHECK: srl [[VAL]], 1 +; CHECK: stc [[VAL]], 1([[REG]]) +; CHECK: br %r14 + %ptr1 = getelementptr [2 x i8] *@garray8, i64 0, i64 0 + %ptr2 = getelementptr [2 x i8] *@garray8, i64 0, i64 1 + %val = load i8 *%ptr1 + %shr = lshr i8 %val, 1 + store i8 %shr, i8 *%ptr2 + ret void +} + +; Test a case where we want to use separate relative-long addresses for +; two different parts of a variable. +define void @f10() { +; CHECK-LABEL: f10: +; CHECK: llhrl [[VAL:%r[0-5]]], garray16 +; CHECK: srl [[VAL]], 1 +; CHECK: sthrl [[VAL]], garray16+2 +; CHECK: br %r14 + %ptr1 = getelementptr [2 x i16] *@garray16, i64 0, i64 0 + %ptr2 = getelementptr [2 x i16] *@garray16, i64 0, i64 1 + %val = load i16 *%ptr1 + %shr = lshr i16 %val, 1 + store i16 %shr, i16 *%ptr2 + ret void +} |