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author | Evan Cheng <evan.cheng@apple.com> | 2010-11-22 18:12:04 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-11-22 18:12:04 +0000 |
commit | ab5c703fdb0b07c6d89271519fd1cca7105b3eae (patch) | |
tree | 52b8ff64598ea781f1e347405867c74989a11920 /test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll | |
parent | 4d5a29979000e1d5afc6c31239fe12d888027f4c (diff) | |
download | external_llvm-ab5c703fdb0b07c6d89271519fd1cca7105b3eae.zip external_llvm-ab5c703fdb0b07c6d89271519fd1cca7105b3eae.tar.gz external_llvm-ab5c703fdb0b07c6d89271519fd1cca7105b3eae.tar.bz2 |
Fix epilogue codegen to avoid leaving the stack pointer in an invalid
state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll')
-rw-r--r-- | test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll index abcf13a..41f7f29 100644 --- a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll +++ b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll @@ -5,6 +5,10 @@ define internal fastcc i32 @Callee(i32 %i) nounwind { entry: ; CHECK: Callee: +; CHECK: push +; CHECK: mov r4, sp +; CHECK: sub.w r12, r4, #1000 +; CHECK: mov sp, r12 %0 = icmp eq i32 %i, 0 ; <i1> [#uses=1] br i1 %0, label %bb2, label %bb @@ -17,9 +21,11 @@ bb: ; preds = %entry ret i32 %4 bb2: ; preds = %entry -; Must restore sp from fp here -; CHECK: mov sp, r7 -; CHECK: sub sp, #8 +; Must restore sp from fp here. Make sure not to leave sp in a temporarily invalid +; state though. rdar://8465407 +; CHECK-NOT: mov sp, r7 +; CHECK: sub.w r4, r7, #8 +; CHECK: mov sp, r4 ; CHECK: pop ret i32 0 } |