diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2011-01-21 18:55:51 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-01-21 18:55:51 +0000 |
| commit | 53519f015e3e84e9f57b677cc8724805a6009b73 (patch) | |
| tree | 9dc5278d12bc25af77dc2cab022413ef2b034741 /test/CodeGen/Thumb2/machine-licm.ll | |
| parent | 859f8183639346378ed29d1e04a4b070ebc7e97f (diff) | |
| download | external_llvm-53519f015e3e84e9f57b677cc8724805a6009b73.zip external_llvm-53519f015e3e84e9f57b677cc8724805a6009b73.tar.gz external_llvm-53519f015e3e84e9f57b677cc8724805a6009b73.tar.bz2 | |
Last round of fixes for movw + movt global address codegen.
1. Fixed ARM pc adjustment.
2. Fixed dynamic-no-pic codegen
3. CSE of pc-relative load of global addresses.
It's now enabled by default for Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123991 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/machine-licm.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/machine-licm.ll | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index 37a15ff..5e776dd 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -3,9 +3,6 @@ ; rdar://7353541 ; rdar://7354376 -; The generated code is no where near ideal. It's not recognizing the two -; constantpool entries being loaded can be merged into one. - @GV = external global i32 ; <i32*> [#uses=2] define void @t1(i32* nocapture %vals, i32 %c) nounwind { @@ -17,21 +14,21 @@ entry: bb.nph: ; preds = %entry ; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 +; CHECK: movw r2, :lower16:L_GV$non_lazy_ptr +; CHECK: movt r2, :upper16:L_GV$non_lazy_ptr ; CHECK: ldr r2, [r2] ; CHECK: ldr r3, [r2] ; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: +; CHECK-NOT: LCPI0_0: ; PIC: BB#1 -; PIC: ldr.n r2, LCPI0_0 +; PIC: movw r2, :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) +; PIC: movt r2, :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r2, pc ; PIC: ldr r2, [r2] ; PIC: ldr r3, [r2] ; PIC: LBB0_2 -; PIC: LCPI0_0: -; PIC-NOT: LCPI0_1: +; PIC-NOT: LCPI0_0: ; PIC: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] br label %bb |