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| author | Edward O'Callaghan <eocallaghan@auroraux.org> | 2009-11-22 15:18:27 +0000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@auroraux.org> | 2009-11-22 15:18:27 +0000 |
| commit | f4a93dd70e5f43e54366e184cf8eea8b783a05f8 (patch) | |
| tree | e294607b95ffb3c8859fa565a76093fa74d1d040 /test/CodeGen/Thumb2/thumb2-rsb.ll | |
| parent | bfd987ba57cf962b6c67c102d6696c339191f233 (diff) | |
| download | external_llvm-f4a93dd70e5f43e54366e184cf8eea8b783a05f8.zip external_llvm-f4a93dd70e5f43e54366e184cf8eea8b783a05f8.tar.gz external_llvm-f4a93dd70e5f43e54366e184cf8eea8b783a05f8.tar.bz2 | |
Convert Thumb2 tests to FileCheck for PR5307.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89595 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/thumb2-rsb.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-rsb.ll | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/test/CodeGen/Thumb2/thumb2-rsb.ll b/test/CodeGen/Thumb2/thumb2-rsb.ll index 4611e94..15185be 100644 --- a/test/CodeGen/Thumb2/thumb2-rsb.ll +++ b/test/CodeGen/Thumb2/thumb2-rsb.ll @@ -1,30 +1,35 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s -define i32 @f2(i32 %a, i32 %b) { +define i32 @f1(i32 %a, i32 %b) { %tmp = shl i32 %b, 5 %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } +; CHECK: f1: +; CHECK: rsb r0, r0, r1, lsl #5 -define i32 @f3(i32 %a, i32 %b) { +define i32 @f2(i32 %a, i32 %b) { %tmp = lshr i32 %b, 6 %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } +; CHECK: f2: +; CHECK: rsb r0, r0, r1, lsr #6 -define i32 @f4(i32 %a, i32 %b) { +define i32 @f3(i32 %a, i32 %b) { %tmp = ashr i32 %b, 7 %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } +; CHECK: f3: +; CHECK: rsb r0, r0, r1, asr #7 -define i32 @f5(i32 %a, i32 %b) { +define i32 @f4(i32 %a, i32 %b) { %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 %tmp = or i32 %l8, %r8 %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } +; CHECK: f4: +; CHECK: rsb r0, r0, r0, ror #8 |