Remove arm_apcscc from the test files. It is the default and doing this

matches what llvm-gcc and clang now produce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8

13 files changed, 40 insertions, 40 deletions

diff --git a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
index 471a82f..9cdcd31 100644
--- a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
+++ b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp"
 ; PR4567
 
-define arm_apcscc i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
+define i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
 entry:
 	br i1 undef, label %bb, label %bb1
 
@@ -23,11 +23,11 @@ bb4:		; preds = %bb3, %bb2
 	br i1 undef, label %bb5, label %bb6
 
 bb5:		; preds = %bb4
-	%2 = call arm_apcscc  i8* @gets(i8* %s) nounwind		; <i8*> [#uses=1]
+	%2 = call  i8* @gets(i8* %s) nounwind		; <i8*> [#uses=1]
 	ret i8* %2
 
 bb6:		; preds = %bb4
 	unreachable
 }
 
-declare arm_apcscc i8* @gets(i8*) nounwind
+declare i8* @gets(i8*) nounwind
diff --git a/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll b/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll
index 6e035d0..d4651a1 100644
--- a/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll
+++ b/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll
@@ -2,7 +2,7 @@
 
 @Time.2535 = external global i64		; <i64*> [#uses=2]
 
-define arm_apcscc i64 @millisecs() nounwind {
+define i64 @millisecs() nounwind {
 entry:
 	%0 = load i64* @Time.2535, align 4		; <i64> [#uses=2]
 	%1 = add i64 %0, 1		; <i64> [#uses=1]
diff --git a/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll b/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
index f195348..aaca3a7 100644
--- a/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
+++ b/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
@@ -4,10 +4,10 @@
 	%struct.List = type { i32, i32* }
 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata"		; <[1 x i8*]*> [#uses=0]
 
-define arm_apcscc i32 @main() nounwind {
+define i32 @main() nounwind {
 entry:
 	%ll = alloca %struct.LinkList*, align 4		; <%struct.LinkList**> [#uses=1]
-	%0 = call arm_apcscc  i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind		; <i32> [#uses=1]
+	%0 = call  i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind		; <i32> [#uses=1]
 	switch i32 %0, label %bb5 [
 		i32 7, label %bb4
 		i32 42, label %bb3
@@ -23,4 +23,4 @@ bb5:		; preds = %entry
 	ret i32 1
 }
 
-declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
+declare i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
diff --git a/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll b/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll
index ef4b5ce..5b420fc 100644
--- a/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll
+++ b/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll
@@ -2,7 +2,7 @@
 
 	%struct.BF_KEY = type { [18 x i32], [1024 x i32] }
 
-define arm_apcscc void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
+define void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
 entry:
 	%0 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 0; <i32*> [#uses=2]
 	%1 = load i32* %data, align 4             ; <i32> [#uses=2]
diff --git a/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll b/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll
index b6e67b1..041306d 100644
--- a/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll
+++ b/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll
@@ -3,15 +3,15 @@
 	%struct.vorbis_comment = type { i8**, i32*, i32, i8* }
 @.str16 = external constant [2 x i8], align 1     ; <[2 x i8]*> [#uses=1]
 
-declare arm_apcscc i8* @__strcpy_chk(i8*, i8*, i32) nounwind
+declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind
 
-declare arm_apcscc i8* @__strcat_chk(i8*, i8*, i32) nounwind
+declare i8* @__strcat_chk(i8*, i8*, i32) nounwind
 
-define arm_apcscc i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
+define i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
 entry:
 	%0 = alloca i8, i32 undef, align 4        ; <i8*> [#uses=2]
-	%1 = call arm_apcscc  i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; <i8*> [#uses=0]
-	%2 = call arm_apcscc  i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; <i8*> [#uses=0]
+	%1 = call  i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; <i8*> [#uses=0]
+	%2 = call  i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; <i8*> [#uses=0]
 	%3 = getelementptr %struct.vorbis_comment* %vc, i32 0, i32 0; <i8***> [#uses=1]
 	br label %bb11
 
diff --git a/test/CodeGen/Thumb/2009-08-20-ISelBug.ll b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
index 72c9e62..39612c0 100644
--- a/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
+++ b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
@@ -9,7 +9,7 @@
 
 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.asl_file_t*, i64, i64*)* @t to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
 
-define arm_apcscc i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
+define i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
 ; CHECK: t:
 ; CHECK: adds r0, #8
 entry:
@@ -32,7 +32,7 @@ bb3:                                              ; preds = %bb1
   br i1 %8, label %bb13, label %bb5
 
 bb5:                                              ; preds = %bb3
-  %9 = call arm_apcscc  i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; <i32> [#uses=1]
+  %9 = call  i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; <i32> [#uses=1]
   %10 = icmp eq i32 %9, 0                         ; <i1> [#uses=1]
   br i1 %10, label %bb7, label %bb13
 
@@ -40,7 +40,7 @@ bb7:                                              ; preds = %bb5
   store i64 0, i64* %val, align 4
   %11 = load %struct.FILE** %1, align 4           ; <%struct.FILE*> [#uses=1]
   %val8 = bitcast i64* %val to i8*                ; <i8*> [#uses=1]
-  %12 = call arm_apcscc  i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32> [#uses=1]
+  %12 = call  i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32> [#uses=1]
   %13 = icmp eq i32 %12, 1                        ; <i1> [#uses=1]
   br i1 %13, label %bb10, label %bb13
 
@@ -50,7 +50,7 @@ bb10:                                             ; preds = %bb7
 
 bb11:                                             ; preds = %bb10
   %15 = load i64* %val, align 4                   ; <i64> [#uses=1]
-  %16 = call arm_apcscc  i64 @asl_core_ntohq(i64 %15) nounwind ; <i64> [#uses=1]
+  %16 = call  i64 @asl_core_ntohq(i64 %15) nounwind ; <i64> [#uses=1]
   store i64 %16, i64* %out, align 4
   ret i32 0
 
@@ -59,8 +59,8 @@ bb13:                                             ; preds = %bb10, %bb7, %bb5, %
   ret i32 %.0
 }
 
-declare arm_apcscc i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
+declare i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
 
-declare arm_apcscc i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
+declare i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
 
-declare arm_apcscc i64 @asl_core_ntohq(i64)
+declare i64 @asl_core_ntohq(i64)
diff --git a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll
index 2a5d9d6..132d9ac 100644
--- a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll
+++ b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll
@@ -10,7 +10,7 @@ target triple = "thumbv7-apple-darwin10"
 @codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
 
-define arm_apcscc i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
+define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
 entry:
   %0 = load i8* %opcodes, align 1                 ; <i8> [#uses=1]
   %1 = zext i8 %0 to i32                          ; <i32> [#uses=1]
diff --git a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
index db57525..fad2669 100644
--- a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
+++ b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
@@ -4,10 +4,10 @@ target triple = "thumbv6-apple-darwin10"
 
 @fred = internal global i32 0              ; <i32*> [#uses=1]
 
-define arm_apcscc void @foo() nounwind {
+define void @foo() nounwind {
 entry:
 ; CHECK: str r0, [sp
-  %0 = call arm_apcscc  i32 (...)* @bar() nounwind ; <i32> [#uses=1]
+  %0 = call  i32 (...)* @bar() nounwind ; <i32> [#uses=1]
 ; CHECK: blx _bar
 ; CHECK: ldr r1, [sp
   store i32 %0, i32* @fred, align 4
@@ -17,4 +17,4 @@ return:                                           ; preds = %entry
   ret void
 }
 
-declare arm_apcscc i32 @bar(...)
+declare i32 @bar(...)
diff --git a/test/CodeGen/Thumb/asmprinter-bug.ll b/test/CodeGen/Thumb/asmprinter-bug.ll
index 1e3c070..f73f93d 100644
--- a/test/CodeGen/Thumb/asmprinter-bug.ll
+++ b/test/CodeGen/Thumb/asmprinter-bug.ll
@@ -13,7 +13,7 @@
 @__stderrp = external global %struct.FILE*		; <%struct.FILE**> [#uses=1]
 @.str1 = private constant [28 x i8] c"Final valprev=%d, index=%d\0A\00", section "__TEXT,__cstring,cstring_literals", align 1		; <[28 x i8]*> [#uses=1]
 
-define arm_apcscc void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+define void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
 entry:
 	%0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0		; <i16*> [#uses=2]
 	%1 = load i16* %0, align 2		; <i16> [#uses=1]
@@ -138,7 +138,7 @@ bb29:		; preds = %bb28, %bb27
 	ret void
 }
 
-define arm_apcscc void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+define void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
 entry:
 	%0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0		; <i16*> [#uses=2]
 	%1 = load i16* %0, align 2		; <i16> [#uses=1]
@@ -245,17 +245,17 @@ bb22:		; preds = %bb20, %entry
 	ret void
 }
 
-define arm_apcscc i32 @main() nounwind {
+define i32 @main() nounwind {
 entry:
 	br label %bb
 
 bb:		; preds = %bb3, %entry
-	%0 = tail call arm_apcscc  i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind		; <i32> [#uses=4]
+	%0 = tail call  i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind		; <i32> [#uses=4]
 	%1 = icmp slt i32 %0, 0		; <i1> [#uses=1]
 	br i1 %1, label %bb1, label %bb2
 
 bb1:		; preds = %bb
-	tail call arm_apcscc  void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
+	tail call  void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
 	ret i32 1
 
 bb2:		; preds = %bb
@@ -264,9 +264,9 @@ bb2:		; preds = %bb
 
 bb3:		; preds = %bb2
 	%3 = shl i32 %0, 1		; <i32> [#uses=1]
-	tail call arm_apcscc  void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
+	tail call  void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
 	%4 = shl i32 %0, 2		; <i32> [#uses=1]
-	%5 = tail call arm_apcscc  i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind		; <i32> [#uses=0]
+	%5 = tail call  i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind		; <i32> [#uses=0]
 	br label %bb
 
 bb4:		; preds = %bb2
@@ -275,14 +275,14 @@ bb4:		; preds = %bb2
 	%8 = sext i16 %7 to i32		; <i32> [#uses=1]
 	%9 = load i8* getelementptr (%struct.adpcm_state* @state, i32 0, i32 1), align 2		; <i8> [#uses=1]
 	%10 = sext i8 %9 to i32		; <i32> [#uses=1]
-	%11 = tail call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind		; <i32> [#uses=0]
+	%11 = tail call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind		; <i32> [#uses=0]
 	ret i32 0
 }
 
-declare arm_apcscc i32 @read(...)
+declare i32 @read(...)
 
-declare arm_apcscc void @perror(i8* nocapture) nounwind
+declare void @perror(i8* nocapture) nounwind
 
-declare arm_apcscc i32 @write(...)
+declare i32 @write(...)
 
-declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
+declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb/machine-licm.ll b/test/CodeGen/Thumb/machine-licm.ll
index a69a64f..a87e82c 100644
--- a/test/CodeGen/Thumb/machine-licm.ll
+++ b/test/CodeGen/Thumb/machine-licm.ll
@@ -7,7 +7,7 @@
 
 @GV = external global i32                         ; <i32*> [#uses=2]
 
-define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
+define void @t(i32* nocapture %vals, i32 %c) nounwind {
 entry:
 ; CHECK: t:
   %0 = icmp eq i32 %c, 0                          ; <i1> [#uses=1]
diff --git a/test/CodeGen/Thumb/pop.ll b/test/CodeGen/Thumb/pop.ll
index 0e1b2e5..63f2feb 100644
--- a/test/CodeGen/Thumb/pop.ll
+++ b/test/CodeGen/Thumb/pop.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
 ; rdar://7268481
 
-define arm_apcscc void @t(i8* %a, ...) nounwind {
+define void @t(i8* %a, ...) nounwind {
 ; CHECK:      t:
 ; CHECK:      pop {r3}
 ; CHECK-NEXT: add sp, #12
diff --git a/test/CodeGen/Thumb/push.ll b/test/CodeGen/Thumb/push.ll
index 63773c4..37878d7 100644
--- a/test/CodeGen/Thumb/push.ll
+++ b/test/CodeGen/Thumb/push.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-fp-elim | FileCheck %s
 ; rdar://7268481
 
-define arm_apcscc void @t() nounwind {
+define void @t() nounwind {
 ; CHECK:       t:
 ; CHECK-NEXT : push {r7}
 entry:
diff --git a/test/CodeGen/Thumb/trap.ll b/test/CodeGen/Thumb/trap.ll
index 76a0589..04cd3ee 100644
--- a/test/CodeGen/Thumb/trap.ll
+++ b/test/CodeGen/Thumb/trap.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -march=thumb | FileCheck %s
 ; rdar://7961298
 
-define arm_apcscc void @t() nounwind {
+define void @t() nounwind {
 entry:
 ; CHECK: t:
 ; CHECK: trap