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author | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
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committer | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
commit | e264f62ca09a8f65c87a46d562a4d0f9ec5d457e (patch) | |
tree | 59e3d57ef656cef79afa708ae0a3daf25cd91fcf /test/CodeGen/X86/2006-05-17-VectorArg.ll | |
download | external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.zip external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.gz external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.bz2 |
Check in LLVM r95781.
Diffstat (limited to 'test/CodeGen/X86/2006-05-17-VectorArg.ll')
-rw-r--r-- | test/CodeGen/X86/2006-05-17-VectorArg.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2006-05-17-VectorArg.ll b/test/CodeGen/X86/2006-05-17-VectorArg.ll new file mode 100644 index 0000000..b36d61e --- /dev/null +++ b/test/CodeGen/X86/2006-05-17-VectorArg.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 + +define <4 x float> @opRSQ(<4 x float> %a) nounwind { +entry: + %tmp2 = extractelement <4 x float> %a, i32 3 ; <float> [#uses=2] + %abscond = fcmp oge float %tmp2, -0.000000e+00 ; <i1> [#uses=1] + %abs = select i1 %abscond, float %tmp2, float 0.000000e+00 ; <float> [#uses=1] + %tmp3 = tail call float @llvm.sqrt.f32( float %abs ) ; <float> [#uses=1] + %tmp4 = fdiv float 1.000000e+00, %tmp3 ; <float> [#uses=1] + %tmp11 = insertelement <4 x float> zeroinitializer, float %tmp4, i32 3 ; <<4 x float>> [#uses=1] + ret <4 x float> %tmp11 +} + +declare float @llvm.sqrt.f32(float) + |