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authorBill Wendling <isanbard@gmail.com>2007-07-04 00:19:54 +0000
committerBill Wendling <isanbard@gmail.com>2007-07-04 00:19:54 +0000
commit93888428d422f3d007012a4ca8a52fb20b219a50 (patch)
treebe21f603b6ba91670a98a0da14b6fe2875310309 /test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
parent5653322e729fd2016556fd1d5e54cde20d3012d8 (diff)
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Allow a GR64 to be moved into an MMX register via the "movd" instruction.
Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2007-07-03-GR64ToVR64.ll')
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1 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
new file mode 100644
index 0000000..b2b1a94
--- /dev/null
+++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} &&
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} &&
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1}
+
+@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
+
+define void @foo(<1 x i64> %A, <1 x i64> %B) {
+entry:
+ %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1]
+ %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp8, <1 x i64>* @R
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
+
+declare void @llvm.x86.mmx.emms()