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authorEvan Cheng <evan.cheng@apple.com>2008-09-04 22:59:58 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-04 22:59:58 +0000
commit4a03775777785ef758cff8c0699a6bf571a1f2b9 (patch)
treea3e8d527e079840bf5627f2e68f73f901728eb1e /test/CodeGen/X86/2008-02-22-ReMatBug.ll
parentdeafefabae915cf20884fd829d2542f9626786e8 (diff)
downloadexternal_llvm-4a03775777785ef758cff8c0699a6bf571a1f2b9.zip
external_llvm-4a03775777785ef758cff8c0699a6bf571a1f2b9.tar.gz
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For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55807 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2008-02-22-ReMatBug.ll')
-rw-r--r--test/CodeGen/X86/2008-02-22-ReMatBug.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/X86/2008-02-22-ReMatBug.ll b/test/CodeGen/X86/2008-02-22-ReMatBug.ll
index fd97b61..f78d526 100644
--- a/test/CodeGen/X86/2008-02-22-ReMatBug.ll
+++ b/test/CodeGen/X86/2008-02-22-ReMatBug.ll
@@ -4,7 +4,7 @@
%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
-define fastcc %struct.quad_struct* @MakeTree(i32 %size, i32 %center_x, i32 %center_y, i32 %lo_proc, i32 %hi_proc, %struct.quad_struct* %parent, i32 %ct, i32 %level) nounwind {
+define %struct.quad_struct* @MakeTree(i32 %size, i32 %center_x, i32 %center_y, i32 %lo_proc, i32 %hi_proc, %struct.quad_struct* %parent, i32 %ct, i32 %level) nounwind {
entry:
br i1 true, label %bb43.i, label %bb.i
@@ -39,12 +39,12 @@ bb34: ; preds = %CheckOutside.exit20.i
%tmp15.reg2mem.0 = sdiv i32 %size, 2 ; <i32> [#uses=7]
%tmp85 = sub i32 %center_y, %tmp15.reg2mem.0 ; <i32> [#uses=2]
%tmp88 = sub i32 %center_x, %tmp15.reg2mem.0 ; <i32> [#uses=2]
- %tmp92 = tail call fastcc %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp85, i32 0, i32 %hi_proc, %struct.quad_struct* null, i32 2, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp92 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp85, i32 0, i32 %hi_proc, %struct.quad_struct* null, i32 2, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
%tmp99 = add i32 0, %hi_proc ; <i32> [#uses=1]
%tmp100 = sdiv i32 %tmp99, 2 ; <i32> [#uses=1]
- %tmp110 = tail call fastcc %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp85, i32 0, i32 %tmp100, %struct.quad_struct* null, i32 3, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp110 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp85, i32 0, i32 %tmp100, %struct.quad_struct* null, i32 3, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
%tmp122 = add i32 %tmp15.reg2mem.0, %center_y ; <i32> [#uses=2]
- %tmp129 = tail call fastcc %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp122, i32 0, i32 0, %struct.quad_struct* null, i32 1, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
- %tmp147 = tail call fastcc %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp122, i32 %lo_proc, i32 0, %struct.quad_struct* null, i32 0, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp129 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp122, i32 0, i32 0, %struct.quad_struct* null, i32 1, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp147 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp122, i32 %lo_proc, i32 0, %struct.quad_struct* null, i32 0, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
unreachable
}