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| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
| tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/X86/2008-02-27-PEICrash.ll | |
| parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
| download | external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.zip external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.gz external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.bz2 | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2008-02-27-PEICrash.ll')
| -rw-r--r-- | test/CodeGen/X86/2008-02-27-PEICrash.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/X86/2008-02-27-PEICrash.ll b/test/CodeGen/X86/2008-02-27-PEICrash.ll index b644d8f..055eabb 100644 --- a/test/CodeGen/X86/2008-02-27-PEICrash.ll +++ b/test/CodeGen/X86/2008-02-27-PEICrash.ll @@ -13,21 +13,21 @@ bb56: ; preds = %bb33, %entry %a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; <float> [#uses=1] %tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1] %tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; <float> [#uses=1] - %tmp44.pn = mul float %tmp36.pn, %b.pn509 ; <float> [#uses=1] - %tmp46.pn = add float %tmp44.pn, %a.pn ; <float> [#uses=1] - %tmp53.pn = sub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1] + %tmp44.pn = fmul float %tmp36.pn, %b.pn509 ; <float> [#uses=1] + %tmp46.pn = fadd float %tmp44.pn, %a.pn ; <float> [#uses=1] + %tmp53.pn = fsub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1] %x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; <float> [#uses=1] %y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; <float> [#uses=1] br i1 false, label %bb433, label %bb98 bb98: ; preds = %bb56 - %tmp102 = mul float 0.000000e+00, %a ; <float> [#uses=1] - %tmp106 = mul float 0.000000e+00, %b ; <float> [#uses=1] + %tmp102 = fmul float 0.000000e+00, %a ; <float> [#uses=1] + %tmp106 = fmul float 0.000000e+00, %b ; <float> [#uses=1] br label %bb433 bb433: ; preds = %bb98, %bb56 %x.1 = phi float [ %tmp102, %bb98 ], [ %x.0, %bb56 ] ; <float> [#uses=0] %y.1 = phi float [ %tmp106, %bb98 ], [ %y.0, %bb56 ] ; <float> [#uses=1] - %tmp460 = add float %y.1, 0.000000e+00 ; <float> [#uses=0] + %tmp460 = fadd float %y.1, 0.000000e+00 ; <float> [#uses=0] ret i64 0 } |