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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/2010-02-04-SchedulerBug.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/X86/2010-02-04-SchedulerBug.ll')
-rw-r--r-- | test/CodeGen/X86/2010-02-04-SchedulerBug.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/X86/2010-02-04-SchedulerBug.ll b/test/CodeGen/X86/2010-02-04-SchedulerBug.ll index c966e21d..51686ea 100644 --- a/test/CodeGen/X86/2010-02-04-SchedulerBug.ll +++ b/test/CodeGen/X86/2010-02-04-SchedulerBug.ll @@ -6,13 +6,13 @@ define void @t(i32 %cNum, i64 %max) nounwind optsize ssp noimplicitfloat { entry: - %0 = load %struct.b_t** null, align 4 ; <%struct.b_t*> [#uses=1] - %1 = getelementptr inbounds %struct.b_t* %0, i32 %cNum, i32 5 ; <i64*> [#uses=1] - %2 = load i64* %1, align 4 ; <i64> [#uses=1] + %0 = load %struct.b_t*, %struct.b_t** null, align 4 ; <%struct.b_t*> [#uses=1] + %1 = getelementptr inbounds %struct.b_t, %struct.b_t* %0, i32 %cNum, i32 5 ; <i64*> [#uses=1] + %2 = load i64, i64* %1, align 4 ; <i64> [#uses=1] %3 = icmp ult i64 %2, %max ; <i1> [#uses=1] - %4 = getelementptr inbounds %struct.a_t* null, i32 0, i32 7 ; <i64**> [#uses=1] - %5 = load i64** %4, align 4 ; <i64*> [#uses=0] - %6 = load i64* null, align 4 ; <i64> [#uses=1] + %4 = getelementptr inbounds %struct.a_t, %struct.a_t* null, i32 0, i32 7 ; <i64**> [#uses=1] + %5 = load i64*, i64** %4, align 4 ; <i64*> [#uses=0] + %6 = load i64, i64* null, align 4 ; <i64> [#uses=1] br i1 %3, label %bb2, label %bb bb: ; preds = %entry |