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authorAndrew Trick <atrick@apple.com>2010-10-11 19:02:04 +0000
committerAndrew Trick <atrick@apple.com>2010-10-11 19:02:04 +0000
commit1a2cf3b4d9c6cac6123417aaa4aae3a9e4f7bb48 (patch)
treea8b609f6ffbd97aa513ff99a560e404cfc4f291e /test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
parent62547267f088a060d7c1084a40d740645efe86d1 (diff)
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Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116214 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2010-10-08-cmpxchg8b.ll')
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diff --git a/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
new file mode 100644
index 0000000..0fd4a34
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+++ b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin | FileCheck %s
+; bug 8297
+;
+; On i386, i64 cmpxchg is lowered during legalize types to extract the
+; 64-bit result into a pair of fixed regs. So creation of the DAG node
+; happens in a different place. See
+; X86TargetLowering::ReplaceNodeResults, case ATOMIC_CMP_SWAP.
+;
+; Neither Atomic-xx.ll nor atomic_op.ll cover this. Those tests were
+; autogenerated from C source before 64-bit variants were supported.
+;
+; Note that this case requires a loop around the cmpxchg to force
+; machine licm to query alias anlysis, exposing a bad
+; MachineMemOperand.
+define void @foo(i64* %ptr) nounwind inlinehint {
+entry:
+ br label %loop
+loop:
+; CHECK: lock
+; CHECK-NEXT: cmpxchg8b
+ %r = call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* %ptr, i64 0, i64 1)
+ %stored1 = icmp eq i64 %r, 0
+ br i1 %stored1, label %loop, label %continue
+continue:
+ ret void
+}
+
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* nocapture, i64, i64) nounwind