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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2011-05-27 22:15:01 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2011-05-27 22:15:01 +0000 |
| commit | 37afca128db40b086752f3f62464ba08128c3b4d (patch) | |
| tree | cecef5af30bfed8e0ff78f2c6d46e6888072928f /test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll | |
| parent | 5b23b7fe3150b2050d6fcd6981d64f30930fd3ef (diff) | |
| download | external_llvm-37afca128db40b086752f3f62464ba08128c3b4d.zip external_llvm-37afca128db40b086752f3f62464ba08128c3b4d.tar.gz external_llvm-37afca128db40b086752f3f62464ba08128c3b4d.tar.bz2 | |
Fix a regression I recently introduced by removing DwarfRegNum of
subregisters:
When a value is in a subregister, at least report the location as being
the superregister. We should extend the .td files to encode the bit
range so that we can produce a DW_OP_bit_piece.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132224 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll')
0 files changed, 0 insertions, 0 deletions