diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-12-11 06:02:21 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2009-12-11 06:02:21 +0000 |
commit | 50d070561e5bc662518ae2348d4536aa557b9d1c (patch) | |
tree | 9b9e6376e6ca547f8cc107a28d1e51a88ac2e6a2 /test/CodeGen/X86/3addr-16bit.ll | |
parent | 656e51454ac70f5d500565fd33c883f6dea549f2 (diff) | |
download | external_llvm-50d070561e5bc662518ae2348d4536aa557b9d1c.zip external_llvm-50d070561e5bc662518ae2348d4536aa557b9d1c.tar.gz external_llvm-50d070561e5bc662518ae2348d4536aa557b9d1c.tar.bz2 |
Tests for 91103 and 91104.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91105 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/3addr-16bit.ll')
-rw-r--r-- | test/CodeGen/X86/3addr-16bit.ll | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/test/CodeGen/X86/3addr-16bit.ll b/test/CodeGen/X86/3addr-16bit.ll new file mode 100644 index 0000000..bf1e0ea --- /dev/null +++ b/test/CodeGen/X86/3addr-16bit.ll @@ -0,0 +1,93 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=32BIT +; RUN: llc < %s -mtriple=x86_64-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=64BIT + +define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp { +entry: +; 32BIT: t1: +; 32BIT: movw 20(%esp), %ax +; 32BIT-NOT: movw %ax, %cx +; 32BIT: leal 1(%eax), %ecx + +; 64BIT: t1: +; 64BIT-NOT: movw %si, %ax +; 64BIT: leal 1(%rsi), %eax + %0 = icmp eq i16 %k, %c ; <i1> [#uses=1] + %1 = add i16 %k, 1 ; <i16> [#uses=3] + br i1 %0, label %bb, label %bb1 + +bb: ; preds = %entry + tail call void @foo(i16 zeroext %1) nounwind + ret i16 %1 + +bb1: ; preds = %entry + ret i16 %1 +} + +define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp { +entry: +; 32BIT: t2: +; 32BIT: movw 20(%esp), %ax +; 32BIT-NOT: movw %ax, %cx +; 32BIT: leal -1(%eax), %ecx + +; 64BIT: t2: +; 64BIT-NOT: movw %si, %ax +; 64BIT: leal -1(%rsi), %eax + %0 = icmp eq i16 %k, %c ; <i1> [#uses=1] + %1 = add i16 %k, -1 ; <i16> [#uses=3] + br i1 %0, label %bb, label %bb1 + +bb: ; preds = %entry + tail call void @foo(i16 zeroext %1) nounwind + ret i16 %1 + +bb1: ; preds = %entry + ret i16 %1 +} + +declare void @foo(i16 zeroext) + +define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp { +entry: +; 32BIT: t3: +; 32BIT: movw 20(%esp), %ax +; 32BIT-NOT: movw %ax, %cx +; 32BIT: leal 2(%eax), %ecx + +; 64BIT: t3: +; 64BIT-NOT: movw %si, %ax +; 64BIT: leal 2(%rsi), %eax + %0 = add i16 %k, 2 ; <i16> [#uses=3] + %1 = icmp eq i16 %k, %c ; <i1> [#uses=1] + br i1 %1, label %bb, label %bb1 + +bb: ; preds = %entry + tail call void @foo(i16 zeroext %0) nounwind + ret i16 %0 + +bb1: ; preds = %entry + ret i16 %0 +} + +define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp { +entry: +; 32BIT: t4: +; 32BIT: movw 16(%esp), %ax +; 32BIT: movw 20(%esp), %cx +; 32BIT-NOT: movw %cx, %dx +; 32BIT: leal (%ecx,%eax), %edx + +; 64BIT: t4: +; 64BIT-NOT: movw %si, %ax +; 64BIT: leal (%rsi,%rdi), %eax + %0 = add i16 %k, %c ; <i16> [#uses=3] + %1 = icmp eq i16 %k, %c ; <i1> [#uses=1] + br i1 %1, label %bb, label %bb1 + +bb: ; preds = %entry + tail call void @foo(i16 zeroext %0) nounwind + ret i16 %0 + +bb1: ; preds = %entry + ret i16 %0 +} |