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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/SwizzleShuff.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/X86/SwizzleShuff.ll')
| -rw-r--r-- | test/CodeGen/X86/SwizzleShuff.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/X86/SwizzleShuff.ll b/test/CodeGen/X86/SwizzleShuff.ll index d387850..e4c35c5 100644 --- a/test/CodeGen/X86/SwizzleShuff.ll +++ b/test/CodeGen/X86/SwizzleShuff.ll @@ -6,8 +6,8 @@ ; CHECK: xorl ; CHECK: ret define void @pull_bitcast (<4 x i8>* %pA, <4 x i8>* %pB) { - %A = load <4 x i8>* %pA - %B = load <4 x i8>* %pB + %A = load <4 x i8>, <4 x i8>* %pA + %B = load <4 x i8>, <4 x i8>* %pB %C = xor <4 x i8> %A, %B store <4 x i8> %C, <4 x i8>* %pA ret void @@ -22,8 +22,8 @@ define void @pull_bitcast (<4 x i8>* %pA, <4 x i8>* %pB) { ; CHECK-NEXT: pxor ; CHECK-NEXT: ret define <4 x i32> @multi_use_swizzle (<4 x i32>* %pA, <4 x i32>* %pB) { - %A = load <4 x i32>* %pA - %B = load <4 x i32>* %pB + %A = load <4 x i32>, <4 x i32>* %pA + %B = load <4 x i32>, <4 x i32>* %pB %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 1, i32 5, i32 6> %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 2> %S2 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 0, i32 2> @@ -35,9 +35,9 @@ define <4 x i32> @multi_use_swizzle (<4 x i32>* %pA, <4 x i32>* %pB) { ; CHECK: xorl ; CHECK: ret define <4 x i8> @pull_bitcast2 (<4 x i8>* %pA, <4 x i8>* %pB, <4 x i8>* %pC) { - %A = load <4 x i8>* %pA + %A = load <4 x i8>, <4 x i8>* %pA store <4 x i8> %A, <4 x i8>* %pC - %B = load <4 x i8>* %pB + %B = load <4 x i8>, <4 x i8>* %pB %C = xor <4 x i8> %A, %B store <4 x i8> %C, <4 x i8>* %pA ret <4 x i8> %C @@ -49,8 +49,8 @@ define <4 x i8> @pull_bitcast2 (<4 x i8>* %pA, <4 x i8>* %pB, <4 x i8>* %pC) { ; CHECK-NOT: pshufd ; CHECK: ret define <4 x i32> @reverse_1 (<4 x i32>* %pA, <4 x i32>* %pB) { - %A = load <4 x i32>* %pA - %B = load <4 x i32>* %pB + %A = load <4 x i32>, <4 x i32>* %pA + %B = load <4 x i32>, <4 x i32>* %pB %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2> %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2> ret <4 x i32> %S1 @@ -61,8 +61,8 @@ define <4 x i32> @reverse_1 (<4 x i32>* %pA, <4 x i32>* %pB) { ; CHECK: pshufd ; CHECK: ret define <4 x i32> @no_reverse_shuff (<4 x i32>* %pA, <4 x i32>* %pB) { - %A = load <4 x i32>* %pA - %B = load <4 x i32>* %pB + %A = load <4 x i32>, <4 x i32>* %pA + %B = load <4 x i32>, <4 x i32>* %pB %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2> %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2> ret <4 x i32> %S1 |