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authorDan Gohman <gohman@apple.com>2009-04-09 03:51:29 +0000
committerDan Gohman <gohman@apple.com>2009-04-09 03:51:29 +0000
commit57fc82d409022e793446c1c5d7d6d8b0d7579f83 (patch)
tree97ab2b8425ae0bcfaf3f82b3d7fd79208f68f716 /test/CodeGen/X86/anyext-uses.ll
parent7d770be047059d624f37c6fb1e5b1d0f2b4961b3 (diff)
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Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the way it checked for live-out values, and simplify the way it find users by using SDNode::use_iterator's (relatively) new features. Also, make it slightly more permissive on targets with free truncates. In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are larger than necessary. If the target's SwitchAmountTy has enough bits, use it. This exposes the truncate to optimization early, enabling more optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/anyext-uses.ll')
-rw-r--r--test/CodeGen/X86/anyext-uses.ll47
1 files changed, 47 insertions, 0 deletions
diff --git a/test/CodeGen/X86/anyext-uses.ll b/test/CodeGen/X86/anyext-uses.ll
new file mode 100644
index 0000000..e8c3cf0
--- /dev/null
+++ b/test/CodeGen/X86/anyext-uses.ll
@@ -0,0 +1,47 @@
+; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: grep mov %t | count 8
+; RUN: not grep implicit %t
+
+; Avoid partial register updates; don't define an i8 register and read
+; the i32 super-register.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.6"
+ %struct.RC4_KEY = type { i8, i8, [256 x i8] }
+
+define void @foo(%struct.RC4_KEY* nocapture %key, i64 %len, i8* %indata, i8* %outdata) nounwind {
+entry:
+ br label %bb24
+
+bb24: ; preds = %bb24, %entry
+ %0 = load i8* null, align 1 ; <i8> [#uses=1]
+ %1 = zext i8 %0 to i64 ; <i64> [#uses=1]
+ %2 = shl i64 %1, 32 ; <i64> [#uses=1]
+ %3 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 0 ; <i8*> [#uses=1]
+ %4 = load i8* %3, align 1 ; <i8> [#uses=2]
+ %5 = add i8 %4, 0 ; <i8> [#uses=2]
+ %6 = zext i8 %5 to i64 ; <i64> [#uses=0]
+ %7 = load i8* null, align 1 ; <i8> [#uses=1]
+ %8 = zext i8 %4 to i32 ; <i32> [#uses=1]
+ %9 = zext i8 %7 to i32 ; <i32> [#uses=1]
+ %10 = add i32 %9, %8 ; <i32> [#uses=1]
+ %11 = and i32 %10, 255 ; <i32> [#uses=1]
+ %12 = zext i32 %11 to i64 ; <i64> [#uses=1]
+ %13 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 %12 ; <i8*> [#uses=1]
+ %14 = load i8* %13, align 1 ; <i8> [#uses=1]
+ %15 = zext i8 %14 to i64 ; <i64> [#uses=1]
+ %16 = shl i64 %15, 48 ; <i64> [#uses=1]
+ %17 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 0 ; <i8*> [#uses=1]
+ %18 = load i8* %17, align 1 ; <i8> [#uses=2]
+ %19 = add i8 %18, %5 ; <i8> [#uses=1]
+ %20 = zext i8 %19 to i64 ; <i64> [#uses=1]
+ %21 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 %20 ; <i8*> [#uses=1]
+ store i8 %18, i8* %21, align 1
+ %22 = or i64 0, %2 ; <i64> [#uses=1]
+ %23 = or i64 %22, 0 ; <i64> [#uses=1]
+ %24 = or i64 %23, %16 ; <i64> [#uses=1]
+ %25 = or i64 %24, 0 ; <i64> [#uses=1]
+ %26 = xor i64 %25, 0 ; <i64> [#uses=1]
+ store i64 %26, i64* null, align 8
+ br label %bb24
+}