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| author | Michael Liao <michael.liao@intel.com> | 2013-03-07 01:01:29 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-03-07 01:01:29 +0000 |
| commit | fe9dbe0066ba4a35cb68fb281e6f6649ffa85ae9 (patch) | |
| tree | fab477c0698725f0d78685f1a26f2c6cf39fc6ae /test/CodeGen/X86/atomic32.ll | |
| parent | b7656a9cc4bf36752df38e7c02b910c9390b9c39 (diff) | |
| download | external_llvm-fe9dbe0066ba4a35cb68fb281e6f6649ffa85ae9.zip external_llvm-fe9dbe0066ba4a35cb68fb281e6f6649ffa85ae9.tar.gz external_llvm-fe9dbe0066ba4a35cb68fb281e6f6649ffa85ae9.tar.bz2 | |
Fix two remaining issue after fixing PR15355 when CMOV is not available
- Phi nodes should be replaced/updated after lowering CMOV into branch
because 'mainMBB' updating operand in Phi node is changed.
- Add EFLAGS in livein before lowering the 2nd CMOV. It's necessary as
we will reuse the EFLAGS generated before the 1st lowered CMOV, which
won't clobber EFLAGS. However, we need explicitly specify that.
- '-attr=-cmov' test case are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176598 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/atomic32.ll')
| -rw-r--r-- | test/CodeGen/X86/atomic32.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/X86/atomic32.ll b/test/CodeGen/X86/atomic32.ll index 50c5751..3cb9ca1 100644 --- a/test/CodeGen/X86/atomic32.ll +++ b/test/CodeGen/X86/atomic32.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 ; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 +; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV @sc32 = external global i32 @@ -164,9 +165,15 @@ define void @atomic_fetch_max32(i32 %x) nounwind { ; X32: cmov ; X32: lock ; X32: cmpxchgl + +; NOCMOV: cmpl +; NOCMOV: jl +; NOCMOV: lock +; NOCMOV: cmpxchgl ret void ; X64: ret ; X32: ret +; NOCMOV: ret } define void @atomic_fetch_min32(i32 %x) nounwind { @@ -180,9 +187,15 @@ define void @atomic_fetch_min32(i32 %x) nounwind { ; X32: cmov ; X32: lock ; X32: cmpxchgl + +; NOCMOV: cmpl +; NOCMOV: jg +; NOCMOV: lock +; NOCMOV: cmpxchgl ret void ; X64: ret ; X32: ret +; NOCMOV: ret } define void @atomic_fetch_umax32(i32 %x) nounwind { @@ -196,9 +209,15 @@ define void @atomic_fetch_umax32(i32 %x) nounwind { ; X32: cmov ; X32: lock ; X32: cmpxchgl + +; NOCMOV: cmpl +; NOCMOV: jb +; NOCMOV: lock +; NOCMOV: cmpxchgl ret void ; X64: ret ; X32: ret +; NOCMOV: ret } define void @atomic_fetch_umin32(i32 %x) nounwind { @@ -207,13 +226,20 @@ define void @atomic_fetch_umin32(i32 %x) nounwind { ; X64: cmov ; X64: lock ; X64: cmpxchgl + ; X32: cmpl ; X32: cmov ; X32: lock ; X32: cmpxchgl + +; NOCMOV: cmpl +; NOCMOV: ja +; NOCMOV: lock +; NOCMOV: cmpxchgl ret void ; X64: ret ; X32: ret +; NOCMOV: ret } define void @atomic_fetch_cmpxchg32() nounwind { |