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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/avx-cvt.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/X86/avx-cvt.ll')
| -rw-r--r-- | test/CodeGen/X86/avx-cvt.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/X86/avx-cvt.ll b/test/CodeGen/X86/avx-cvt.ll index 10ab971..9f154ab 100644 --- a/test/CodeGen/X86/avx-cvt.ll +++ b/test/CodeGen/X86/avx-cvt.ll @@ -47,7 +47,7 @@ define <4 x double> @fpext00(<4 x float> %b) nounwind { ; CHECK: vcvtsi2sdq (% define double @funcA(i64* nocapture %e) nounwind uwtable readonly ssp { entry: - %tmp1 = load i64* %e, align 8 + %tmp1 = load i64, i64* %e, align 8 %conv = sitofp i64 %tmp1 to double ret double %conv } @@ -55,7 +55,7 @@ entry: ; CHECK: vcvtsi2sdl (% define double @funcB(i32* nocapture %e) nounwind uwtable readonly ssp { entry: - %tmp1 = load i32* %e, align 4 + %tmp1 = load i32, i32* %e, align 4 %conv = sitofp i32 %tmp1 to double ret double %conv } @@ -63,7 +63,7 @@ entry: ; CHECK: vcvtsi2ssl (% define float @funcC(i32* nocapture %e) nounwind uwtable readonly ssp { entry: - %tmp1 = load i32* %e, align 4 + %tmp1 = load i32, i32* %e, align 4 %conv = sitofp i32 %tmp1 to float ret float %conv } @@ -71,7 +71,7 @@ entry: ; CHECK: vcvtsi2ssq (% define float @funcD(i64* nocapture %e) nounwind uwtable readonly ssp { entry: - %tmp1 = load i64* %e, align 8 + %tmp1 = load i64, i64* %e, align 8 %conv = sitofp i64 %tmp1 to float ret float %conv } @@ -81,7 +81,7 @@ define void @fpext() nounwind uwtable { entry: %f = alloca float, align 4 %d = alloca double, align 8 - %tmp = load float* %f, align 4 + %tmp = load float, float* %f, align 4 %conv = fpext float %tmp to double store double %conv, double* %d, align 8 ret void |