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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/cas.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/CodeGen/X86/cas.ll')
-rw-r--r-- | test/CodeGen/X86/cas.ll | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/test/CodeGen/X86/cas.ll b/test/CodeGen/X86/cas.ll index ec519c6..7807bb9 100644 --- a/test/CodeGen/X86/cas.ll +++ b/test/CodeGen/X86/cas.ll @@ -24,14 +24,14 @@ entry: store float* %p, float** %p.addr, align 8 store float* %expected, float** %expected.addr, align 8 store float %desired, float* %desired.addr, align 4 - %0 = load float** %expected.addr, align 8 - %1 = load float** %expected.addr, align 8 - %2 = load float* %1, align 4 - %3 = load float* %desired.addr, align 4 - %4 = load float** %p.addr, align 8 + %0 = load float*, float** %expected.addr, align 8 + %1 = load float*, float** %expected.addr, align 8 + %2 = load float, float* %1, align 4 + %3 = load float, float* %desired.addr, align 4 + %4 = load float*, float** %p.addr, align 8 %5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(float* %0, float %2, float %3, float* %4) nounwind store i8 %5, i8* %success, align 1 - %6 = load i8* %success, align 1 + %6 = load i8, i8* %success, align 1 %tobool = trunc i8 %6 to i1 ret i1 %tobool } @@ -52,16 +52,16 @@ entry: store i8* %expected, i8** %expected.addr, align 8 %frombool = zext i1 %desired to i8 store i8 %frombool, i8* %desired.addr, align 1 - %0 = load i8** %expected.addr, align 8 - %1 = load i8** %expected.addr, align 8 - %2 = load i8* %1, align 1 + %0 = load i8*, i8** %expected.addr, align 8 + %1 = load i8*, i8** %expected.addr, align 8 + %2 = load i8, i8* %1, align 1 %tobool = trunc i8 %2 to i1 - %3 = load i8* %desired.addr, align 1 + %3 = load i8, i8* %desired.addr, align 1 %tobool1 = trunc i8 %3 to i1 - %4 = load i8** %p.addr, align 8 + %4 = load i8*, i8** %p.addr, align 8 %5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %0, i1 %tobool, i1 %tobool1, i8* %4) nounwind store i8 %5, i8* %success, align 1 - %6 = load i8* %success, align 1 + %6 = load i8, i8* %success, align 1 %tobool2 = trunc i8 %6 to i1 ret i1 %tobool2 } |