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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-26 00:39:23 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-26 00:39:23 +0000 |
| commit | 4f5d84e4adfe2fd972e20e1e9104fbacf8d63512 (patch) | |
| tree | e2bce266bf4d12dfaef3c2bd08f130d2d8927a33 /test/CodeGen/X86/crash-O0.ll | |
| parent | 80d9bc0336821ca2a94a7afe2daac6e8bc689ef7 (diff) | |
| download | external_llvm-4f5d84e4adfe2fd972e20e1e9104fbacf8d63512.zip external_llvm-4f5d84e4adfe2fd972e20e1e9104fbacf8d63512.tar.gz external_llvm-4f5d84e4adfe2fd972e20e1e9104fbacf8d63512.tar.bz2 | |
When creating X86 MUL8 and DIV8 instructions, make sure we don't produce
CopyFromReg nodes for aliasing registers (AX and AL). This confuses the fast
register allocator.
Instead of CopyFromReg(AL), use ExtractSubReg(CopyFromReg(AX), sub_8bit).
This fixes PR7312.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/crash-O0.ll')
| -rw-r--r-- | test/CodeGen/X86/crash-O0.ll | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/test/CodeGen/X86/crash-O0.ll b/test/CodeGen/X86/crash-O0.ll new file mode 100644 index 0000000..956d43b --- /dev/null +++ b/test/CodeGen/X86/crash-O0.ll @@ -0,0 +1,31 @@ +; RUN: llc -O0 -relocation-model=pic -disable-fp-elim < %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10" + +; This file contains functions that may crash llc -O0 + +; The DIV8 instruction produces results in AH and AL, but we don't want to use +; AH in 64-bit mode. The hack used must not generate copyFromReg nodes for +; aliased registers (AX and AL) - RegAllocFast does not like that. +; PR7312 +define i32 @div8() nounwind { +entry: + %0 = trunc i64 undef to i8 ; <i8> [#uses=3] + %1 = udiv i8 0, %0 ; <i8> [#uses=1] + %2 = urem i8 0, %0 ; <i8> [#uses=1] + %3 = icmp uge i8 %2, %0 ; <i1> [#uses=1] + br i1 %3, label %"40", label %"39" + +"39": ; preds = %"36" + %4 = zext i8 %1 to i32 ; <i32> [#uses=1] + %5 = mul nsw i32 %4, undef ; <i32> [#uses=1] + %6 = add nsw i32 %5, undef ; <i32> [#uses=1] + %7 = icmp ne i32 %6, undef ; <i1> [#uses=1] + br i1 %7, label %"40", label %"41" + +"40": ; preds = %"39", %"36" + unreachable + +"41": ; preds = %"39" + unreachable +} |