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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/X86/lzcnt-tzcnt.ll | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/X86/lzcnt-tzcnt.ll')
| -rw-r--r-- | test/CodeGen/X86/lzcnt-tzcnt.ll | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/test/CodeGen/X86/lzcnt-tzcnt.ll b/test/CodeGen/X86/lzcnt-tzcnt.ll index 07e4b9d..e98764a 100644 --- a/test/CodeGen/X86/lzcnt-tzcnt.ll +++ b/test/CodeGen/X86/lzcnt-tzcnt.ll @@ -437,6 +437,137 @@ define i64 @test18_cttz(i64* %ptr) { ; CHECK: tzcnt ; CHECK-NEXT: ret +define i16 @test1b_ctlz(i16 %v) { + %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true) + %tobool = icmp ne i16 %v, 0 + %cond = select i1 %tobool, i16 16, i16 %cnt + ret i16 %cond +} +; CHECK-LABEL: test1b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i32 @test2b_ctlz(i32 %v) { + %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true) + %tobool = icmp ne i32 %v, 0 + %cond = select i1 %tobool, i32 32, i32 %cnt + ret i32 %cond +} +; CHECK-LABEL: test2b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i64 @test3b_ctlz(i64 %v) { + %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true) + %tobool = icmp ne i64 %v, 0 + %cond = select i1 %tobool, i64 64, i64 %cnt + ret i64 %cond +} +; CHECK-LABEL: test3b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i16 @test4b_ctlz(i16 %v) { + %cnt = tail call i16 @llvm.ctlz.i16(i16 %v, i1 true) + %tobool = icmp ne i16 %v, 0 + %cond = select i1 %tobool, i16 %cnt, i16 16 + ret i16 %cond +} +; CHECK-LABEL: test4b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i32 @test5b_ctlz(i32 %v) { + %cnt = tail call i32 @llvm.ctlz.i32(i32 %v, i1 true) + %tobool = icmp ne i32 %v, 0 + %cond = select i1 %tobool, i32 %cnt, i32 32 + ret i32 %cond +} +; CHECK-LABEL: test5b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i64 @test6b_ctlz(i64 %v) { + %cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true) + %tobool = icmp ne i64 %v, 0 + %cond = select i1 %tobool, i64 %cnt, i64 64 + ret i64 %cond +} +; CHECK-LABEL: test6b_ctlz +; CHECK: lzcnt +; CHECK-NEXT: ret + + +define i16 @test1b_cttz(i16 %v) { + %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true) + %tobool = icmp ne i16 %v, 0 + %cond = select i1 %tobool, i16 16, i16 %cnt + ret i16 %cond +} +; CHECK-LABEL: test1b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + + +define i32 @test2b_cttz(i32 %v) { + %cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true) + %tobool = icmp ne i32 %v, 0 + %cond = select i1 %tobool, i32 32, i32 %cnt + ret i32 %cond +} +; CHECK-LABEL: test2b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + + +define i64 @test3b_cttz(i64 %v) { + %cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true) + %tobool = icmp ne i64 %v, 0 + %cond = select i1 %tobool, i64 64, i64 %cnt + ret i64 %cond +} +; CHECK-LABEL: test3b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + + +define i16 @test4b_cttz(i16 %v) { + %cnt = tail call i16 @llvm.cttz.i16(i16 %v, i1 true) + %tobool = icmp ne i16 %v, 0 + %cond = select i1 %tobool, i16 %cnt, i16 16 + ret i16 %cond +} +; CHECK-LABEL: test4b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + + +define i32 @test5b_cttz(i32 %v) { + %cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true) + %tobool = icmp ne i32 %v, 0 + %cond = select i1 %tobool, i32 %cnt, i32 32 + ret i32 %cond +} +; CHECK-LABEL: test5b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + + +define i64 @test6b_cttz(i64 %v) { + %cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true) + %tobool = icmp ne i64 %v, 0 + %cond = select i1 %tobool, i64 %cnt, i64 64 + ret i64 %cond +} +; CHECK-LABEL: test6b_cttz +; CHECK: tzcnt +; CHECK-NEXT: ret + declare i64 @llvm.cttz.i64(i64, i1) declare i32 @llvm.cttz.i32(i32, i1) |