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| author | Craig Topper <craig.topper@gmail.com> | 2013-10-09 02:18:34 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2013-10-09 02:18:34 +0000 |
| commit | b96a393b090a0d9c11fb4b776d2b3c73a1d84a0c (patch) | |
| tree | 483cc13925855fc823542ca278c1fc9ad387e968 /test/CodeGen/X86/maskmovdqu.ll | |
| parent | c52566d2226aa744935c682c0073529002d4eb4d (diff) | |
| download | external_llvm-b96a393b090a0d9c11fb4b776d2b3c73a1d84a0c.zip external_llvm-b96a393b090a0d9c11fb4b776d2b3c73a1d84a0c.tar.gz external_llvm-b96a393b090a0d9c11fb4b776d2b3c73a1d84a0c.tar.bz2 | |
Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/maskmovdqu.ll')
| -rw-r--r-- | test/CodeGen/X86/maskmovdqu.ll | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/test/CodeGen/X86/maskmovdqu.ll b/test/CodeGen/X86/maskmovdqu.ll index 7796f0e..0b3334d 100644 --- a/test/CodeGen/X86/maskmovdqu.ll +++ b/test/CodeGen/X86/maskmovdqu.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -i EDI -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI +; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | grep -i EDI +; RUN: llc < %s -march=x86-64 -mattr=+sse2,-avx | grep -i RDI +; RUN: llc < %s -march=x86 -mattr=+avx | grep -i EDI +; RUN: llc < %s -march=x86-64 -mattr=+avx | grep -i RDI ; rdar://6573467 define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind { |