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| author | Andrew Trick <atrick@apple.com> | 2013-06-17 21:45:16 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-06-17 21:45:16 +0000 |
| commit | ad626132a9fea9f82065610bae552200d8cb1545 (patch) | |
| tree | d5470d234249ece4b139f8bfe81fd3b243b8dcac /test/CodeGen/X86/misched-matmul.ll | |
| parent | a626f5072e6b3433392cc2be454727c7bb5e83b8 (diff) | |
| download | external_llvm-ad626132a9fea9f82065610bae552200d8cb1545.zip external_llvm-ad626132a9fea9f82065610bae552200d8cb1545.tar.gz external_llvm-ad626132a9fea9f82065610bae552200d8cb1545.tar.bz2 | |
Reenable, improve, and add MI-Sched unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184134 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/misched-matmul.ll')
| -rw-r--r-- | test/CodeGen/X86/misched-matmul.ll | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/test/CodeGen/X86/misched-matmul.ll b/test/CodeGen/X86/misched-matmul.ll index 7ad54bd..6e6ec0b 100644 --- a/test/CodeGen/X86/misched-matmul.ll +++ b/test/CodeGen/X86/misched-matmul.ll @@ -1,6 +1,5 @@ ; REQUIRES: asserts -; RUN-disabled: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s -; RUN: true +; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s ; ; Verify that register pressure heuristics are working in MachineScheduler. ; @@ -8,7 +7,7 @@ ; flag to disable it for this test case. ; ; CHECK: @wrap_mul4 -; CHECK: 30 regalloc - Number of spills inserted +; CHECK: 24 regalloc - Number of spills inserted define void @wrap_mul4(double* nocapture %Out, [4 x double]* nocapture %A, [4 x double]* nocapture %B) #0 { entry: |