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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/movmsk.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
downloadexternal_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/X86/movmsk.ll')
-rw-r--r--test/CodeGen/X86/movmsk.ll16
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/X86/movmsk.ll b/test/CodeGen/X86/movmsk.ll
index 2520662..a7ebebc 100644
--- a/test/CodeGen/X86/movmsk.ll
+++ b/test/CodeGen/X86/movmsk.ll
@@ -13,7 +13,7 @@ entry:
%0 = bitcast double* %__x.addr.i to i8*
%1 = bitcast %0* %__u.i to i8*
store double %d1, double* %__x.addr.i, align 8
- %__f.i = getelementptr inbounds %0* %__u.i, i64 0, i32 0
+ %__f.i = getelementptr inbounds %0, %0* %__u.i, i64 0, i32 0
store double %d1, double* %__f.i, align 8
%tmp = bitcast double %d1 to i64
; CHECK-NOT: shr
@@ -32,7 +32,7 @@ entry:
%0 = bitcast double* %__x.addr.i to i8*
%1 = bitcast %0* %__u.i to i8*
store double %add, double* %__x.addr.i, align 8
- %__f.i = getelementptr inbounds %0* %__u.i, i64 0, i32 0
+ %__f.i = getelementptr inbounds %0, %0* %__u.i, i64 0, i32 0
store double %add, double* %__f.i, align 8
%tmp = bitcast double %add to i64
; CHECK-NOT: shr
@@ -50,7 +50,7 @@ entry:
%0 = bitcast float* %__x.addr.i to i8*
%1 = bitcast %union.anon* %__u.i to i8*
store float %f1, float* %__x.addr.i, align 4
- %__f.i = getelementptr inbounds %union.anon* %__u.i, i64 0, i32 0
+ %__f.i = getelementptr inbounds %union.anon, %union.anon* %__u.i, i64 0, i32 0
store float %f1, float* %__f.i, align 4
%2 = bitcast float %f1 to i32
; CHECK-NOT: shr
@@ -68,7 +68,7 @@ entry:
%0 = bitcast float* %__x.addr.i to i8*
%1 = bitcast %union.anon* %__u.i to i8*
store float %add, float* %__x.addr.i, align 4
- %__f.i = getelementptr inbounds %union.anon* %__u.i, i64 0, i32 0
+ %__f.i = getelementptr inbounds %union.anon, %union.anon* %__u.i, i64 0, i32 0
store float %add, float* %__f.i, align 4
%2 = bitcast float %add to i32
; CHECK-NOT: shr
@@ -104,8 +104,8 @@ entry:
; CHECK-NOT: movslq
%0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
%idxprom = sext i32 %0 to i64
- %arrayidx = getelementptr inbounds i32* %indexTable, i64 %idxprom
- %1 = load i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, i32* %indexTable, i64 %idxprom
+ %1 = load i32, i32* %arrayidx, align 4
ret i32 %1
}
@@ -117,8 +117,8 @@ entry:
%0 = bitcast <4 x float> %x to <2 x double>
%1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
%idxprom = sext i32 %1 to i64
- %arrayidx = getelementptr inbounds i32* %indexTable, i64 %idxprom
- %2 = load i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, i32* %indexTable, i64 %idxprom
+ %2 = load i32, i32* %arrayidx, align 4
ret i32 %2
}