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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/CodeGen/X86/pr15267.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/CodeGen/X86/pr15267.ll')
-rw-r--r-- | test/CodeGen/X86/pr15267.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/X86/pr15267.ll b/test/CodeGen/X86/pr15267.ll index 90df990..e9f41d9 100644 --- a/test/CodeGen/X86/pr15267.ll +++ b/test/CodeGen/X86/pr15267.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx | FileCheck %s define <4 x i3> @test1(<4 x i3>* %in) nounwind { - %ret = load <4 x i3>* %in, align 1 + %ret = load <4 x i3>, <4 x i3>* %in, align 1 ret <4 x i3> %ret } ; CHECK-LABEL: test1 @@ -20,7 +20,7 @@ define <4 x i3> @test1(<4 x i3>* %in) nounwind { ; CHECK: ret define <4 x i1> @test2(<4 x i1>* %in) nounwind { - %ret = load <4 x i1>* %in, align 1 + %ret = load <4 x i1>, <4 x i1>* %in, align 1 ret <4 x i1> %ret } @@ -40,7 +40,7 @@ define <4 x i1> @test2(<4 x i1>* %in) nounwind { ; CHECK: ret define <4 x i64> @test3(<4 x i1>* %in) nounwind { - %wide.load35 = load <4 x i1>* %in, align 1 + %wide.load35 = load <4 x i1>, <4 x i1>* %in, align 1 %sext = sext <4 x i1> %wide.load35 to <4 x i64> ret <4 x i64> %sext } @@ -68,7 +68,7 @@ define <4 x i64> @test3(<4 x i1>* %in) nounwind { ; CHECK: ret define <16 x i4> @test4(<16 x i4>* %in) nounwind { - %ret = load <16 x i4>* %in, align 1 + %ret = load <16 x i4>, <16 x i4>* %in, align 1 ret <16 x i4> %ret } |