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author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/CodeGen/X86/pre-split4.ll | |
parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
download | external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.zip external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.gz external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.bz2 |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/pre-split4.ll')
-rw-r--r-- | test/CodeGen/X86/pre-split4.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll index 97401b3..a570f73 100644 --- a/test/CodeGen/X86/pre-split4.ll +++ b/test/CodeGen/X86/pre-split4.ll @@ -10,14 +10,14 @@ bb: ; preds = %bb, %entry %Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1] %twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1] %0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1] - %1 = add double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1] + %1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1] %2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1] - %3 = mul double 0.000000e+00, %2 ; <double> [#uses=1] + %3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1] %4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1] store double %Flint.0.reg2mem.0, double* null store double %twoThrd.0.reg2mem.0, double* null - %5 = add double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1] - %6 = add double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1] + %5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1] + %6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1] br label %bb } |