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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-10-19 20:43:16 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-10-19 20:43:16 +0000 |
| commit | 815af82b74fa0901e818f5d16ee418675f399101 (patch) | |
| tree | 67f6bd544bc863bbbf7f3193720a3b4016c2b609 /test/CodeGen/X86/sse2-blend.ll | |
| parent | 12ae52767f2d0e4312ba059c0e97ed8beb9777d5 (diff) | |
| download | external_llvm-815af82b74fa0901e818f5d16ee418675f399101.zip external_llvm-815af82b74fa0901e818f5d16ee418675f399101.tar.gz external_llvm-815af82b74fa0901e818f5d16ee418675f399101.tar.bz2 | |
Improve code generation for vselect on SSE2:
When checking the availability of instructions using the TLI, a 'promoted'
instruction IS available. It means that the value is bitcasted to another type
for which there is an operation. The correct check for the availablity of an
instruction is to check if it should be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/sse2-blend.ll')
| -rw-r--r-- | test/CodeGen/X86/sse2-blend.ll | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/test/CodeGen/X86/sse2-blend.ll b/test/CodeGen/X86/sse2-blend.ll index 56b099e..0007cab 100644 --- a/test/CodeGen/X86/sse2-blend.ll +++ b/test/CodeGen/X86/sse2-blend.ll @@ -1,8 +1,10 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah -promote-elements -mattr=+sse2,-sse41 | FileCheck %s - - -; currently (xor v4i32) is defined as illegal, so we scalarize the code. +; RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse41 | FileCheck %s +; CHECK: vsel_float +; CHECK: pandn +; CHECK: pand +; CHECK: por +; CHECK: ret define void@vsel_float(<4 x float>* %v1, <4 x float>* %v2) { %A = load <4 x float>* %v1 %B = load <4 x float>* %v2 @@ -11,8 +13,11 @@ define void@vsel_float(<4 x float>* %v1, <4 x float>* %v2) { ret void } -; currently (xor v4i32) is defined as illegal, so we scalarize the code. - +; CHECK: vsel_i32 +; CHECK: pandn +; CHECK: pand +; CHECK: por +; CHECK: ret define void@vsel_i32(<4 x i32>* %v1, <4 x i32>* %v2) { %A = load <4 x i32>* %v1 %B = load <4 x i32>* %v2 |