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author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
---|---|---|
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/X86/sse41.ll | |
parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/X86/sse41.ll')
-rw-r--r-- | test/CodeGen/X86/sse41.ll | 288 |
1 files changed, 173 insertions, 115 deletions
diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index d5c6f74..a5b07e7 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -78,13 +78,13 @@ define <2 x i64> @pmovzxbq_1() nounwind { ; X32-LABEL: pmovzxbq_1: ; X32: ## BB#0: ## %entry ; X32-NEXT: movl L_g16$non_lazy_ptr, %eax -; X32-NEXT: pmovzxbq (%eax), %xmm0 +; X32-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero ; X32-NEXT: retl ; ; X64-LABEL: pmovzxbq_1: ; X64: ## BB#0: ## %entry ; X64-NEXT: movq _g16@{{.*}}(%rip), %rax -; X64-NEXT: pmovzxbq (%rax), %xmm0 +; X64-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero ; X64-NEXT: retq entry: %0 = load i16* @g16, align 2 ; <i16> [#uses=1] @@ -202,7 +202,7 @@ declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) noun define <4 x float> @insertps_2(<4 x float> %t1, float %t2) nounwind { ; X32-LABEL: insertps_2: ; X32: ## BB#0: -; X32-NEXT: insertps $0, {{[0-9]+}}(%esp), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = mem[0],xmm0[1,2,3] ; X32-NEXT: retl ; ; X64-LABEL: insertps_2: @@ -291,22 +291,20 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone define <2 x float> @buildvector(<2 x float> %A, <2 x float> %B) nounwind { ; X32-LABEL: buildvector: ; X32: ## BB#0: ## %entry -; X32-NEXT: movaps %xmm0, %xmm2 -; X32-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] +; X32-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; X32-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] ; X32-NEXT: addss %xmm1, %xmm0 -; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] -; X32-NEXT: addss %xmm2, %xmm1 -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] +; X32-NEXT: addss %xmm2, %xmm3 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] ; X32-NEXT: retl ; ; X64-LABEL: buildvector: ; X64: ## BB#0: ## %entry -; X64-NEXT: movaps %xmm0, %xmm2 -; X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] +; X64-NEXT: movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] +; X64-NEXT: movshdup {{.*#+}} xmm3 = xmm1[1,1,3,3] ; X64-NEXT: addss %xmm1, %xmm0 -; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] -; X64-NEXT: addss %xmm2, %xmm1 -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] +; X64-NEXT: addss %xmm2, %xmm3 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3] ; X64-NEXT: retq entry: %tmp7 = extractelement <2 x float> %A, i32 0 @@ -324,12 +322,12 @@ define <4 x float> @insertps_from_shufflevector_1(<4 x float> %a, <4 x float>* n ; X32-LABEL: insertps_from_shufflevector_1: ; X32: ## BB#0: ## %entry ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $48, (%eax), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_shufflevector_1: ; X64: ## BB#0: ## %entry -; X64-NEXT: insertps $48, (%rdi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] ; X64-NEXT: retq entry: %0 = load <4 x float>* %pb, align 16 @@ -358,12 +356,14 @@ define <4 x i32> @pinsrd_from_shufflevector_i32(<4 x i32> %a, <4 x i32>* nocaptu ; X32-LABEL: pinsrd_from_shufflevector_i32: ; X32: ## BB#0: ## %entry ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $48, (%eax), %xmm0 +; X32-NEXT: pshufd {{.*#+}} xmm1 = mem[0,1,2,0] +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7] ; X32-NEXT: retl ; ; X64-LABEL: pinsrd_from_shufflevector_i32: ; X64: ## BB#0: ## %entry -; X64-NEXT: insertps $48, (%rdi), %xmm0 +; X64-NEXT: pshufd {{.*#+}} xmm1 = mem[0,1,2,0] +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7] ; X64-NEXT: retq entry: %0 = load <4 x i32>* %pb, align 16 @@ -374,12 +374,14 @@ entry: define <4 x i32> @insertps_from_shufflevector_i32_2(<4 x i32> %a, <4 x i32> %b) { ; X32-LABEL: insertps_from_shufflevector_i32_2: ; X32: ## BB#0: ## %entry -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[3],xmm0[2,3] +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_shufflevector_i32_2: ; X64: ## BB#0: ## %entry -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[3],xmm0[2,3] +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7] ; X64-NEXT: retq entry: %vecinit6 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 7, i32 2, i32 3> @@ -390,12 +392,12 @@ define <4 x float> @insertps_from_load_ins_elt_undef(<4 x float> %a, float* %b) ; X32-LABEL: insertps_from_load_ins_elt_undef: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $16, (%eax), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_load_ins_elt_undef: ; X64: ## BB#0: -; X64-NEXT: insertps $16, (%rdi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3] ; X64-NEXT: retq %1 = load float* %b, align 4 %2 = insertelement <4 x float> undef, float %1, i32 0 @@ -408,14 +410,16 @@ define <4 x i32> @insertps_from_load_ins_elt_undef_i32(<4 x i32> %a, i32* %b) { ; X32-LABEL: insertps_from_load_ins_elt_undef_i32: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movd (%eax), %xmm1 -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] +; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_load_ins_elt_undef_i32: ; X64: ## BB#0: -; X64-NEXT: movd (%rdi), %xmm1 -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] +; X64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7] ; X64-NEXT: retq %1 = load i32* %b, align 4 %2 = insertelement <4 x i32> undef, i32 %1, i32 0 @@ -449,12 +453,12 @@ define <4 x float> @shuf_XYZ0(<4 x float> %x, <4 x float> %a) { define <4 x float> @shuf_XY00(<4 x float> %x, <4 x float> %a) { ; X32-LABEL: shuf_XY00: ; X32: ## BB#0: -; X32-NEXT: movq %xmm0, %xmm0 +; X32-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero ; X32-NEXT: retl ; ; X64-LABEL: shuf_XY00: ; X64: ## BB#0: -; X64-NEXT: movq %xmm0, %xmm0 +; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero ; X64-NEXT: retq %vecext = extractelement <4 x float> %x, i32 0 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0 @@ -527,14 +531,14 @@ define <4 x float> @shuf_X00A(<4 x float> %x, <4 x float> %a) { ; X32: ## BB#0: ; X32-NEXT: xorps %xmm2, %xmm2 ; X32-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0] +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] ; X32-NEXT: retl ; ; X64-LABEL: shuf_X00A: ; X64: ## BB#0: ; X64-NEXT: xorps %xmm2, %xmm2 ; X64-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0] +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] ; X64-NEXT: retq %vecext = extractelement <4 x float> %x, i32 0 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0 @@ -547,18 +551,12 @@ define <4 x float> @shuf_X00A(<4 x float> %x, <4 x float> %a) { define <4 x float> @shuf_X00X(<4 x float> %x, <4 x float> %a) { ; X32-LABEL: shuf_X00X: ; X32: ## BB#0: -; X32-NEXT: xorps %xmm1, %xmm1 -; X32-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,zero,xmm0[0] -; X32-NEXT: movaps %xmm1, %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm0[0] ; X32-NEXT: retl ; ; X64-LABEL: shuf_X00X: ; X64: ## BB#0: -; X64-NEXT: xorps %xmm1, %xmm1 -; X64-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,zero,xmm0[0] -; X64-NEXT: movaps %xmm1, %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm0[0] ; X64-NEXT: retq %vecext = extractelement <4 x float> %x, i32 0 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0 @@ -571,20 +569,14 @@ define <4 x float> @shuf_X00X(<4 x float> %x, <4 x float> %a) { define <4 x float> @shuf_X0YC(<4 x float> %x, <4 x float> %a) { ; X32-LABEL: shuf_X0YC: ; X32: ## BB#0: -; X32-NEXT: xorps %xmm2, %xmm2 -; X32-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0],zero,xmm0[1],zero -; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2] -; X32-NEXT: movaps %xmm2, %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[2] ; X32-NEXT: retl ; ; X64-LABEL: shuf_X0YC: ; X64: ## BB#0: -; X64-NEXT: xorps %xmm2, %xmm2 -; X64-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0],zero,xmm0[1],zero -; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2] -; X64-NEXT: movaps %xmm2, %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[2] ; X64-NEXT: retq %vecext = extractelement <4 x float> %x, i32 0 %vecinit = insertelement <4 x float> undef, float %vecext, i32 0 @@ -619,12 +611,12 @@ define <4 x i32> @i32_shuf_XYZ0(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_XY00(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_XY00: ; X32: ## BB#0: -; X32-NEXT: movq %xmm0, %xmm0 +; X32-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_XY00: ; X64: ## BB#0: -; X64-NEXT: movq %xmm0, %xmm0 +; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -638,12 +630,16 @@ define <4 x i32> @i32_shuf_XY00(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_XYY0(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_XYY0: ; X32: ## BB#0: -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,3] +; X32-NEXT: pxor %xmm0, %xmm0 +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_XYY0: ; X64: ## BB#0: -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,1],zero +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,3] +; X64-NEXT: pxor %xmm0, %xmm0 +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -657,12 +653,16 @@ define <4 x i32> @i32_shuf_XYY0(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_XYW0(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_XYW0: ; X32: ## BB#0: -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,3,3] +; X32-NEXT: pxor %xmm0, %xmm0 +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_XYW0: ; X64: ## BB#0: -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,3],zero +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,3,3] +; X64-NEXT: pxor %xmm0, %xmm0 +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -677,12 +677,16 @@ define <4 x i32> @i32_shuf_XYW0(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_W00W(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_W00W: ; X32: ## BB#0: -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3] +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] +; X32-NEXT: pxor %xmm0, %xmm0 +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_W00W: ; X64: ## BB#0: -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[3],zero,zero,xmm0[3] +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] +; X64-NEXT: pxor %xmm0, %xmm0 +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 3 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -695,16 +699,18 @@ define <4 x i32> @i32_shuf_W00W(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_X00A(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_X00A: ; X32: ## BB#0: -; X32-NEXT: xorps %xmm2, %xmm2 -; X32-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] +; X32-NEXT: pxor %xmm2, %xmm2 +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7] +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0] +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_X00A: ; X64: ## BB#0: -; X64-NEXT: xorps %xmm2, %xmm2 -; X64-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] +; X64-NEXT: pxor %xmm2, %xmm2 +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7] +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0] +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -717,18 +723,16 @@ define <4 x i32> @i32_shuf_X00A(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_X00X(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_X00X: ; X32: ## BB#0: -; X32-NEXT: xorps %xmm1, %xmm1 -; X32-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0] -; X32-NEXT: movaps %xmm1, %xmm0 +; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,2,0] +; X32-NEXT: pxor %xmm0, %xmm0 +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_X00X: ; X64: ## BB#0: -; X64-NEXT: xorps %xmm1, %xmm1 -; X64-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[0] -; X64-NEXT: movaps %xmm1, %xmm0 +; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,2,0] +; X64-NEXT: pxor %xmm0, %xmm0 +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -741,20 +745,16 @@ define <4 x i32> @i32_shuf_X00X(<4 x i32> %x, <4 x i32> %a) { define <4 x i32> @i32_shuf_X0YC(<4 x i32> %x, <4 x i32> %a) { ; X32-LABEL: i32_shuf_X0YC: ; X32: ## BB#0: -; X32-NEXT: xorps %xmm2, %xmm2 -; X32-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] -; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero -; X32-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2] -; X32-NEXT: movaps %xmm2, %xmm0 +; X32-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero +; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,2,2] +; X32-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7] ; X32-NEXT: retl ; ; X64-LABEL: i32_shuf_X0YC: ; X64: ## BB#0: -; X64-NEXT: xorps %xmm2, %xmm2 -; X64-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] -; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1],xmm0[1],zero -; X64-NEXT: insertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm1[2] -; X64-NEXT: movaps %xmm2, %xmm0 +; X64-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero +; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,2,2] +; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7] ; X64-NEXT: retq %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -816,12 +816,12 @@ define <4 x float> @insertps_from_vector_load(<4 x float> %a, <4 x float>* nocap ; X32-LABEL: insertps_from_vector_load: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $48, (%eax), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_vector_load: ; X64: ## BB#0: -; X64-NEXT: insertps $48, (%rdi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] ; X64-NEXT: retq %1 = load <4 x float>* %pb, align 16 %2 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %1, i32 48) @@ -834,12 +834,12 @@ define <4 x float> @insertps_from_vector_load_offset(<4 x float> %a, <4 x float> ; X32-LABEL: insertps_from_vector_load_offset: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $96, 4(%eax), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[1],xmm0[3] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_vector_load_offset: ; X64: ## BB#0: -; X64-NEXT: insertps $96, 4(%rdi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[1],xmm0[3] ; X64-NEXT: retq %1 = load <4 x float>* %pb, align 16 %2 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a, <4 x float> %1, i32 96) @@ -853,13 +853,13 @@ define <4 x float> @insertps_from_vector_load_offset_2(<4 x float> %a, <4 x floa ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: shll $4, %ecx -; X32-NEXT: insertps $-64, 12(%eax,%ecx), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = mem[3],xmm0[1,2,3] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_vector_load_offset_2: ; X64: ## BB#0: ; X64-NEXT: shlq $4, %rsi -; X64-NEXT: insertps $-64, 12(%rdi,%rsi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = mem[3],xmm0[1,2,3] ; X64-NEXT: retq %1 = getelementptr inbounds <4 x float>* %pb, i64 %index %2 = load <4 x float>* %1, align 16 @@ -872,14 +872,14 @@ define <4 x float> @insertps_from_broadcast_loadf32(<4 x float> %a, float* nocap ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movss (%ecx,%eax,4), %xmm1 +; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0] ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] ; X32-NEXT: retl ; ; X64-LABEL: insertps_from_broadcast_loadf32: ; X64: ## BB#0: -; X64-NEXT: movss (%rdi,%rsi,4), %xmm1 +; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0,0,0] ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] ; X64-NEXT: retq @@ -924,7 +924,7 @@ define <4 x float> @insertps_from_broadcast_multiple_use(<4 x float> %a, <4 x fl ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movss (%ecx,%eax,4), %xmm4 +; X32-NEXT: movss {{.*#+}} xmm4 = mem[0],zero,zero,zero ; X32-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,0,0,0] ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm4[0] ; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0] @@ -937,7 +937,7 @@ define <4 x float> @insertps_from_broadcast_multiple_use(<4 x float> %a, <4 x fl ; ; X64-LABEL: insertps_from_broadcast_multiple_use: ; X64: ## BB#0: -; X64-NEXT: movss (%rdi,%rsi,4), %xmm4 +; X64-NEXT: movss {{.*#+}} xmm4 = mem[0],zero,zero,zero ; X64-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,0,0,0] ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm4[0] ; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0] @@ -967,16 +967,16 @@ define <4 x float> @insertps_with_undefs(<4 x float> %a, float* %b) { ; X32-LABEL: insertps_with_undefs: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movss (%eax), %xmm1 -; X32-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,xmm0[0],xmm1[3] -; X32-NEXT: movaps %xmm1, %xmm0 +; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X32-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; X32-NEXT: movapd %xmm1, %xmm0 ; X32-NEXT: retl ; ; X64-LABEL: insertps_with_undefs: ; X64: ## BB#0: -; X64-NEXT: movss (%rdi), %xmm1 -; X64-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],zero,xmm0[0],xmm1[3] -; X64-NEXT: movaps %xmm1, %xmm0 +; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X64-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; X64-NEXT: movapd %xmm1, %xmm0 ; X64-NEXT: retq %1 = load float* %b, align 4 %2 = insertelement <4 x float> undef, float %1, i32 0 @@ -990,12 +990,12 @@ define <4 x float> @pr20087(<4 x float> %a, <4 x float> *%ptr) { ; X32-LABEL: pr20087: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: insertps $-78, 8(%eax), %xmm0 +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],mem[2] ; X32-NEXT: retl ; ; X64-LABEL: pr20087: ; X64: ## BB#0: -; X64-NEXT: insertps $-78, 8(%rdi), %xmm0 +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],mem[2] ; X64-NEXT: retq %load = load <4 x float> *%ptr %ret = shufflevector <4 x float> %load, <4 x float> %a, <4 x i32> <i32 4, i32 undef, i32 6, i32 2> @@ -1007,16 +1007,18 @@ define void @insertps_pr20411(i32* noalias nocapture %RET) #1 { ; X32-LABEL: insertps_pr20411: ; X32: ## BB#0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: pshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; X32-NEXT: insertps $-36, LCPI49_1+12, %xmm0 -; X32-NEXT: movups %xmm0, (%eax) +; X32-NEXT: pshufd {{.*#+}} xmm0 = mem[2,3,0,1] +; X32-NEXT: pshufd {{.*#+}} xmm1 = mem[3,1,2,3] +; X32-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3],xmm1[4,5,6,7] +; X32-NEXT: movdqu %xmm1, (%eax) ; X32-NEXT: retl ; ; X64-LABEL: insertps_pr20411: ; X64: ## BB#0: -; X64-NEXT: pshufd {{.*#+}} xmm0 = mem[3,1,2,3] -; X64-NEXT: insertps $-36, LCPI49_1+{{.*}}(%rip), %xmm0 -; X64-NEXT: movups %xmm0, (%rdi) +; X64-NEXT: pshufd {{.*#+}} xmm0 = mem[2,3,0,1] +; X64-NEXT: pshufd {{.*#+}} xmm1 = mem[3,1,2,3] +; X64-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3],xmm1[4,5,6,7] +; X64-NEXT: movdqu %xmm1, (%rdi) ; X64-NEXT: retq %gather_load = shufflevector <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %shuffle109 = shufflevector <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; 4 5 6 7 @@ -1029,12 +1031,12 @@ define void @insertps_pr20411(i32* noalias nocapture %RET) #1 { define <4 x float> @insertps_4(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_4: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[2],zero ; X32-NEXT: retl ; ; X64-LABEL: insertps_4: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[2],zero ; X64-NEXT: retq entry: @@ -1049,12 +1051,12 @@ entry: define <4 x float> @insertps_5(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_5: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero ; X32-NEXT: retl ; ; X64-LABEL: insertps_5: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero ; X64-NEXT: retq entry: @@ -1069,12 +1071,12 @@ entry: define <4 x float> @insertps_6(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_6: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1],xmm1[2],zero ; X32-NEXT: retl ; ; X64-LABEL: insertps_6: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1],xmm1[2],zero ; X64-NEXT: retq entry: @@ -1088,12 +1090,12 @@ entry: define <4 x float> @insertps_7(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_7: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[1],zero ; X32-NEXT: retl ; ; X64-LABEL: insertps_7: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[1],zero ; X64-NEXT: retq entry: @@ -1108,12 +1110,12 @@ entry: define <4 x float> @insertps_8(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_8: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero ; X32-NEXT: retl ; ; X64-LABEL: insertps_8: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero ; X64-NEXT: retq entry: @@ -1128,13 +1130,13 @@ entry: define <4 x float> @insertps_9(<4 x float> %A, <4 x float> %B) { ; X32-LABEL: insertps_9: -; X32: ## BB#0: +; X32: ## BB#0: ## %entry ; X32-NEXT: insertps {{.*#+}} xmm1 = zero,xmm0[0],xmm1[2],zero ; X32-NEXT: movaps %xmm1, %xmm0 ; X32-NEXT: retl ; ; X64-LABEL: insertps_9: -; X64: ## BB#0: +; X64: ## BB#0: ## %entry ; X64-NEXT: insertps {{.*#+}} xmm1 = zero,xmm0[0],xmm1[2],zero ; X64-NEXT: movaps %xmm1, %xmm0 ; X64-NEXT: retq @@ -1146,3 +1148,59 @@ entry: %vecinit3 = insertelement <4 x float> %vecinit2, float 0.000000e+00, i32 3 ret <4 x float> %vecinit3 } + +define <4 x float> @insertps_10(<4 x float> %A) +; X32-LABEL: insertps_10: +; X32: ## BB#0: +; X32-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[0],zero +; X32-NEXT: retl +; +; X64-LABEL: insertps_10: +; X64: ## BB#0: +; X64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[0],zero +; X64-NEXT: retq +{ + %vecext = extractelement <4 x float> %A, i32 0 + %vecbuild1 = insertelement <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float %vecext, i32 0 + %vecbuild2 = insertelement <4 x float> %vecbuild1, float %vecext, i32 2 + ret <4 x float> %vecbuild2 +} + +define <4 x float> @build_vector_to_shuffle_1(<4 x float> %A) { +; X32-LABEL: build_vector_to_shuffle_1: +; X32: ## BB#0: ## %entry +; X32-NEXT: xorps %xmm1, %xmm1 +; X32-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3] +; X32-NEXT: retl +; +; X64-LABEL: build_vector_to_shuffle_1: +; X64: ## BB#0: ## %entry +; X64-NEXT: xorps %xmm1, %xmm1 +; X64-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3] +; X64-NEXT: retq +entry: + %vecext = extractelement <4 x float> %A, i32 1 + %vecinit = insertelement <4 x float> zeroinitializer, float %vecext, i32 1 + %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 2 + %vecinit3 = shufflevector <4 x float> %vecinit1, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 2, i32 7> + ret <4 x float> %vecinit3 +} + +define <4 x float> @build_vector_to_shuffle_2(<4 x float> %A) { +; X32-LABEL: build_vector_to_shuffle_2: +; X32: ## BB#0: ## %entry +; X32-NEXT: xorps %xmm1, %xmm1 +; X32-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; X32-NEXT: retl +; +; X64-LABEL: build_vector_to_shuffle_2: +; X64: ## BB#0: ## %entry +; X64-NEXT: xorps %xmm1, %xmm1 +; X64-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3] +; X64-NEXT: retq +entry: + %vecext = extractelement <4 x float> %A, i32 1 + %vecinit = insertelement <4 x float> zeroinitializer, float %vecext, i32 1 + %vecinit1 = insertelement <4 x float> %vecinit, float 0.0, i32 2 + ret <4 x float> %vecinit1 +} |