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authorShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
committerShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
commit7744acd1ab73b3eec6f1449f47083abe3fb1b527 (patch)
tree17ef28b6d1034fdea7f42a19bebe7ad834901d62 /test/CodeGen/X86/tailcall-largecode.ll
parent4a05ed708aed4c7a099d924ed3feb604d3e44074 (diff)
parenta94d6e87c4c49f2e81b01d66d8bfb591277f8f96 (diff)
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Merge with LLVM upstream r160668 (Jul 24th 2012)
Conflicts: include/llvm/Support/ELF.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Support/Memory.cpp lib/Transforms/Instrumentation/AddressSanitizer.cpp Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
Diffstat (limited to 'test/CodeGen/X86/tailcall-largecode.ll')
-rw-r--r--test/CodeGen/X86/tailcall-largecode.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll
index c3f4278..e9b8721 100644
--- a/test/CodeGen/X86/tailcall-largecode.ll
+++ b/test/CodeGen/X86/tailcall-largecode.ll
@@ -49,6 +49,11 @@ define fastcc i32 @direct_manyargs() {
; CHECK: pushq
; Pass the stack argument.
; CHECK: movl $7, 16(%rsp)
+; This is the large code model, so &manyargs_callee may not fit into
+; the jmp instruction. Put it into a register which won't be clobbered
+; while restoring callee-saved registers and won't be used for passing
+; arguments.
+; CHECK: movabsq $manyargs_callee, %rax
; Pass the register arguments, in the right registers.
; CHECK: movl $1, %edi
; CHECK: movl $2, %esi
@@ -56,11 +61,6 @@ define fastcc i32 @direct_manyargs() {
; CHECK: movl $4, %ecx
; CHECK: movl $5, %r8d
; CHECK: movl $6, %r9d
-; This is the large code model, so &manyargs_callee may not fit into
-; the jmp instruction. Put it into R11, which won't be clobbered
-; while restoring callee-saved registers and won't be used for passing
-; arguments.
-; CHECK: movabsq $manyargs_callee, %rax
; Adjust the stack to "return".
; CHECK: popq
; And tail-call to the target.