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| author | Dan Gohman <gohman@apple.com> | 2009-08-05 01:29:28 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-08-05 01:29:28 +0000 |
| commit | 98ca4f2a325f72374a477f9deba7d09e8999c29b (patch) | |
| tree | 8c4b03205992cfc18f04ca67d586796b5d0dd344 /test/CodeGen/X86/tailcallstack64.ll | |
| parent | 518ad1a88031cd4a667bb2e54688fce7dc2ae133 (diff) | |
| download | external_llvm-98ca4f2a325f72374a477f9deba7d09e8999c29b.zip external_llvm-98ca4f2a325f72374a477f9deba7d09e8999c29b.tar.gz external_llvm-98ca4f2a325f72374a477f9deba7d09e8999c29b.tar.bz2 | |
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/tailcallstack64.ll')
| -rw-r--r-- | test/CodeGen/X86/tailcallstack64.ll | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index c81327e..eced067 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -1,14 +1,17 @@ -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | grep TAILCALL +; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | FileCheck %s + ; Check that lowered arguments on the stack do not overwrite each other. -; Move param %in1 to temp register (%eax). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl 40(%rsp), %eax} -; Add %in1 %p1 to another temporary register (%r9d). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %edi, %r10d} -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {addl 32(%rsp), %r10d} +; Add %in1 %p1 to a different temporary register (%eax). +; CHECK: movl %edi, %eax +; CHECK: addl 32(%rsp), %eax +; Move param %in1 to temp register (%r10d). +; CHECK: movl 40(%rsp), %r10d ; Move result of addition to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %r10d, 40(%rsp)} +; CHECK: movl %eax, 40(%rsp) ; Move param %in2 to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %eax, 32(%rsp)} +; CHECK: movl %r10d, 32(%rsp) +; Eventually, do a TAILCALL +; CHECK: TAILCALL declare fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %a, i32 %b) |