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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-04-23 21:53:37 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-04-23 21:53:37 +0000 |
| commit | a35407705da45effd3401fb42395355adaa6e0c2 (patch) | |
| tree | 06e6c7b83a0e834a203e8c680f9ed48e6bc3bf9d /test/CodeGen/X86/vec_cast2.ll | |
| parent | 6a8c7bf8e72338e55f0f9583e1828f62da165d4a (diff) | |
| download | external_llvm-a35407705da45effd3401fb42395355adaa6e0c2.zip external_llvm-a35407705da45effd3401fb42395355adaa6e0c2.tar.gz external_llvm-a35407705da45effd3401fb42395355adaa6e0c2.tar.bz2 | |
Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155397 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_cast2.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_cast2.ll | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_cast2.ll b/test/CodeGen/X86/vec_cast2.ll new file mode 100644 index 0000000..08eb16f --- /dev/null +++ b/test/CodeGen/X86/vec_cast2.ll @@ -0,0 +1,49 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +;CHECK: foo1_8 +;CHECK: vcvtdq2ps +;CHECK: ret +define <8 x float> @foo1_8(<8 x i8> %src) { + %res = sitofp <8 x i8> %src to <8 x float> + ret <8 x float> %res +} + +;CHECK: foo1_4 +;CHECK: vcvtdq2ps +;CHECK: ret +define <4 x float> @foo1_4(<4 x i8> %src) { + %res = sitofp <4 x i8> %src to <4 x float> + ret <4 x float> %res +} + +;CHECK: foo2_8 +;CHECK: vcvtdq2ps +;CHECK: ret +define <8 x float> @foo2_8(<8 x i8> %src) { + %res = uitofp <8 x i8> %src to <8 x float> + ret <8 x float> %res +} + +;CHECK: foo2_4 +;CHECK: vcvtdq2ps +;CHECK: ret +define <4 x float> @foo2_4(<4 x i8> %src) { + %res = uitofp <4 x i8> %src to <4 x float> + ret <4 x float> %res +} + +;CHECK: foo3_8 +;CHECK: vcvttps2dq +;CHECK: ret +define <8 x i8> @foo3_8(<8 x float> %src) { + %res = fptosi <8 x float> %src to <8 x i8> + ret <8 x i8> %res +} +;CHECK: foo3_4 +;CHECK: vcvttps2dq +;CHECK: ret +define <4 x i8> @foo3_4(<4 x float> %src) { + %res = fptosi <4 x float> %src to <4 x i8> + ret <4 x i8> %res +} + |