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| author | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
|---|---|---|
| committer | Shih-wei Liao <sliao@google.com> | 2010-02-10 11:10:31 -0800 |
| commit | e264f62ca09a8f65c87a46d562a4d0f9ec5d457e (patch) | |
| tree | 59e3d57ef656cef79afa708ae0a3daf25cd91fcf /test/CodeGen/X86/vec_shuffle-14.ll | |
| download | external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.zip external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.gz external_llvm-e264f62ca09a8f65c87a46d562a4d0f9ec5d457e.tar.bz2 | |
Check in LLVM r95781.
Diffstat (limited to 'test/CodeGen/X86/vec_shuffle-14.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_shuffle-14.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_shuffle-14.ll b/test/CodeGen/X86/vec_shuffle-14.ll new file mode 100644 index 0000000..f0cfc44 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-14.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3 +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor + +define <4 x i32> @t1(i32 %a) nounwind { +entry: + %tmp = insertelement <4 x i32> undef, i32 %a, i32 0 + %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <2 x i64> @t2(i64 %a) nounwind { +entry: + %tmp = insertelement <2 x i64> undef, i64 %a, i32 0 + %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] + ret <2 x i64> %tmp6 +} + +define <2 x i64> @t3(<2 x i64>* %a) nounwind { +entry: + %tmp4 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1] + %tmp6 = bitcast <2 x i64> %tmp4 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp7 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp6, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + %tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp8 +} + +define <2 x i64> @t4(<2 x i64> %a) nounwind { +entry: + %tmp5 = bitcast <2 x i64> %a to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp5, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + %tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp7 +} + +define <2 x i64> @t5(<2 x i64> %a) nounwind { +entry: + %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] + ret <2 x i64> %tmp6 +} |