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| author | Mon P Wang <wangmp@apple.com> | 2010-12-19 23:55:53 +0000 |
|---|---|---|
| committer | Mon P Wang <wangmp@apple.com> | 2010-12-19 23:55:53 +0000 |
| commit | a0fd0d5b27257c7397e9f6e4234cd600683c9248 (patch) | |
| tree | 5b5c6ee42ee1051041b3361f6532abb9be8efb14 /test/CodeGen/X86/vec_shuffle-27.ll | |
| parent | 1b031ddedec2901ef01f103512b1d79f63a1bb85 (diff) | |
| download | external_llvm-a0fd0d5b27257c7397e9f6e4234cd600683c9248.zip external_llvm-a0fd0d5b27257c7397e9f6e4234cd600683c9248.tar.gz external_llvm-a0fd0d5b27257c7397e9f6e4234cd600683c9248.tar.bz2 | |
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122206 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_shuffle-27.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_shuffle-27.ll | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll index d700ccb..0556284 100644 --- a/test/CodeGen/X86/vec_shuffle-27.ll +++ b/test/CodeGen/X86/vec_shuffle-27.ll @@ -1,7 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -o %t -; RUN: grep addps %t | count 2 -; RUN: grep mulps %t | count 2 -; RUN: grep subps %t | count 2 +; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s ; ModuleID = 'vec_shuffle-27.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" @@ -9,9 +6,32 @@ target triple = "i686-apple-cl.1.0" define <8 x float> @my2filter4_1d(<4 x float> %a, <8 x float> %T0, <8 x float> %T1) nounwind readnone { entry: +; CHECK: subps +; CHECK: mulps +; CHECK: addps +; CHECK: subps +; CHECK: mulps +; CHECK: addps %tmp7 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3 > ; <<8 x float>> [#uses=1] %sub = fsub <8 x float> %T1, %T0 ; <<8 x float>> [#uses=1] %mul = fmul <8 x float> %sub, %tmp7 ; <<8 x float>> [#uses=1] %add = fadd <8 x float> %mul, %T0 ; <<8 x float>> [#uses=1] ret <8 x float> %add } + + +define void @test2(<4 x i64>* %ap, <4 x i64>* %bp) nounwind { +entry: + %a = load <4 x i64> * %ap + %b = load <4 x i64> * %bp + %mulaa = mul <4 x i64> %a, %a + %mulbb = mul <4 x i64> %b, %b + %mulab = mul <4 x i64> %a, %b + %vect1271 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 0, i32 4, i32 undef, i32 undef> + %vect1272 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 1, i32 5, i32 undef, i32 undef> + %vect1487 = shufflevector <4 x i64> %vect1271, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 4> + %vect1488 = shufflevector <4 x i64> %vect1272, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 5> + store <4 x i64> %vect1487, <4 x i64>* %ap + store <4 x i64> %vect1488, <4 x i64>* %bp + ret void; +}
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