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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/CodeGen/X86/widen_load-2.ll | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/CodeGen/X86/widen_load-2.ll')
| -rw-r--r-- | test/CodeGen/X86/widen_load-2.ll | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index 0ec3574..c6bd964 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -76,10 +76,9 @@ define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp ; CHECK: pmovzxwd (%{{.*}}), %[[R0:xmm[0-9]+]] ; CHECK-NEXT: pmovzxwd (%{{.*}}), %[[R1:xmm[0-9]+]] ; CHECK-NEXT: paddd %[[R0]], %[[R1]] -; CHECK-NEXT: movdqa %[[R1]], %[[R0]] -; CHECK-NEXT: pshufb {{.*}}, %[[R0]] -; CHECK-NEXT: pmovzxdq %[[R0]], %[[R0]] ; CHECK-NEXT: pextrw $4, %[[R1]], 4(%{{.*}}) +; CHECK-NEXT: pshufb {{.*}}, %[[R1]] +; CHECK-NEXT: pmovzxdq %[[R1]], %[[R0]] ; CHECK-NEXT: movd %[[R0]], (%{{.*}}) %a = load %i16vec3* %ap, align 16 %b = load %i16vec3* %bp, align 16 @@ -144,10 +143,9 @@ define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) no ; CHECK: pmovzxbd (%{{.*}}), %[[R0:xmm[0-9]+]] ; CHECK-NEXT: pmovzxbd (%{{.*}}), %[[R1:xmm[0-9]+]] ; CHECK-NEXT: paddd %[[R0]], %[[R1]] -; CHECK-NEXT: movdqa %[[R1]], %[[R0]] -; CHECK-NEXT: pshufb {{.*}}, %[[R0]] -; CHECK-NEXT: pmovzxwq %[[R0]], %[[R0]] ; CHECK-NEXT: pextrb $8, %[[R1]], 2(%{{.*}}) +; CHECK-NEXT: pshufb {{.*}}, %[[R1]] +; CHECK-NEXT: pmovzxwq %[[R1]], %[[R0]] ; CHECK-NEXT: movd %[[R0]], %e[[R2:[abcd]]]x ; CHECK-NEXT: movw %[[R2]]x, (%{{.*}}) %a = load %i8vec3* %ap, align 16 @@ -193,8 +191,9 @@ define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pa ; CHECK-NEXT: movd %[[CONSTANT1]], %e[[R1:[abcd]]]x ; CHECK-NEXT: movw %[[R1]]x, (%[[PTR1:.*]]) ; CHECK-NEXT: movb $1, 2(%[[PTR1]]) -; CHECK-NEXT: pmovzxbd (%[[PTR0]]), %[[X0:xmm[0-9]+]] -; CHECK-NEXT: pand {{.*}}, %[[X0]] +; CHECK-NEXT: movl (%[[PTR0]]), [[TMP1:%e[abcd]+x]] +; CHECK-NEXT: movl [[TMP1]], [[TMP2:.*]] +; CHECK-NEXT: pmovzxbd [[TMP2]], %[[X0:xmm[0-9]+]] ; CHECK-NEXT: pextrd $1, %[[X0]], %e[[R0:[abcd]]]x ; CHECK-NEXT: shrl %e[[R0]]x ; CHECK-NEXT: movd %[[X0]], %e[[R1:[abcd]]]x @@ -206,10 +205,9 @@ define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pa ; CHECK-NEXT: pinsrd $2, %e[[R0]]x, %[[X1]] ; CHECK-NEXT: pextrd $3, %[[X0]], %e[[R0:[abcd]]]x ; CHECK-NEXT: pinsrd $3, %e[[R0]]x, %[[X1]] -; CHECK-NEXT: movdqa %[[X1]], %[[X2:xmm[0-9]+]] -; CHECK-NEXT: pshufb %[[SHUFFLE_MASK]], %[[X2]] -; CHECK-NEXT: pmovzxwq %[[X2]], %[[X3:xmm[0-9]+]] ; CHECK-NEXT: pextrb $8, %[[X1]], 2(%{{.*}}) +; CHECK-NEXT: pshufb %[[SHUFFLE_MASK]], %[[X1]] +; CHECK-NEXT: pmovzxwq %[[X1]], %[[X3:xmm[0-9]+]] ; CHECK-NEXT: movd %[[X3]], %e[[R0:[abcd]]]x ; CHECK-NEXT: movw %[[R0]]x, (%{{.*}}) |