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authorEvan Cheng <evan.cheng@apple.com>2011-05-19 18:57:12 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-05-19 18:57:12 +0000
commit0efaa5e6a184cd6658aebc9873462ee60262a6bd (patch)
tree3f3be9d9ea1c39b1ebd595fa222ebabe0e3105e0 /test/CodeGen/X86
parent3dfc4b12229acafee5c69c5ee1673b08027f0438 (diff)
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crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/crc64.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/X86/crc64.ll b/test/CodeGen/X86/crc64.ll
new file mode 100644
index 0000000..1e0aa0d
--- /dev/null
+++ b/test/CodeGen/X86/crc64.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 -mattr=sse42 | FileCheck %s
+
+; crc32 with 64-bit destination zeros high 32-bit.
+; rdar://9467055
+
+define i64 @t() nounwind {
+entry:
+; CHECK: t:
+; CHECK: crc32q
+; CHECK-NOT: mov
+; CHECK-NEXT: crc32q
+ %0 = tail call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 4) nounwind
+ %1 = and i64 %0, 4294967295
+ %2 = tail call i64 @llvm.x86.sse42.crc64.64(i64 %1, i64 4) nounwind
+ %3 = and i64 %2, 4294967295
+ ret i64 %3
+}
+
+declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone