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author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-10-27 08:18:37 +0000 |
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committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-10-27 08:18:37 +0000 |
commit | 62d66cbec5b2d4e00e86457762df0127ae234e6f (patch) | |
tree | e3f9fcdc99261abadac90a0feaf567198db89657 /test/CodeGen/X86 | |
parent | cba7d7d579c85f23f2849e906d93b5dc147edf26 (diff) | |
download | external_llvm-62d66cbec5b2d4e00e86457762df0127ae234e6f.zip external_llvm-62d66cbec5b2d4e00e86457762df0127ae234e6f.tar.gz external_llvm-62d66cbec5b2d4e00e86457762df0127ae234e6f.tar.bz2 |
AVX-512: PMIN/PMAX intrinsics and patterns
Patch by Cameron McInally <cameron.mcinally@nyu.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193497 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r-- | test/CodeGen/X86/avx512-intrinsics.ll | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx512-intrinsics.ll b/test/CodeGen/X86/avx512-intrinsics.ll index 5cd7311..29b5083 100644 --- a/test/CodeGen/X86/avx512-intrinsics.ll +++ b/test/CodeGen/X86/avx512-intrinsics.ll @@ -233,3 +233,59 @@ define <8 x double> @test_x86_vbroadcast_sd_pd_512(<2 x double> %a0) { ret <8 x double> %res } declare <8 x double> @llvm.x86.avx512.vbroadcast.sd.pd.512(<2 x double>) nounwind readonly + +define <16 x i32> @test_x86_pmaxu_d(<16 x i32> %a0, <16 x i32> %a1) { + ; CHECK: vpmaxud + %res = call <16 x i32> @llvm.x86.avx512.pmaxu.d(<16 x i32> %a0, <16 x i32> %a1) ; <<16 x i32>> [#uses=1] + ret <16 x i32> %res +} +declare <16 x i32> @llvm.x86.avx512.pmaxu.d(<16 x i32>, <16 x i32>) nounwind readonly + +define <8 x i64> @test_x86_pmaxu_q(<8 x i64> %a0, <8 x i64> %a1) { + ; CHECK: vpmaxuq + %res = call <8 x i64> @llvm.x86.avx512.pmaxu.q(<8 x i64> %a0, <8 x i64> %a1) ; <<8 x i64>> [#uses=1] + ret <8 x i64> %res +} +declare <8 x i64> @llvm.x86.avx512.pmaxu.q(<8 x i64>, <8 x i64>) nounwind readonly + +define <16 x i32> @test_x86_pmaxs_d(<16 x i32> %a0, <16 x i32> %a1) { + ; CHECK: vpmaxsd + %res = call <16 x i32> @llvm.x86.avx512.pmaxs.d(<16 x i32> %a0, <16 x i32> %a1) ; <<16 x i32>> [#uses=1] + ret <16 x i32> %res +} +declare <16 x i32> @llvm.x86.avx512.pmaxs.d(<16 x i32>, <16 x i32>) nounwind readonly + +define <8 x i64> @test_x86_pmaxs_q(<8 x i64> %a0, <8 x i64> %a1) { + ; CHECK: vpmaxsq + %res = call <8 x i64> @llvm.x86.avx512.pmaxs.q(<8 x i64> %a0, <8 x i64> %a1) ; <<8 x i64>> [#uses=1] + ret <8 x i64> %res +} +declare <8 x i64> @llvm.x86.avx512.pmaxs.q(<8 x i64>, <8 x i64>) nounwind readonly + +define <16 x i32> @test_x86_pminu_d(<16 x i32> %a0, <16 x i32> %a1) { + ; CHECK: vpminud + %res = call <16 x i32> @llvm.x86.avx512.pminu.d(<16 x i32> %a0, <16 x i32> %a1) ; <<16 x i32>> [#uses=1] + ret <16 x i32> %res +} +declare <16 x i32> @llvm.x86.avx512.pminu.d(<16 x i32>, <16 x i32>) nounwind readonly + +define <8 x i64> @test_x86_pminu_q(<8 x i64> %a0, <8 x i64> %a1) { + ; CHECK: vpminuq + %res = call <8 x i64> @llvm.x86.avx512.pminu.q(<8 x i64> %a0, <8 x i64> %a1) ; <<8 x i64>> [#uses=1] + ret <8 x i64> %res +} +declare <8 x i64> @llvm.x86.avx512.pminu.q(<8 x i64>, <8 x i64>) nounwind readonly + +define <16 x i32> @test_x86_pmins_d(<16 x i32> %a0, <16 x i32> %a1) { + ; CHECK: vpminsd + %res = call <16 x i32> @llvm.x86.avx512.pmins.d(<16 x i32> %a0, <16 x i32> %a1) ; <<16 x i32>> [#uses=1] + ret <16 x i32> %res +} +declare <16 x i32> @llvm.x86.avx512.pmins.d(<16 x i32>, <16 x i32>) nounwind readonly + +define <8 x i64> @test_x86_pmins_q(<8 x i64> %a0, <8 x i64> %a1) { + ; CHECK: vpminsq + %res = call <8 x i64> @llvm.x86.avx512.pmins.q(<8 x i64> %a0, <8 x i64> %a1) ; <<8 x i64>> [#uses=1] + ret <8 x i64> %res +} +declare <8 x i64> @llvm.x86.avx512.pmins.q(<8 x i64>, <8 x i64>) nounwind readonly |