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| author | Roman Divacky <rdivacky@freebsd.org> | 2013-10-31 17:50:45 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@freebsd.org> | 2013-10-31 17:50:45 +0000 |
| commit | 6d6e66a3eeb579794378dd528e73645ea54bc69b (patch) | |
| tree | 979e3ea6b298f1b3817ade4004b1fda40dcedd32 /test/CodeGen/X86 | |
| parent | aa8c95ec289bc14351bc7597d5c9251ce6f98c14 (diff) | |
| download | external_llvm-6d6e66a3eeb579794378dd528e73645ea54bc69b.zip external_llvm-6d6e66a3eeb579794378dd528e73645ea54bc69b.tar.gz external_llvm-6d6e66a3eeb579794378dd528e73645ea54bc69b.tar.bz2 | |
Merge and filecheckize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193778 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
| -rw-r--r-- | test/CodeGen/X86/rem-2.ll | 7 | ||||
| -rw-r--r-- | test/CodeGen/X86/rem.ll | 17 |
2 files changed, 16 insertions, 8 deletions
diff --git a/test/CodeGen/X86/rem-2.ll b/test/CodeGen/X86/rem-2.ll deleted file mode 100644 index 1b2af4b..0000000 --- a/test/CodeGen/X86/rem-2.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=x86 | not grep cltd - -define i32 @test(i32 %X) nounwind readnone { -entry: - %0 = srem i32 41, %X - ret i32 %0 -} diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll index 394070e..733b794 100644 --- a/test/CodeGen/X86/rem.ll +++ b/test/CodeGen/X86/rem.ll @@ -1,22 +1,37 @@ -; RUN: llc < %s -march=x86 | not grep div +; RUN: llc < %s -march=x86 | FileCheck %s +; CHECK-LABEL: test1: +; CHECK-NOT: div define i32 @test1(i32 %X) { %tmp1 = srem i32 %X, 255 ; <i32> [#uses=1] ret i32 %tmp1 } +; CHECK-LABEL: test2: +; CHECK-NOT: div define i32 @test2(i32 %X) { %tmp1 = srem i32 %X, 256 ; <i32> [#uses=1] ret i32 %tmp1 } +; CHECK-LABEL: test3: +; CHECK-NOT: div define i32 @test3(i32 %X) { %tmp1 = urem i32 %X, 255 ; <i32> [#uses=1] ret i32 %tmp1 } +; CHECK-LABEL: test4: +; CHECK-NOT: div define i32 @test4(i32 %X) { %tmp1 = urem i32 %X, 256 ; <i32> [#uses=1] ret i32 %tmp1 } +; CHECK-LABEL: test5: +; CHECK-NOT: cltd +define i32 @test5(i32 %X) nounwind readnone { +entry: + %0 = srem i32 41, %X + ret i32 %0 +} |