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| author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-14 06:24:09 +0000 |
|---|---|---|
| committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-14 06:24:09 +0000 |
| commit | 8b2b8a18354546d534b72f912153a3252ab4b857 (patch) | |
| tree | 9e745a19e157915db1f88e171514f4d22041c62a /test/CodeGen/X86 | |
| parent | 6611eaa32f7941dd50a3ffe608f3f4a7665dbe91 (diff) | |
| download | external_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.zip external_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.gz external_llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.bz2 | |
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
188 files changed, 2142 insertions, 2142 deletions
diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll index a58c9b1..d7af1c3 100644 --- a/test/CodeGen/X86/2006-11-12-CSRetCC.ll +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -4,7 +4,7 @@ target triple = "i686-pc-linux-gnu" @str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1] define i32 @main() { -; CHECK: main: +; CHECK-LABEL: main: ; CHECK-NOT: ret ; CHECK: subl $4, %{{.*}} ; CHECK: ret diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll index f7ffb93..88057c8 100644 --- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll +++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll @@ -7,7 +7,7 @@ entry: %tmp2 = call x86_fp80 @llvm.sqrt.f80( x86_fp80 %x ) ret x86_fp80 %tmp2 -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: fldt 4(%esp) ; CHECK-NEXT: fsqrt ; CHECK-NEXT: ret @@ -19,7 +19,7 @@ define x86_fp80 @bar(x86_fp80 %x) nounwind { entry: %tmp2 = call x86_fp80 @llvm.powi.f80( x86_fp80 %x, i32 3 ) ret x86_fp80 %tmp2 -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: fldt 4(%esp) ; CHECK-NEXT: fld %st(0) ; CHECK-NEXT: fmul %st(1) diff --git a/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll index fc38135..da56ce7 100644 --- a/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll +++ b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll @@ -8,7 +8,7 @@ entry: ret void } -; CHECK: a: +; CHECK-LABEL: a: ; CHECK: movups ; CHECK: movups ; CHECK-NOT: movups diff --git a/test/CodeGen/X86/2008-08-19-SubAndFetch.ll b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll index 360ec73..9324d5d 100644 --- a/test/CodeGen/X86/2008-08-19-SubAndFetch.ll +++ b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll @@ -4,7 +4,7 @@ define i32 @main() nounwind { entry: -; CHECK: main: +; CHECK-LABEL: main: ; CHECK: lock ; CHECK: decq atomicrmw sub i64* @var, i64 1 monotonic diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll index d64c966..7549651 100644 --- a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll +++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll @@ -5,7 +5,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i386-apple-darwin9.6" define void @f() nounwind { -; CHECK: f: +; CHECK-LABEL: f: ; CHECK-NOT: ret ; CHECK: foo $-81920 ; CHECK-NOT: ret diff --git a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll index 3cd5416..7c87598 100644 --- a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll +++ b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll @@ -9,7 +9,7 @@ target triple = "x86_64-unknown-linux-gnu" define i64 @foo(i64 %b) nounwind readnone { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: shlq $56, %rdi ; CHECK: sarq $48, %rdi ; CHECK: leaq 1(%rdi), %rax diff --git a/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll index 80b8835..0268d81 100644 --- a/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll +++ b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -relocation-model=pic | FileCheck %s define void @dot(i16* nocapture %A, i32 %As, i16* nocapture %B, i32 %Bs, i16* nocapture %C, i32 %N) nounwind ssp { -; CHECK: dot: +; CHECK-LABEL: dot: ; CHECK: decl % ; CHECK-NEXT: jne entry: diff --git a/test/CodeGen/X86/2009-11-16-MachineLICM.ll b/test/CodeGen/X86/2009-11-16-MachineLICM.ll index 2ac688f..fedb2a5 100644 --- a/test/CodeGen/X86/2009-11-16-MachineLICM.ll +++ b/test/CodeGen/X86/2009-11-16-MachineLICM.ll @@ -5,7 +5,7 @@ define void @foo(i32 %n, float* nocapture %x) nounwind ssp { entry: -; CHECK: foo: +; CHECK-LABEL: foo: %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1] br i1 %0, label %bb.nph, label %return diff --git a/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll index c2d9d84..08a99e3 100644 --- a/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll +++ b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll @@ -5,7 +5,7 @@ define void @t(i32 %count) ssp nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movups L_str+12(%rip), %xmm0 ; CHECK: movups L_str(%rip), %xmm1 %tmp0 = alloca [60 x i8], align 1 diff --git a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll index 0700323..b166447 100644 --- a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll +++ b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll @@ -3,7 +3,7 @@ define void @t() nounwind ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movl %ecx, %eax ; CHECK: %eax = foo (%eax, %ecx) %b = alloca i32 ; <i32*> [#uses=2] @@ -21,7 +21,7 @@ return: ; preds = %entry define void @t2() nounwind ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: movl ; CHECK: [[D2:%e.x]] = foo ; CHECK: ([[D2]], diff --git a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll index 823e0ca..65b70a7 100644 --- a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll +++ b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll @@ -18,7 +18,7 @@ target triple = "x86_64-unknown-linux-gnu" @_dm_offset_addr_mask = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0] define void @leaf() nounwind { -; CHECK: leaf: +; CHECK-LABEL: leaf: ; CHECK-NOT: -8(%rsp) ; CHECK: leaq link_ptr@TLSGD ; CHECK: callq __tls_get_addr@PLT diff --git a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll index 3d058bc..f9bf310 100644 --- a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll +++ b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll @@ -6,7 +6,7 @@ define void @t(i64* nocapture %p) nounwind ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movl ([[REG:%[a-z]+]]), %eax ; CHECK: movl 4([[REG]]), %edx ; CHECK: LBB0_1: diff --git a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll index 6a58e9e..a8c87fa 100644 --- a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll +++ b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll @@ -2,7 +2,7 @@ define i32* @t() nounwind optsize ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: testl %eax, %eax ; CHECK: js %cmp = icmp slt i32 undef, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2010-04-08-CoalescerBug.ll b/test/CodeGen/X86/2010-04-08-CoalescerBug.ll index 9a5958e..5e86ecf 100644 --- a/test/CodeGen/X86/2010-04-08-CoalescerBug.ll +++ b/test/CodeGen/X86/2010-04-08-CoalescerBug.ll @@ -11,7 +11,7 @@ define void @t(%struct.F* %this) nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: addq $12, %rsi %BitValueArray = alloca [32 x i32], align 4 %tmp2 = getelementptr inbounds %struct.F* %this, i64 0, i32 0 diff --git a/test/CodeGen/X86/2010-07-29-SetccSimplify.ll b/test/CodeGen/X86/2010-07-29-SetccSimplify.ll index 96016cf..47e511f 100644 --- a/test/CodeGen/X86/2010-07-29-SetccSimplify.ll +++ b/test/CodeGen/X86/2010-07-29-SetccSimplify.ll @@ -9,6 +9,6 @@ entry: ret i32 %3 } -; CHECK: extend2bit_v2: +; CHECK-LABEL: extend2bit_v2: ; CHECK: xorl %eax, %eax ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll b/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll index 7632034..aea53b3 100644 --- a/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll +++ b/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll @@ -16,5 +16,5 @@ entry: %tmp10 = sext i8 %tmp9 to i32 ret i32 %tmp10 } -; CHECK: f: +; CHECK-LABEL: f: ; CHECK: movsbl -2147483647 diff --git a/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll b/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll index fcaabdd..df9823a 100644 --- a/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll +++ b/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll @@ -2,7 +2,7 @@ ; PR11494 define void @test(<4 x i32>* nocapture %p) nounwind { - ; CHECK: test: + ; CHECK-LABEL: test: ; CHECK: vpxor %xmm0, %xmm0, %xmm0 ; CHECK-NEXT: vpmaxsd {{.*}}, %xmm0, %xmm0 ; CHECK-NEXT: vmovdqu %xmm0, (%rdi) diff --git a/test/CodeGen/X86/2012-04-26-sdglue.ll b/test/CodeGen/X86/2012-04-26-sdglue.ll index 0465952..186fafb 100644 --- a/test/CodeGen/X86/2012-04-26-sdglue.ll +++ b/test/CodeGen/X86/2012-04-26-sdglue.ll @@ -4,7 +4,7 @@ ; It's hard to test for the ISEL condition because CodeGen optimizes ; away the bugpointed code. Just ensure the basics are still there. -;CHECK: func: +;CHECK-LABEL: func: ;CHECK: vxorps ;CHECK: vinsertf128 ;CHECK: vpshufd diff --git a/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll b/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll index 171c3f1..881fa37 100644 --- a/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll +++ b/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll @@ -6,7 +6,7 @@ ; rdar://11472010 define i32 @t(i32 %mask) nounwind readnone ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK-NOT: mov %sub = add i32 %mask, -65535 %shr = lshr i32 %sub, 23 diff --git a/test/CodeGen/X86/2012-08-07-CmpISelBug.ll b/test/CodeGen/X86/2012-08-07-CmpISelBug.ll index 000b853..eba970e 100644 --- a/test/CodeGen/X86/2012-08-07-CmpISelBug.ll +++ b/test/CodeGen/X86/2012-08-07-CmpISelBug.ll @@ -6,7 +6,7 @@ define void @foo(i8 %arg4, i32 %arg5, i32* %arg14) nounwind { bb: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: testl ; CHECK: testb %tmp48 = zext i8 %arg4 to i32 diff --git a/test/CodeGen/X86/2012-08-16-setcc.ll b/test/CodeGen/X86/2012-08-16-setcc.ll index ed51156..c03b923 100644 --- a/test/CodeGen/X86/2012-08-16-setcc.ll +++ b/test/CodeGen/X86/2012-08-16-setcc.ll @@ -2,7 +2,7 @@ ; rdar://12081007 -; CHECK: and_1: +; CHECK-LABEL: and_1: ; CHECK: andb ; CHECK-NEXT: cmovnel ; CHECK: ret @@ -13,7 +13,7 @@ define i32 @and_1(i8 zeroext %a, i8 zeroext %b, i32 %x) { ret i32 %3 } -; CHECK: and_2: +; CHECK-LABEL: and_2: ; CHECK: andb ; CHECK-NEXT: setne ; CHECK: ret @@ -23,7 +23,7 @@ define zeroext i1 @and_2(i8 zeroext %a, i8 zeroext %b) { ret i1 %2 } -; CHECK: xor_1: +; CHECK-LABEL: xor_1: ; CHECK: xorb ; CHECK-NEXT: cmovnel ; CHECK: ret @@ -34,7 +34,7 @@ define i32 @xor_1(i8 zeroext %a, i8 zeroext %b, i32 %x) { ret i32 %3 } -; CHECK: xor_2: +; CHECK-LABEL: xor_2: ; CHECK: xorb ; CHECK-NEXT: setne ; CHECK: ret diff --git a/test/CodeGen/X86/2012-08-17-legalizer-crash.ll b/test/CodeGen/X86/2012-08-17-legalizer-crash.ll index cb9fa2e..971e56d 100644 --- a/test/CodeGen/X86/2012-08-17-legalizer-crash.ll +++ b/test/CodeGen/X86/2012-08-17-legalizer-crash.ll @@ -25,7 +25,7 @@ if.then: ; preds = %entry if.end: ; preds = %if.then, %entry ret void -; CHECK: fn1: +; CHECK-LABEL: fn1: ; CHECK: shrq $32, [[REG:%.*]] ; CHECK: je } diff --git a/test/CodeGen/X86/3addr-16bit.ll b/test/CodeGen/X86/3addr-16bit.ll index c51247a..77c3c16 100644 --- a/test/CodeGen/X86/3addr-16bit.ll +++ b/test/CodeGen/X86/3addr-16bit.ll @@ -5,12 +5,12 @@ define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp { entry: -; 32BIT: t1: +; 32BIT-LABEL: t1: ; 32BIT: movw 20(%esp), %ax ; 32BIT-NOT: movw %ax, %cx ; 32BIT: leal 1(%eax), %ecx -; 64BIT: t1: +; 64BIT-LABEL: t1: ; 64BIT-NOT: movw %si, %ax ; 64BIT: leal 1(%rsi), %eax %0 = icmp eq i16 %k, %c ; <i1> [#uses=1] @@ -27,12 +27,12 @@ bb1: ; preds = %entry define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp { entry: -; 32BIT: t2: +; 32BIT-LABEL: t2: ; 32BIT: movw 20(%esp), %ax ; 32BIT-NOT: movw %ax, %cx ; 32BIT: leal -1(%eax), %ecx -; 64BIT: t2: +; 64BIT-LABEL: t2: ; 64BIT-NOT: movw %si, %ax ; 64BIT: leal -1(%rsi), %eax %0 = icmp eq i16 %k, %c ; <i1> [#uses=1] @@ -51,12 +51,12 @@ declare void @foo(i16 zeroext) define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp { entry: -; 32BIT: t3: +; 32BIT-LABEL: t3: ; 32BIT: movw 20(%esp), %ax ; 32BIT-NOT: movw %ax, %cx ; 32BIT: leal 2(%eax), %ecx -; 64BIT: t3: +; 64BIT-LABEL: t3: ; 64BIT-NOT: movw %si, %ax ; 64BIT: leal 2(%rsi), %eax %0 = add i16 %k, 2 ; <i16> [#uses=3] @@ -73,13 +73,13 @@ bb1: ; preds = %entry define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp { entry: -; 32BIT: t4: +; 32BIT-LABEL: t4: ; 32BIT: movw 16(%esp), %ax ; 32BIT: movw 20(%esp), %cx ; 32BIT-NOT: movw %cx, %dx ; 32BIT: leal (%ecx,%eax), %edx -; 64BIT: t4: +; 64BIT-LABEL: t4: ; 64BIT-NOT: movw %si, %ax ; 64BIT: leal (%rsi,%rdi), %eax %0 = add i16 %k, %c ; <i16> [#uses=3] diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll index 955fc62..3b84231 100644 --- a/test/CodeGen/X86/abi-isel.ll +++ b/test/CodeGen/X86/abi-isel.ll @@ -37,22 +37,22 @@ entry: store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 0), align 4 ret void -; LINUX-64-STATIC: foo00: +; LINUX-64-STATIC-LABEL: foo00: ; LINUX-64-STATIC: movl src(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo00: +; LINUX-32-STATIC-LABEL: foo00: ; LINUX-32-STATIC: movl src, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo00: +; LINUX-32-PIC-LABEL: foo00: ; LINUX-32-PIC: movl src, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dst ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo00: +; LINUX-64-PIC-LABEL: foo00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r..]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r..]] @@ -109,22 +109,22 @@ entry: store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 0), align 4 ret void -; LINUX-64-STATIC: fxo00: +; LINUX-64-STATIC-LABEL: fxo00: ; LINUX-64-STATIC: movl xsrc(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], xdst ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: fxo00: +; LINUX-32-STATIC-LABEL: fxo00: ; LINUX-32-STATIC: movl xsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], xdst ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: fxo00: +; LINUX-32-PIC-LABEL: fxo00: ; LINUX-32-PIC: movl xsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], xdst ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: fxo00: +; LINUX-64-PIC-LABEL: fxo00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -179,19 +179,19 @@ define void @foo01() nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i32 0), i32** @ptr, align 8 ret void -; LINUX-64-STATIC: foo01: +; LINUX-64-STATIC-LABEL: foo01: ; LINUX-64-STATIC: movq $dst, ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo01: +; LINUX-32-STATIC-LABEL: foo01: ; LINUX-32-STATIC: movl $dst, ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo01: +; LINUX-32-PIC-LABEL: foo01: ; LINUX-32-PIC: movl $dst, ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo01: +; LINUX-64-PIC-LABEL: foo01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], ([[RCX]]) @@ -239,19 +239,19 @@ define void @fxo01() nounwind { entry: store i32* getelementptr ([32 x i32]* @xdst, i32 0, i32 0), i32** @ptr, align 8 ret void -; LINUX-64-STATIC: fxo01: +; LINUX-64-STATIC-LABEL: fxo01: ; LINUX-64-STATIC: movq $xdst, ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: fxo01: +; LINUX-32-STATIC-LABEL: fxo01: ; LINUX-32-STATIC: movl $xdst, ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: fxo01: +; LINUX-32-PIC-LABEL: fxo01: ; LINUX-32-PIC: movl $xdst, ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: fxo01: +; LINUX-64-PIC-LABEL: fxo01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], ([[RCX]]) @@ -301,25 +301,25 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 ret void -; LINUX-64-STATIC: foo02: +; LINUX-64-STATIC-LABEL: foo02: ; LINUX-64-STATIC: movl src(%rip), % ; LINUX-64-STATIC: movq ptr(%rip), % ; LINUX-64-STATIC: movl ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo02: +; LINUX-32-STATIC-LABEL: foo02: ; LINUX-32-STATIC: movl src, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo02: +; LINUX-32-PIC-LABEL: foo02: ; LINUX-32-PIC: movl src, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo02: +; LINUX-64-PIC-LABEL: foo02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -382,26 +382,26 @@ entry: %0 = load i32** @ptr, align 8 %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 -; LINUX-64-STATIC: fxo02: +; LINUX-64-STATIC-LABEL: fxo02: ; LINUX-64-STATIC: movl xsrc(%rip), % ; LINUX-64-STATIC: movq ptr(%rip), % ; LINUX-64-STATIC: movl ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: fxo02: +; LINUX-32-STATIC-LABEL: fxo02: ; LINUX-32-STATIC: movl xsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-STATIC-NEXT: ret ret void -; LINUX-32-PIC: fxo02: +; LINUX-32-PIC-LABEL: fxo02: ; LINUX-32-PIC: movl xsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: fxo02: +; LINUX-64-PIC-LABEL: fxo02: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -464,22 +464,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 0), align 32 ret void -; LINUX-64-STATIC: foo03: +; LINUX-64-STATIC-LABEL: foo03: ; LINUX-64-STATIC: movl dsrc(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo03: +; LINUX-32-STATIC-LABEL: foo03: ; LINUX-32-STATIC: movl dsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ddst ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo03: +; LINUX-32-PIC-LABEL: foo03: ; LINUX-32-PIC: movl dsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ddst ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo03: +; LINUX-64-PIC-LABEL: foo03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -524,19 +524,19 @@ define void @foo04() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i32 0), i32** @dptr, align 8 ret void -; LINUX-64-STATIC: foo04: +; LINUX-64-STATIC-LABEL: foo04: ; LINUX-64-STATIC: movq $ddst, dptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo04: +; LINUX-32-STATIC-LABEL: foo04: ; LINUX-32-STATIC: movl $ddst, dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo04: +; LINUX-32-PIC-LABEL: foo04: ; LINUX-32-PIC: movl $ddst, dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo04: +; LINUX-64-PIC-LABEL: foo04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], ([[RCX]]) @@ -580,25 +580,25 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 store i32 %1, i32* %0, align 4 ret void -; LINUX-64-STATIC: foo05: +; LINUX-64-STATIC-LABEL: foo05: ; LINUX-64-STATIC: movl dsrc(%rip), % ; LINUX-64-STATIC: movq dptr(%rip), % ; LINUX-64-STATIC: movl ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo05: +; LINUX-32-STATIC-LABEL: foo05: ; LINUX-32-STATIC: movl dsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo05: +; LINUX-32-PIC-LABEL: foo05: ; LINUX-32-PIC: movl dsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo05: +; LINUX-64-PIC-LABEL: foo05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -651,22 +651,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 0), align 4 ret void -; LINUX-64-STATIC: foo06: +; LINUX-64-STATIC-LABEL: foo06: ; LINUX-64-STATIC: movl lsrc(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo06: +; LINUX-32-STATIC-LABEL: foo06: ; LINUX-32-STATIC: movl lsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ldst ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo06: +; LINUX-32-PIC-LABEL: foo06: ; LINUX-32-PIC: movl lsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ldst ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo06: +; LINUX-64-PIC-LABEL: foo06: ; LINUX-64-PIC: movl lsrc(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], ldst(%rip) ; LINUX-64-PIC-NEXT: ret @@ -709,19 +709,19 @@ define void @foo07() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i32 0), i32** @lptr, align 8 ret void -; LINUX-64-STATIC: foo07: +; LINUX-64-STATIC-LABEL: foo07: ; LINUX-64-STATIC: movq $ldst, lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo07: +; LINUX-32-STATIC-LABEL: foo07: ; LINUX-32-STATIC: movl $ldst, lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo07: +; LINUX-32-PIC-LABEL: foo07: ; LINUX-32-PIC: movl $ldst, lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo07: +; LINUX-64-PIC-LABEL: foo07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) ; LINUX-64-PIC-NEXT: ret @@ -764,25 +764,25 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 ret void -; LINUX-64-STATIC: foo08: +; LINUX-64-STATIC-LABEL: foo08: ; LINUX-64-STATIC: movl lsrc(%rip), % ; LINUX-64-STATIC: movq lptr(%rip), % ; LINUX-64-STATIC: movl ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: foo08: +; LINUX-32-STATIC-LABEL: foo08: ; LINUX-32-STATIC: movl lsrc, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: foo08: +; LINUX-32-PIC-LABEL: foo08: ; LINUX-32-PIC: movl lsrc, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: foo08: +; LINUX-64-PIC-LABEL: foo08: ; LINUX-64-PIC: movl lsrc(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]]) @@ -833,22 +833,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), align 4 ret void -; LINUX-64-STATIC: qux00: +; LINUX-64-STATIC-LABEL: qux00: ; LINUX-64-STATIC: movl src+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst+64(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux00: +; LINUX-32-STATIC-LABEL: qux00: ; LINUX-32-STATIC: movl src+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst+64 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux00: +; LINUX-32-PIC-LABEL: qux00: ; LINUX-32-PIC: movl src+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dst+64 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux00: +; LINUX-64-PIC-LABEL: qux00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -904,22 +904,22 @@ entry: %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), align 4 ret void -; LINUX-64-STATIC: qxx00: +; LINUX-64-STATIC-LABEL: qxx00: ; LINUX-64-STATIC: movl xsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], xdst+64(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qxx00: +; LINUX-32-STATIC-LABEL: qxx00: ; LINUX-32-STATIC: movl xsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], xdst+64 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qxx00: +; LINUX-32-PIC-LABEL: qxx00: ; LINUX-32-PIC: movl xsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], xdst+64 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qxx00: +; LINUX-64-PIC-LABEL: qxx00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -974,19 +974,19 @@ define void @qux01() nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), i32** @ptr, align 8 ret void -; LINUX-64-STATIC: qux01: +; LINUX-64-STATIC-LABEL: qux01: ; LINUX-64-STATIC: movq $dst+64, ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux01: +; LINUX-32-STATIC-LABEL: qux01: ; LINUX-32-STATIC: movl $dst+64, ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux01: +; LINUX-32-PIC-LABEL: qux01: ; LINUX-32-PIC: movl $dst+64, ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux01: +; LINUX-64-PIC-LABEL: qux01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: addq $64, [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1040,19 +1040,19 @@ define void @qxx01() nounwind { entry: store i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), i32** @ptr, align 8 ret void -; LINUX-64-STATIC: qxx01: +; LINUX-64-STATIC-LABEL: qxx01: ; LINUX-64-STATIC: movq $xdst+64, ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qxx01: +; LINUX-32-STATIC-LABEL: qxx01: ; LINUX-32-STATIC: movl $xdst+64, ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qxx01: +; LINUX-32-PIC-LABEL: qxx01: ; LINUX-32-PIC: movl $xdst+64, ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qxx01: +; LINUX-64-PIC-LABEL: qxx01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: addq $64, [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1108,26 +1108,26 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 -; LINUX-64-STATIC: qux02: +; LINUX-64-STATIC-LABEL: qux02: ; LINUX-64-STATIC: movl src+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux02: +; LINUX-32-STATIC-LABEL: qux02: ; LINUX-32-STATIC: movl src+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-STATIC-NEXT: ret ret void -; LINUX-32-PIC: qux02: +; LINUX-32-PIC-LABEL: qux02: ; LINUX-32-PIC: movl src+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux02: +; LINUX-64-PIC-LABEL: qux02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1191,26 +1191,26 @@ entry: %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 -; LINUX-64-STATIC: qxx02: +; LINUX-64-STATIC-LABEL: qxx02: ; LINUX-64-STATIC: movl xsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qxx02: +; LINUX-32-STATIC-LABEL: qxx02: ; LINUX-32-STATIC: movl xsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-STATIC-NEXT: ret ret void -; LINUX-32-PIC: qxx02: +; LINUX-32-PIC-LABEL: qxx02: ; LINUX-32-PIC: movl xsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qxx02: +; LINUX-64-PIC-LABEL: qxx02: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1273,22 +1273,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), align 32 ret void -; LINUX-64-STATIC: qux03: +; LINUX-64-STATIC-LABEL: qux03: ; LINUX-64-STATIC: movl dsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst+64(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux03: +; LINUX-32-STATIC-LABEL: qux03: ; LINUX-32-STATIC: movl dsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ddst+64 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux03: +; LINUX-32-PIC-LABEL: qux03: ; LINUX-32-PIC: movl dsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ddst+64 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux03: +; LINUX-64-PIC-LABEL: qux03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1333,19 +1333,19 @@ define void @qux04() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), i32** @dptr, align 8 ret void -; LINUX-64-STATIC: qux04: +; LINUX-64-STATIC-LABEL: qux04: ; LINUX-64-STATIC: movq $ddst+64, dptr(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux04: +; LINUX-32-STATIC-LABEL: qux04: ; LINUX-32-STATIC: movl $ddst+64, dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux04: +; LINUX-32-PIC-LABEL: qux04: ; LINUX-32-PIC: movl $ddst+64, dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux04: +; LINUX-64-PIC-LABEL: qux04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: addq $64, [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1390,26 +1390,26 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 -; LINUX-64-STATIC: qux05: +; LINUX-64-STATIC-LABEL: qux05: ; LINUX-64-STATIC: movl dsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq dptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux05: +; LINUX-32-STATIC-LABEL: qux05: ; LINUX-32-STATIC: movl dsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-STATIC-NEXT: ret ret void -; LINUX-32-PIC: qux05: +; LINUX-32-PIC-LABEL: qux05: ; LINUX-32-PIC: movl dsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux05: +; LINUX-64-PIC-LABEL: qux05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1462,22 +1462,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), align 4 ret void -; LINUX-64-STATIC: qux06: +; LINUX-64-STATIC-LABEL: qux06: ; LINUX-64-STATIC: movl lsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst+64 ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux06: +; LINUX-32-STATIC-LABEL: qux06: ; LINUX-32-STATIC: movl lsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ldst+64 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux06: +; LINUX-32-PIC-LABEL: qux06: ; LINUX-32-PIC: movl lsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ldst+64 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux06: +; LINUX-64-PIC-LABEL: qux06: ; LINUX-64-PIC: movl lsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], ldst+64(%rip) ; LINUX-64-PIC-NEXT: ret @@ -1520,19 +1520,19 @@ define void @qux07() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), i32** @lptr, align 8 ret void -; LINUX-64-STATIC: qux07: +; LINUX-64-STATIC-LABEL: qux07: ; LINUX-64-STATIC: movq $ldst+64, lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux07: +; LINUX-32-STATIC-LABEL: qux07: ; LINUX-32-STATIC: movl $ldst+64, lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: qux07: +; LINUX-32-PIC-LABEL: qux07: ; LINUX-32-PIC: movl $ldst+64, lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux07: +; LINUX-64-PIC-LABEL: qux07: ; LINUX-64-PIC: leaq ldst+64(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) ; LINUX-64-PIC-NEXT: ret @@ -1575,26 +1575,26 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 -; LINUX-64-STATIC: qux08: +; LINUX-64-STATIC-LABEL: qux08: ; LINUX-64-STATIC: movl lsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: qux08: +; LINUX-32-STATIC-LABEL: qux08: ; LINUX-32-STATIC: movl lsrc+64, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-STATIC-NEXT: ret ret void -; LINUX-32-PIC: qux08: +; LINUX-32-PIC-LABEL: qux08: ; LINUX-32-PIC: movl lsrc+64, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 64([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: qux08: +; LINUX-64-PIC-LABEL: qux08: ; LINUX-64-PIC: movl lsrc+64(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], 64([[RCX]]) @@ -1647,24 +1647,24 @@ entry: %2 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: ind00: +; LINUX-64-STATIC-LABEL: ind00: ; LINUX-64-STATIC: movl src(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind00: +; LINUX-32-STATIC-LABEL: ind00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], dst(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind00: +; LINUX-32-PIC-LABEL: ind00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], dst(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind00: +; LINUX-64-PIC-LABEL: ind00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1725,24 +1725,24 @@ entry: %2 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: ixd00: +; LINUX-64-STATIC-LABEL: ixd00: ; LINUX-64-STATIC: movl xsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], xdst(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ixd00: +; LINUX-32-STATIC-LABEL: ixd00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl xsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], xdst(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ixd00: +; LINUX-32-PIC-LABEL: ixd00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl xsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], xdst(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ixd00: +; LINUX-64-PIC-LABEL: ixd00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -1801,24 +1801,24 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i store i32* %0, i32** @ptr, align 8 ret void -; LINUX-64-STATIC: ind01: +; LINUX-64-STATIC-LABEL: ind01: ; LINUX-64-STATIC: leaq dst(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind01: +; LINUX-32-STATIC-LABEL: ind01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind01: +; LINUX-32-PIC-LABEL: ind01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind01: +; LINUX-64-PIC-LABEL: ind01: ; LINUX-64-PIC: shlq $2, %rdi ; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rdi ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] @@ -1877,24 +1877,24 @@ entry: %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i store i32* %0, i32** @ptr, align 8 ret void -; LINUX-64-STATIC: ixd01: +; LINUX-64-STATIC-LABEL: ixd01: ; LINUX-64-STATIC: leaq xdst(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ixd01: +; LINUX-32-STATIC-LABEL: ixd01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal xdst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ixd01: +; LINUX-32-PIC-LABEL: ixd01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xdst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ixd01: +; LINUX-64-PIC-LABEL: ixd01: ; LINUX-64-PIC: shlq $2, %rdi ; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rdi ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] @@ -1956,27 +1956,27 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: ind02: +; LINUX-64-STATIC-LABEL: ind02: ; LINUX-64-STATIC: movl src(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], ([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind02: +; LINUX-32-STATIC-LABEL: ind02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind02: +; LINUX-32-PIC-LABEL: ind02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind02: +; LINUX-64-PIC-LABEL: ind02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2045,27 +2045,27 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: ixd02: +; LINUX-64-STATIC-LABEL: ixd02: ; LINUX-64-STATIC: movl xsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], ([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ixd02: +; LINUX-32-STATIC-LABEL: ixd02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl xsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ixd02: +; LINUX-32-PIC-LABEL: ixd02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl xsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ixd02: +; LINUX-64-PIC-LABEL: ixd02: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2133,24 +2133,24 @@ entry: %2 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: ind03: +; LINUX-64-STATIC-LABEL: ind03: ; LINUX-64-STATIC: movl dsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind03: +; LINUX-32-STATIC-LABEL: ind03: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ddst(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind03: +; LINUX-32-PIC-LABEL: ind03: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ddst(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind03: +; LINUX-64-PIC-LABEL: ind03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2205,24 +2205,24 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i store i32* %0, i32** @dptr, align 8 ret void -; LINUX-64-STATIC: ind04: +; LINUX-64-STATIC-LABEL: ind04: ; LINUX-64-STATIC: leaq ddst(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], dptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind04: +; LINUX-32-STATIC-LABEL: ind04: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ddst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind04: +; LINUX-32-PIC-LABEL: ind04: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ddst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind04: +; LINUX-64-PIC-LABEL: ind04: ; LINUX-64-PIC: shlq $2, %rdi ; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rdi ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RAX:%r.x]] @@ -2277,27 +2277,27 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: ind05: +; LINUX-64-STATIC-LABEL: ind05: ; LINUX-64-STATIC: movl dsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq dptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], ([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind05: +; LINUX-32-STATIC-LABEL: ind05: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind05: +; LINUX-32-PIC-LABEL: ind05: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind05: +; LINUX-64-PIC-LABEL: ind05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2358,24 +2358,24 @@ entry: %2 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: ind06: +; LINUX-64-STATIC-LABEL: ind06: ; LINUX-64-STATIC: movl lsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind06: +; LINUX-32-STATIC-LABEL: ind06: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ldst(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind06: +; LINUX-32-PIC-LABEL: ind06: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ldst(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind06: +; LINUX-64-PIC-LABEL: ind06: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: leaq ldst(%rip), [[RCX:%r.x]] @@ -2430,24 +2430,24 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i store i32* %0, i32** @lptr, align 8 ret void -; LINUX-64-STATIC: ind07: +; LINUX-64-STATIC-LABEL: ind07: ; LINUX-64-STATIC: leaq ldst(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind07: +; LINUX-32-STATIC-LABEL: ind07: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ldst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind07: +; LINUX-32-PIC-LABEL: ind07: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ldst(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind07: +; LINUX-64-PIC-LABEL: ind07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq ([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) @@ -2501,27 +2501,27 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: ind08: +; LINUX-64-STATIC-LABEL: ind08: ; LINUX-64-STATIC: movl lsrc(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], ([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ind08: +; LINUX-32-STATIC-LABEL: ind08: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ind08: +; LINUX-32-PIC-LABEL: ind08: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ind08: +; LINUX-64-PIC-LABEL: ind08: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl ([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] @@ -2582,24 +2582,24 @@ entry: %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: off00: +; LINUX-64-STATIC-LABEL: off00: ; LINUX-64-STATIC: movl src+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst+64(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off00: +; LINUX-32-STATIC-LABEL: off00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], dst+64(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off00: +; LINUX-32-PIC-LABEL: off00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], dst+64(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off00: +; LINUX-64-PIC-LABEL: off00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2661,24 +2661,24 @@ entry: %3 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: oxf00: +; LINUX-64-STATIC-LABEL: oxf00: ; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], xdst+64(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: oxf00: +; LINUX-32-STATIC-LABEL: oxf00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl xsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], xdst+64(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: oxf00: +; LINUX-32-PIC-LABEL: oxf00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl xsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], xdst+64(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: oxf00: +; LINUX-64-PIC-LABEL: oxf00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2738,24 +2738,24 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void -; LINUX-64-STATIC: off01: +; LINUX-64-STATIC-LABEL: off01: ; LINUX-64-STATIC: leaq dst+64(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off01: +; LINUX-32-STATIC-LABEL: off01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off01: +; LINUX-32-PIC-LABEL: off01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off01: +; LINUX-64-PIC-LABEL: off01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2815,24 +2815,24 @@ entry: %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void -; LINUX-64-STATIC: oxf01: +; LINUX-64-STATIC-LABEL: oxf01: ; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], ptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: oxf01: +; LINUX-32-STATIC-LABEL: oxf01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal xdst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: oxf01: +; LINUX-32-PIC-LABEL: oxf01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xdst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: oxf01: +; LINUX-64-PIC-LABEL: oxf01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2895,27 +2895,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: off02: +; LINUX-64-STATIC-LABEL: off02: ; LINUX-64-STATIC: movl src+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off02: +; LINUX-32-STATIC-LABEL: off02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off02: +; LINUX-32-PIC-LABEL: off02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off02: +; LINUX-64-PIC-LABEL: off02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -2985,27 +2985,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: oxf02: +; LINUX-64-STATIC-LABEL: oxf02: ; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: oxf02: +; LINUX-32-STATIC-LABEL: oxf02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl xsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: oxf02: +; LINUX-32-PIC-LABEL: oxf02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl xsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: oxf02: +; LINUX-64-PIC-LABEL: oxf02: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3074,24 +3074,24 @@ entry: %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: off03: +; LINUX-64-STATIC-LABEL: off03: ; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst+64(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off03: +; LINUX-32-STATIC-LABEL: off03: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ddst+64(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off03: +; LINUX-32-PIC-LABEL: off03: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ddst+64(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off03: +; LINUX-64-PIC-LABEL: off03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3147,24 +3147,24 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum store i32* %0, i32** @dptr, align 8 ret void -; LINUX-64-STATIC: off04: +; LINUX-64-STATIC-LABEL: off04: ; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], dptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off04: +; LINUX-32-STATIC-LABEL: off04: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ddst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off04: +; LINUX-32-PIC-LABEL: off04: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ddst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off04: +; LINUX-64-PIC-LABEL: off04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3220,27 +3220,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: off05: +; LINUX-64-STATIC-LABEL: off05: ; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq dptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off05: +; LINUX-32-STATIC-LABEL: off05: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off05: +; LINUX-32-PIC-LABEL: off05: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off05: +; LINUX-64-PIC-LABEL: off05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3302,24 +3302,24 @@ entry: %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: off06: +; LINUX-64-STATIC-LABEL: off06: ; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst+64(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off06: +; LINUX-32-STATIC-LABEL: off06: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ldst+64(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off06: +; LINUX-32-PIC-LABEL: off06: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ldst+64(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off06: +; LINUX-64-PIC-LABEL: off06: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: leaq ldst(%rip), [[RCX:%r.x]] @@ -3375,24 +3375,24 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum store i32* %0, i32** @lptr, align 8 ret void -; LINUX-64-STATIC: off07: +; LINUX-64-STATIC-LABEL: off07: ; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off07: +; LINUX-32-STATIC-LABEL: off07: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ldst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off07: +; LINUX-32-PIC-LABEL: off07: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ldst+64(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off07: +; LINUX-64-PIC-LABEL: off07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) @@ -3447,27 +3447,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: off08: +; LINUX-64-STATIC-LABEL: off08: ; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 64([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: off08: +; LINUX-32-STATIC-LABEL: off08: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: off08: +; LINUX-32-PIC-LABEL: off08: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc+64(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 64([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: off08: +; LINUX-64-PIC-LABEL: off08: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 64([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] @@ -3525,22 +3525,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), align 4 ret void -; LINUX-64-STATIC: moo00: +; LINUX-64-STATIC-LABEL: moo00: ; LINUX-64-STATIC: movl src+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst+262144(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo00: +; LINUX-32-STATIC-LABEL: moo00: ; LINUX-32-STATIC: movl src+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst+262144 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo00: +; LINUX-32-PIC-LABEL: moo00: ; LINUX-32-PIC: movl src+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dst+262144 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo00: +; LINUX-64-PIC-LABEL: moo00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3595,19 +3595,19 @@ define void @moo01(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), i32** @ptr, align 8 ret void -; LINUX-64-STATIC: moo01: +; LINUX-64-STATIC-LABEL: moo01: ; LINUX-64-STATIC: movq $dst+262144, ptr(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo01: +; LINUX-32-STATIC-LABEL: moo01: ; LINUX-32-STATIC: movl $dst+262144, ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo01: +; LINUX-32-PIC-LABEL: moo01: ; LINUX-32-PIC: movl $dst+262144, ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo01: +; LINUX-64-PIC-LABEL: moo01: ; LINUX-64-PIC: movl $262144, [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3664,25 +3664,25 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: moo02: +; LINUX-64-STATIC-LABEL: moo02: ; LINUX-64-STATIC: movl src+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo02: +; LINUX-32-STATIC-LABEL: moo02: ; LINUX-32-STATIC: movl src+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo02: +; LINUX-32-PIC-LABEL: moo02: ; LINUX-32-PIC: movl src+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo02: +; LINUX-64-PIC-LABEL: moo02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3745,22 +3745,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), align 32 ret void -; LINUX-64-STATIC: moo03: +; LINUX-64-STATIC-LABEL: moo03: ; LINUX-64-STATIC: movl dsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst+262144(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo03: +; LINUX-32-STATIC-LABEL: moo03: ; LINUX-32-STATIC: movl dsrc+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ddst+262144 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo03: +; LINUX-32-PIC-LABEL: moo03: ; LINUX-32-PIC: movl dsrc+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ddst+262144 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo03: +; LINUX-64-PIC-LABEL: moo03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3805,19 +3805,19 @@ define void @moo04(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), i32** @dptr, align 8 ret void -; LINUX-64-STATIC: moo04: +; LINUX-64-STATIC-LABEL: moo04: ; LINUX-64-STATIC: movq $ddst+262144, dptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo04: +; LINUX-32-STATIC-LABEL: moo04: ; LINUX-32-STATIC: movl $ddst+262144, dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo04: +; LINUX-32-PIC-LABEL: moo04: ; LINUX-32-PIC: movl $ddst+262144, dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo04: +; LINUX-64-PIC-LABEL: moo04: ; LINUX-64-PIC: movl $262144, [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3863,25 +3863,25 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: moo05: +; LINUX-64-STATIC-LABEL: moo05: ; LINUX-64-STATIC: movl dsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq dptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo05: +; LINUX-32-STATIC-LABEL: moo05: ; LINUX-32-STATIC: movl dsrc+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo05: +; LINUX-32-PIC-LABEL: moo05: ; LINUX-32-PIC: movl dsrc+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo05: +; LINUX-64-PIC-LABEL: moo05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]]), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -3934,22 +3934,22 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), align 4 ret void -; LINUX-64-STATIC: moo06: +; LINUX-64-STATIC-LABEL: moo06: ; LINUX-64-STATIC: movl lsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst+262144(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo06: +; LINUX-32-STATIC-LABEL: moo06: ; LINUX-32-STATIC: movl lsrc+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ldst+262144 ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo06: +; LINUX-32-PIC-LABEL: moo06: ; LINUX-32-PIC: movl lsrc+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ldst+262144 ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo06: +; LINUX-64-PIC-LABEL: moo06: ; LINUX-64-PIC: movl lsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], ldst+262144(%rip) ; LINUX-64-PIC-NEXT: ret @@ -3992,19 +3992,19 @@ define void @moo07(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), i32** @lptr, align 8 ret void -; LINUX-64-STATIC: moo07: +; LINUX-64-STATIC-LABEL: moo07: ; LINUX-64-STATIC: movq $ldst+262144, lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo07: +; LINUX-32-STATIC-LABEL: moo07: ; LINUX-32-STATIC: movl $ldst+262144, lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo07: +; LINUX-32-PIC-LABEL: moo07: ; LINUX-32-PIC: movl $ldst+262144, lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo07: +; LINUX-64-PIC-LABEL: moo07: ; LINUX-64-PIC: leaq ldst+262144(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) ; LINUX-64-PIC-NEXT: ret @@ -4048,25 +4048,25 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void -; LINUX-64-STATIC: moo08: +; LINUX-64-STATIC-LABEL: moo08: ; LINUX-64-STATIC: movl lsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-STATIC: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]]) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: moo08: +; LINUX-32-STATIC-LABEL: moo08: ; LINUX-32-STATIC: movl lsrc+262144, [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: moo08: +; LINUX-32-PIC-LABEL: moo08: ; LINUX-32-PIC: movl lsrc+262144, [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], 262144([[ECX]]) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: moo08: +; LINUX-64-PIC-LABEL: moo08: ; LINUX-64-PIC: movl lsrc+262144(%rip), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: movl [[EAX]], 262144([[RCX]]) @@ -4120,24 +4120,24 @@ entry: %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: big00: +; LINUX-64-STATIC-LABEL: big00: ; LINUX-64-STATIC: movl src+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], dst+262144(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big00: +; LINUX-32-STATIC-LABEL: big00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], dst+262144(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big00: +; LINUX-32-PIC-LABEL: big00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], dst+262144(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big00: +; LINUX-64-PIC-LABEL: big00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4197,24 +4197,24 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void -; LINUX-64-STATIC: big01: +; LINUX-64-STATIC-LABEL: big01: ; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], ptr(%rip) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big01: +; LINUX-32-STATIC-LABEL: big01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], ptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big01: +; LINUX-32-PIC-LABEL: big01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], ptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big01: +; LINUX-64-PIC-LABEL: big01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4277,27 +4277,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: big02: +; LINUX-64-STATIC-LABEL: big02: ; LINUX-64-STATIC: movl src+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq ptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big02: +; LINUX-32-STATIC-LABEL: big02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl src+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big02: +; LINUX-32-PIC-LABEL: big02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl src+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big02: +; LINUX-64-PIC-LABEL: big02: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4366,24 +4366,24 @@ entry: %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: big03: +; LINUX-64-STATIC-LABEL: big03: ; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ddst+262144(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big03: +; LINUX-32-STATIC-LABEL: big03: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ddst+262144(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big03: +; LINUX-32-PIC-LABEL: big03: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ddst+262144(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big03: +; LINUX-64-PIC-LABEL: big03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4439,24 +4439,24 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum store i32* %0, i32** @dptr, align 8 ret void -; LINUX-64-STATIC: big04: +; LINUX-64-STATIC-LABEL: big04: ; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], dptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big04: +; LINUX-32-STATIC-LABEL: big04: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ddst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], dptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big04: +; LINUX-32-PIC-LABEL: big04: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ddst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], dptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big04: +; LINUX-64-PIC-LABEL: big04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4512,27 +4512,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: big05: +; LINUX-64-STATIC-LABEL: big05: ; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq dptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big05: +; LINUX-32-STATIC-LABEL: big05: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big05: +; LINUX-32-PIC-LABEL: big05: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big05: +; LINUX-64-PIC-LABEL: big05: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] @@ -4594,24 +4594,24 @@ entry: %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void -; LINUX-64-STATIC: big06: +; LINUX-64-STATIC-LABEL: big06: ; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movl [[EAX]], ldst+262144(,%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big06: +; LINUX-32-STATIC-LABEL: big06: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], ldst+262144(,[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big06: +; LINUX-32-PIC-LABEL: big06: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], ldst+262144(,[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big06: +; LINUX-64-PIC-LABEL: big06: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: leaq ldst(%rip), [[RCX:%r.x]] @@ -4667,24 +4667,24 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum store i32* %0, i32** @lptr, align 8 ret void -; LINUX-64-STATIC: big07: +; LINUX-64-STATIC-LABEL: big07: ; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), [[RAX:%r.x]] ; LINUX-64-STATIC: movq [[RAX]], lptr ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big07: +; LINUX-32-STATIC-LABEL: big07: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ldst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[EAX]], lptr ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big07: +; LINUX-32-PIC-LABEL: big07: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ldst+262144(,[[EAX]],4), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[EAX]], lptr ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big07: +; LINUX-64-PIC-LABEL: big07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq [[RAX]], lptr(%rip) @@ -4739,27 +4739,27 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void -; LINUX-64-STATIC: big08: +; LINUX-64-STATIC-LABEL: big08: ; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), [[EAX:%e.x]] ; LINUX-64-STATIC: movq lptr(%rip), [[RCX:%r.x]] ; LINUX-64-STATIC: movl [[EAX]], 262144([[RCX]],%rdi,4) ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: big08: +; LINUX-32-STATIC-LABEL: big08: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-STATIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: big08: +; LINUX-32-PIC-LABEL: big08: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lsrc+262144(,[[EAX]],4), [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[EDX:%e.x]] ; LINUX-32-PIC-NEXT: movl [[ECX]], 262144([[EDX]],[[EAX]],4) ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: big08: +; LINUX-64-PIC-LABEL: big08: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movl 262144([[RAX]],%rdi,4), [[EAX:%e.x]] ; LINUX-64-PIC-NEXT: movq lptr(%rip), [[RCX:%r.x]] @@ -4815,19 +4815,19 @@ entry: define i8* @bar00() nounwind { entry: ret i8* bitcast ([131072 x i32]* @src to i8*) -; LINUX-64-STATIC: bar00: +; LINUX-64-STATIC-LABEL: bar00: ; LINUX-64-STATIC: movl $src, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar00: +; LINUX-32-STATIC-LABEL: bar00: ; LINUX-32-STATIC: movl $src, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar00: +; LINUX-32-PIC-LABEL: bar00: ; LINUX-32-PIC: movl $src, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar00: +; LINUX-64-PIC-LABEL: bar00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -4862,19 +4862,19 @@ entry: define i8* @bxr00() nounwind { entry: ret i8* bitcast ([32 x i32]* @xsrc to i8*) -; LINUX-64-STATIC: bxr00: +; LINUX-64-STATIC-LABEL: bxr00: ; LINUX-64-STATIC: movl $xsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bxr00: +; LINUX-32-STATIC-LABEL: bxr00: ; LINUX-32-STATIC: movl $xsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bxr00: +; LINUX-32-PIC-LABEL: bxr00: ; LINUX-32-PIC: movl $xsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bxr00: +; LINUX-64-PIC-LABEL: bxr00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -4909,19 +4909,19 @@ entry: define i8* @bar01() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dst to i8*) -; LINUX-64-STATIC: bar01: +; LINUX-64-STATIC-LABEL: bar01: ; LINUX-64-STATIC: movl $dst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar01: +; LINUX-32-STATIC-LABEL: bar01: ; LINUX-32-STATIC: movl $dst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar01: +; LINUX-32-PIC-LABEL: bar01: ; LINUX-32-PIC: movl $dst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar01: +; LINUX-64-PIC-LABEL: bar01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -4956,19 +4956,19 @@ entry: define i8* @bxr01() nounwind { entry: ret i8* bitcast ([32 x i32]* @xdst to i8*) -; LINUX-64-STATIC: bxr01: +; LINUX-64-STATIC-LABEL: bxr01: ; LINUX-64-STATIC: movl $xdst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bxr01: +; LINUX-32-STATIC-LABEL: bxr01: ; LINUX-32-STATIC: movl $xdst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bxr01: +; LINUX-32-PIC-LABEL: bxr01: ; LINUX-32-PIC: movl $xdst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bxr01: +; LINUX-64-PIC-LABEL: bxr01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5003,19 +5003,19 @@ entry: define i8* @bar02() nounwind { entry: ret i8* bitcast (i32** @ptr to i8*) -; LINUX-64-STATIC: bar02: +; LINUX-64-STATIC-LABEL: bar02: ; LINUX-64-STATIC: movl $ptr, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar02: +; LINUX-32-STATIC-LABEL: bar02: ; LINUX-32-STATIC: movl $ptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar02: +; LINUX-32-PIC-LABEL: bar02: ; LINUX-32-PIC: movl $ptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar02: +; LINUX-64-PIC-LABEL: bar02: ; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5050,19 +5050,19 @@ entry: define i8* @bar03() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dsrc to i8*) -; LINUX-64-STATIC: bar03: +; LINUX-64-STATIC-LABEL: bar03: ; LINUX-64-STATIC: movl $dsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar03: +; LINUX-32-STATIC-LABEL: bar03: ; LINUX-32-STATIC: movl $dsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar03: +; LINUX-32-PIC-LABEL: bar03: ; LINUX-32-PIC: movl $dsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar03: +; LINUX-64-PIC-LABEL: bar03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5097,19 +5097,19 @@ entry: define i8* @bar04() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ddst to i8*) -; LINUX-64-STATIC: bar04: +; LINUX-64-STATIC-LABEL: bar04: ; LINUX-64-STATIC: movl $ddst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar04: +; LINUX-32-STATIC-LABEL: bar04: ; LINUX-32-STATIC: movl $ddst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar04: +; LINUX-32-PIC-LABEL: bar04: ; LINUX-32-PIC: movl $ddst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar04: +; LINUX-64-PIC-LABEL: bar04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5144,19 +5144,19 @@ entry: define i8* @bar05() nounwind { entry: ret i8* bitcast (i32** @dptr to i8*) -; LINUX-64-STATIC: bar05: +; LINUX-64-STATIC-LABEL: bar05: ; LINUX-64-STATIC: movl $dptr, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar05: +; LINUX-32-STATIC-LABEL: bar05: ; LINUX-32-STATIC: movl $dptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar05: +; LINUX-32-PIC-LABEL: bar05: ; LINUX-32-PIC: movl $dptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar05: +; LINUX-64-PIC-LABEL: bar05: ; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5191,19 +5191,19 @@ entry: define i8* @bar06() nounwind { entry: ret i8* bitcast ([131072 x i32]* @lsrc to i8*) -; LINUX-64-STATIC: bar06: +; LINUX-64-STATIC-LABEL: bar06: ; LINUX-64-STATIC: movl $lsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar06: +; LINUX-32-STATIC-LABEL: bar06: ; LINUX-32-STATIC: movl $lsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar06: +; LINUX-32-PIC-LABEL: bar06: ; LINUX-32-PIC: movl $lsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar06: +; LINUX-64-PIC-LABEL: bar06: ; LINUX-64-PIC: leaq lsrc(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5238,19 +5238,19 @@ entry: define i8* @bar07() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ldst to i8*) -; LINUX-64-STATIC: bar07: +; LINUX-64-STATIC-LABEL: bar07: ; LINUX-64-STATIC: movl $ldst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar07: +; LINUX-32-STATIC-LABEL: bar07: ; LINUX-32-STATIC: movl $ldst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar07: +; LINUX-32-PIC-LABEL: bar07: ; LINUX-32-PIC: movl $ldst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar07: +; LINUX-64-PIC-LABEL: bar07: ; LINUX-64-PIC: leaq ldst(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5285,19 +5285,19 @@ entry: define i8* @bar08() nounwind { entry: ret i8* bitcast (i32** @lptr to i8*) -; LINUX-64-STATIC: bar08: +; LINUX-64-STATIC-LABEL: bar08: ; LINUX-64-STATIC: movl $lptr, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bar08: +; LINUX-32-STATIC-LABEL: bar08: ; LINUX-32-STATIC: movl $lptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bar08: +; LINUX-32-PIC-LABEL: bar08: ; LINUX-32-PIC: movl $lptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bar08: +; LINUX-64-PIC-LABEL: bar08: ; LINUX-64-PIC: leaq lptr(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5332,19 +5332,19 @@ entry: define i8* @har00() nounwind { entry: ret i8* bitcast ([131072 x i32]* @src to i8*) -; LINUX-64-STATIC: har00: +; LINUX-64-STATIC-LABEL: har00: ; LINUX-64-STATIC: movl $src, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har00: +; LINUX-32-STATIC-LABEL: har00: ; LINUX-32-STATIC: movl $src, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har00: +; LINUX-32-PIC-LABEL: har00: ; LINUX-32-PIC: movl $src, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har00: +; LINUX-64-PIC-LABEL: har00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5379,19 +5379,19 @@ entry: define i8* @hxr00() nounwind { entry: ret i8* bitcast ([32 x i32]* @xsrc to i8*) -; LINUX-64-STATIC: hxr00: +; LINUX-64-STATIC-LABEL: hxr00: ; LINUX-64-STATIC: movl $xsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: hxr00: +; LINUX-32-STATIC-LABEL: hxr00: ; LINUX-32-STATIC: movl $xsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: hxr00: +; LINUX-32-PIC-LABEL: hxr00: ; LINUX-32-PIC: movl $xsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: hxr00: +; LINUX-64-PIC-LABEL: hxr00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5426,19 +5426,19 @@ entry: define i8* @har01() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dst to i8*) -; LINUX-64-STATIC: har01: +; LINUX-64-STATIC-LABEL: har01: ; LINUX-64-STATIC: movl $dst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har01: +; LINUX-32-STATIC-LABEL: har01: ; LINUX-32-STATIC: movl $dst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har01: +; LINUX-32-PIC-LABEL: har01: ; LINUX-32-PIC: movl $dst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har01: +; LINUX-64-PIC-LABEL: har01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5473,19 +5473,19 @@ entry: define i8* @hxr01() nounwind { entry: ret i8* bitcast ([32 x i32]* @xdst to i8*) -; LINUX-64-STATIC: hxr01: +; LINUX-64-STATIC-LABEL: hxr01: ; LINUX-64-STATIC: movl $xdst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: hxr01: +; LINUX-32-STATIC-LABEL: hxr01: ; LINUX-32-STATIC: movl $xdst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: hxr01: +; LINUX-32-PIC-LABEL: hxr01: ; LINUX-32-PIC: movl $xdst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: hxr01: +; LINUX-64-PIC-LABEL: hxr01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5522,19 +5522,19 @@ entry: %0 = load i32** @ptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 -; LINUX-64-STATIC: har02: +; LINUX-64-STATIC-LABEL: har02: ; LINUX-64-STATIC: movq ptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har02: +; LINUX-32-STATIC-LABEL: har02: ; LINUX-32-STATIC: movl ptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har02: +; LINUX-32-PIC-LABEL: har02: ; LINUX-32-PIC: movl ptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har02: +; LINUX-64-PIC-LABEL: har02: ; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), %rax ; LINUX-64-PIC-NEXT: ret @@ -5575,19 +5575,19 @@ entry: define i8* @har03() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dsrc to i8*) -; LINUX-64-STATIC: har03: +; LINUX-64-STATIC-LABEL: har03: ; LINUX-64-STATIC: movl $dsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har03: +; LINUX-32-STATIC-LABEL: har03: ; LINUX-32-STATIC: movl $dsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har03: +; LINUX-32-PIC-LABEL: har03: ; LINUX-32-PIC: movl $dsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har03: +; LINUX-64-PIC-LABEL: har03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5622,19 +5622,19 @@ entry: define i8* @har04() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ddst to i8*) -; LINUX-64-STATIC: har04: +; LINUX-64-STATIC-LABEL: har04: ; LINUX-64-STATIC: movl $ddst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har04: +; LINUX-32-STATIC-LABEL: har04: ; LINUX-32-STATIC: movl $ddst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har04: +; LINUX-32-PIC-LABEL: har04: ; LINUX-32-PIC: movl $ddst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har04: +; LINUX-64-PIC-LABEL: har04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5671,19 +5671,19 @@ entry: %0 = load i32** @dptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 -; LINUX-64-STATIC: har05: +; LINUX-64-STATIC-LABEL: har05: ; LINUX-64-STATIC: movq dptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har05: +; LINUX-32-STATIC-LABEL: har05: ; LINUX-32-STATIC: movl dptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har05: +; LINUX-32-PIC-LABEL: har05: ; LINUX-32-PIC: movl dptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har05: +; LINUX-64-PIC-LABEL: har05: ; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), %rax ; LINUX-64-PIC-NEXT: ret @@ -5719,19 +5719,19 @@ entry: define i8* @har06() nounwind { entry: ret i8* bitcast ([131072 x i32]* @lsrc to i8*) -; LINUX-64-STATIC: har06: +; LINUX-64-STATIC-LABEL: har06: ; LINUX-64-STATIC: movl $lsrc, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har06: +; LINUX-32-STATIC-LABEL: har06: ; LINUX-32-STATIC: movl $lsrc, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har06: +; LINUX-32-PIC-LABEL: har06: ; LINUX-32-PIC: movl $lsrc, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har06: +; LINUX-64-PIC-LABEL: har06: ; LINUX-64-PIC: leaq lsrc(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5766,19 +5766,19 @@ entry: define i8* @har07() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ldst to i8*) -; LINUX-64-STATIC: har07: +; LINUX-64-STATIC-LABEL: har07: ; LINUX-64-STATIC: movl $ldst, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har07: +; LINUX-32-STATIC-LABEL: har07: ; LINUX-32-STATIC: movl $ldst, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har07: +; LINUX-32-PIC-LABEL: har07: ; LINUX-32-PIC: movl $ldst, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har07: +; LINUX-64-PIC-LABEL: har07: ; LINUX-64-PIC: leaq ldst(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5815,19 +5815,19 @@ entry: %0 = load i32** @lptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 -; LINUX-64-STATIC: har08: +; LINUX-64-STATIC-LABEL: har08: ; LINUX-64-STATIC: movq lptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: har08: +; LINUX-32-STATIC-LABEL: har08: ; LINUX-32-STATIC: movl lptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: har08: +; LINUX-32-PIC-LABEL: har08: ; LINUX-32-PIC: movl lptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: har08: +; LINUX-64-PIC-LABEL: har08: ; LINUX-64-PIC: movq lptr(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -5862,19 +5862,19 @@ entry: define i8* @bat00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat00: +; LINUX-64-STATIC-LABEL: bat00: ; LINUX-64-STATIC: movl $src+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat00: +; LINUX-32-STATIC-LABEL: bat00: ; LINUX-32-STATIC: movl $src+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat00: +; LINUX-32-PIC-LABEL: bat00: ; LINUX-32-PIC: movl $src+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat00: +; LINUX-64-PIC-LABEL: bat00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -5915,19 +5915,19 @@ entry: define i8* @bxt00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bxt00: +; LINUX-64-STATIC-LABEL: bxt00: ; LINUX-64-STATIC: movl $xsrc+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bxt00: +; LINUX-32-STATIC-LABEL: bxt00: ; LINUX-32-STATIC: movl $xsrc+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bxt00: +; LINUX-32-PIC-LABEL: bxt00: ; LINUX-32-PIC: movl $xsrc+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bxt00: +; LINUX-64-PIC-LABEL: bxt00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -5968,19 +5968,19 @@ entry: define i8* @bat01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat01: +; LINUX-64-STATIC-LABEL: bat01: ; LINUX-64-STATIC: movl $dst+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat01: +; LINUX-32-STATIC-LABEL: bat01: ; LINUX-32-STATIC: movl $dst+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat01: +; LINUX-32-PIC-LABEL: bat01: ; LINUX-32-PIC: movl $dst+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat01: +; LINUX-64-PIC-LABEL: bat01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -6021,19 +6021,19 @@ entry: define i8* @bxt01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bxt01: +; LINUX-64-STATIC-LABEL: bxt01: ; LINUX-64-STATIC: movl $xdst+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bxt01: +; LINUX-32-STATIC-LABEL: bxt01: ; LINUX-32-STATIC: movl $xdst+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bxt01: +; LINUX-32-PIC-LABEL: bxt01: ; LINUX-32-PIC: movl $xdst+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bxt01: +; LINUX-64-PIC-LABEL: bxt01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -6077,22 +6077,22 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bat02: +; LINUX-64-STATIC-LABEL: bat02: ; LINUX-64-STATIC: movq ptr(%rip), %rax ; LINUX-64-STATIC: addq $64, %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat02: +; LINUX-32-STATIC-LABEL: bat02: ; LINUX-32-STATIC: movl ptr, %eax ; LINUX-32-STATIC-NEXT: addl $64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat02: +; LINUX-32-PIC-LABEL: bat02: ; LINUX-32-PIC: movl ptr, %eax ; LINUX-32-PIC-NEXT: addl $64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat02: +; LINUX-64-PIC-LABEL: bat02: ; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax @@ -6140,19 +6140,19 @@ entry: define i8* @bat03() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat03: +; LINUX-64-STATIC-LABEL: bat03: ; LINUX-64-STATIC: movl $dsrc+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat03: +; LINUX-32-STATIC-LABEL: bat03: ; LINUX-32-STATIC: movl $dsrc+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat03: +; LINUX-32-PIC-LABEL: bat03: ; LINUX-32-PIC: movl $dsrc+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat03: +; LINUX-64-PIC-LABEL: bat03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -6188,19 +6188,19 @@ entry: define i8* @bat04() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat04: +; LINUX-64-STATIC-LABEL: bat04: ; LINUX-64-STATIC: movl $ddst+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat04: +; LINUX-32-STATIC-LABEL: bat04: ; LINUX-32-STATIC: movl $ddst+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat04: +; LINUX-32-PIC-LABEL: bat04: ; LINUX-32-PIC: movl $ddst+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat04: +; LINUX-64-PIC-LABEL: bat04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -6239,22 +6239,22 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bat05: +; LINUX-64-STATIC-LABEL: bat05: ; LINUX-64-STATIC: movq dptr(%rip), %rax ; LINUX-64-STATIC: addq $64, %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat05: +; LINUX-32-STATIC-LABEL: bat05: ; LINUX-32-STATIC: movl dptr, %eax ; LINUX-32-STATIC-NEXT: addl $64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat05: +; LINUX-32-PIC-LABEL: bat05: ; LINUX-32-PIC: movl dptr, %eax ; LINUX-32-PIC-NEXT: addl $64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat05: +; LINUX-64-PIC-LABEL: bat05: ; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax @@ -6297,19 +6297,19 @@ entry: define i8* @bat06() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat06: +; LINUX-64-STATIC-LABEL: bat06: ; LINUX-64-STATIC: movl $lsrc+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat06: +; LINUX-32-STATIC-LABEL: bat06: ; LINUX-32-STATIC: movl $lsrc+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat06: +; LINUX-32-PIC-LABEL: bat06: ; LINUX-32-PIC: movl $lsrc+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat06: +; LINUX-64-PIC-LABEL: bat06: ; LINUX-64-PIC: leaq lsrc+64(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6344,19 +6344,19 @@ entry: define i8* @bat07() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16) to i8*) -; LINUX-64-STATIC: bat07: +; LINUX-64-STATIC-LABEL: bat07: ; LINUX-64-STATIC: movl $ldst+64, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat07: +; LINUX-32-STATIC-LABEL: bat07: ; LINUX-32-STATIC: movl $ldst+64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat07: +; LINUX-32-PIC-LABEL: bat07: ; LINUX-32-PIC: movl $ldst+64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat07: +; LINUX-64-PIC-LABEL: bat07: ; LINUX-64-PIC: leaq ldst+64(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6394,22 +6394,22 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bat08: +; LINUX-64-STATIC-LABEL: bat08: ; LINUX-64-STATIC: movq lptr(%rip), %rax ; LINUX-64-STATIC: addq $64, %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bat08: +; LINUX-32-STATIC-LABEL: bat08: ; LINUX-32-STATIC: movl lptr, %eax ; LINUX-32-STATIC-NEXT: addl $64, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bat08: +; LINUX-32-PIC-LABEL: bat08: ; LINUX-32-PIC: movl lptr, %eax ; LINUX-32-PIC-NEXT: addl $64, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bat08: +; LINUX-64-PIC-LABEL: bat08: ; LINUX-64-PIC: movq lptr(%rip), %rax ; LINUX-64-PIC-NEXT: addq $64, %rax ; LINUX-64-PIC-NEXT: ret @@ -6451,19 +6451,19 @@ entry: define i8* @bam00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam00: +; LINUX-64-STATIC-LABEL: bam00: ; LINUX-64-STATIC: movl $src+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam00: +; LINUX-32-STATIC-LABEL: bam00: ; LINUX-32-STATIC: movl $src+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam00: +; LINUX-32-PIC-LABEL: bam00: ; LINUX-32-PIC: movl $src+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam00: +; LINUX-64-PIC-LABEL: bam00: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq src@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6504,19 +6504,19 @@ entry: define i8* @bam01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam01: +; LINUX-64-STATIC-LABEL: bam01: ; LINUX-64-STATIC: movl $dst+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam01: +; LINUX-32-STATIC-LABEL: bam01: ; LINUX-32-STATIC: movl $dst+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam01: +; LINUX-32-PIC-LABEL: bam01: ; LINUX-32-PIC: movl $dst+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam01: +; LINUX-64-PIC-LABEL: bam01: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6557,19 +6557,19 @@ entry: define i8* @bxm01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bxm01: +; LINUX-64-STATIC-LABEL: bxm01: ; LINUX-64-STATIC: movl $xdst+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bxm01: +; LINUX-32-STATIC-LABEL: bxm01: ; LINUX-32-STATIC: movl $xdst+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bxm01: +; LINUX-32-PIC-LABEL: bxm01: ; LINUX-32-PIC: movl $xdst+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bxm01: +; LINUX-64-PIC-LABEL: bxm01: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6613,22 +6613,22 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bam02: +; LINUX-64-STATIC-LABEL: bam02: ; LINUX-64-STATIC: movl $262144, %eax ; LINUX-64-STATIC: addq ptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam02: +; LINUX-32-STATIC-LABEL: bam02: ; LINUX-32-STATIC: movl $262144, %eax ; LINUX-32-STATIC-NEXT: addl ptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam02: +; LINUX-32-PIC-LABEL: bam02: ; LINUX-32-PIC: movl $262144, %eax ; LINUX-32-PIC-NEXT: addl ptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam02: +; LINUX-64-PIC-LABEL: bam02: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: addq ([[RCX]]), %rax @@ -6676,19 +6676,19 @@ entry: define i8* @bam03() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam03: +; LINUX-64-STATIC-LABEL: bam03: ; LINUX-64-STATIC: movl $dsrc+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam03: +; LINUX-32-STATIC-LABEL: bam03: ; LINUX-32-STATIC: movl $dsrc+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam03: +; LINUX-32-PIC-LABEL: bam03: ; LINUX-32-PIC: movl $dsrc+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam03: +; LINUX-64-PIC-LABEL: bam03: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq dsrc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6724,19 +6724,19 @@ entry: define i8* @bam04() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam04: +; LINUX-64-STATIC-LABEL: bam04: ; LINUX-64-STATIC: movl $ddst+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam04: +; LINUX-32-STATIC-LABEL: bam04: ; LINUX-32-STATIC: movl $ddst+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam04: +; LINUX-32-PIC-LABEL: bam04: ; LINUX-32-PIC: movl $ddst+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam04: +; LINUX-64-PIC-LABEL: bam04: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6775,22 +6775,22 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bam05: +; LINUX-64-STATIC-LABEL: bam05: ; LINUX-64-STATIC: movl $262144, %eax ; LINUX-64-STATIC: addq dptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam05: +; LINUX-32-STATIC-LABEL: bam05: ; LINUX-32-STATIC: movl $262144, %eax ; LINUX-32-STATIC-NEXT: addl dptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam05: +; LINUX-32-PIC-LABEL: bam05: ; LINUX-32-PIC: movl $262144, %eax ; LINUX-32-PIC-NEXT: addl dptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam05: +; LINUX-64-PIC-LABEL: bam05: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), [[RCX:%r.x]] ; LINUX-64-PIC-NEXT: addq ([[RCX]]), %rax @@ -6833,19 +6833,19 @@ entry: define i8* @bam06() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam06: +; LINUX-64-STATIC-LABEL: bam06: ; LINUX-64-STATIC: movl $lsrc+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam06: +; LINUX-32-STATIC-LABEL: bam06: ; LINUX-32-STATIC: movl $lsrc+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam06: +; LINUX-32-PIC-LABEL: bam06: ; LINUX-32-PIC: movl $lsrc+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam06: +; LINUX-64-PIC-LABEL: bam06: ; LINUX-64-PIC: leaq lsrc+262144(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6880,19 +6880,19 @@ entry: define i8* @bam07() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536) to i8*) -; LINUX-64-STATIC: bam07: +; LINUX-64-STATIC-LABEL: bam07: ; LINUX-64-STATIC: movl $ldst+262144, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam07: +; LINUX-32-STATIC-LABEL: bam07: ; LINUX-32-STATIC: movl $ldst+262144, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam07: +; LINUX-32-PIC-LABEL: bam07: ; LINUX-32-PIC: movl $ldst+262144, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam07: +; LINUX-64-PIC-LABEL: bam07: ; LINUX-64-PIC: leaq ldst+262144(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6930,22 +6930,22 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: bam08: +; LINUX-64-STATIC-LABEL: bam08: ; LINUX-64-STATIC: movl $262144, %eax ; LINUX-64-STATIC: addq lptr(%rip), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: bam08: +; LINUX-32-STATIC-LABEL: bam08: ; LINUX-32-STATIC: movl $262144, %eax ; LINUX-32-STATIC-NEXT: addl lptr, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: bam08: +; LINUX-32-PIC-LABEL: bam08: ; LINUX-32-PIC: movl $262144, %eax ; LINUX-32-PIC-NEXT: addl lptr, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: bam08: +; LINUX-64-PIC-LABEL: bam08: ; LINUX-64-PIC: movl $262144, %eax ; LINUX-64-PIC-NEXT: addq lptr(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -6990,21 +6990,21 @@ entry: %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat00: +; LINUX-64-STATIC-LABEL: cat00: ; LINUX-64-STATIC: leaq src+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat00: +; LINUX-32-STATIC-LABEL: cat00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal src+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat00: +; LINUX-32-PIC-LABEL: cat00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal src+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat00: +; LINUX-64-PIC-LABEL: cat00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7051,21 +7051,21 @@ entry: %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cxt00: +; LINUX-64-STATIC-LABEL: cxt00: ; LINUX-64-STATIC: leaq xsrc+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cxt00: +; LINUX-32-STATIC-LABEL: cxt00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal xsrc+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cxt00: +; LINUX-32-PIC-LABEL: cxt00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xsrc+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cxt00: +; LINUX-64-PIC-LABEL: cxt00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7112,21 +7112,21 @@ entry: %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat01: +; LINUX-64-STATIC-LABEL: cat01: ; LINUX-64-STATIC: leaq dst+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat01: +; LINUX-32-STATIC-LABEL: cat01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dst+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat01: +; LINUX-32-PIC-LABEL: cat01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dst+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat01: +; LINUX-64-PIC-LABEL: cat01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7173,21 +7173,21 @@ entry: %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cxt01: +; LINUX-64-STATIC-LABEL: cxt01: ; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cxt01: +; LINUX-32-STATIC-LABEL: cxt01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal xdst+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cxt01: +; LINUX-32-PIC-LABEL: cxt01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xdst+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cxt01: +; LINUX-64-PIC-LABEL: cxt01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7235,24 +7235,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cat02: +; LINUX-64-STATIC-LABEL: cat02: ; LINUX-64-STATIC: movq ptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat02: +; LINUX-32-STATIC-LABEL: cat02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat02: +; LINUX-32-PIC-LABEL: cat02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat02: +; LINUX-64-PIC-LABEL: cat02: ; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax @@ -7306,21 +7306,21 @@ entry: %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat03: +; LINUX-64-STATIC-LABEL: cat03: ; LINUX-64-STATIC: leaq dsrc+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat03: +; LINUX-32-STATIC-LABEL: cat03: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dsrc+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat03: +; LINUX-32-PIC-LABEL: cat03: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dsrc+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat03: +; LINUX-64-PIC-LABEL: cat03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7365,21 +7365,21 @@ entry: %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat04: +; LINUX-64-STATIC-LABEL: cat04: ; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat04: +; LINUX-32-STATIC-LABEL: cat04: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ddst+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat04: +; LINUX-32-PIC-LABEL: cat04: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ddst+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat04: +; LINUX-64-PIC-LABEL: cat04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7425,24 +7425,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cat05: +; LINUX-64-STATIC-LABEL: cat05: ; LINUX-64-STATIC: movq dptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat05: +; LINUX-32-STATIC-LABEL: cat05: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat05: +; LINUX-32-PIC-LABEL: cat05: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat05: +; LINUX-64-PIC-LABEL: cat05: ; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax @@ -7491,21 +7491,21 @@ entry: %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat06: +; LINUX-64-STATIC-LABEL: cat06: ; LINUX-64-STATIC: leaq lsrc+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat06: +; LINUX-32-STATIC-LABEL: cat06: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal lsrc+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat06: +; LINUX-32-PIC-LABEL: cat06: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal lsrc+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat06: +; LINUX-64-PIC-LABEL: cat06: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7550,21 +7550,21 @@ entry: %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cat07: +; LINUX-64-STATIC-LABEL: cat07: ; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat07: +; LINUX-32-STATIC-LABEL: cat07: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ldst+64(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat07: +; LINUX-32-PIC-LABEL: cat07: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ldst+64(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat07: +; LINUX-64-PIC-LABEL: cat07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7610,24 +7610,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cat08: +; LINUX-64-STATIC-LABEL: cat08: ; LINUX-64-STATIC: movq lptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cat08: +; LINUX-32-STATIC-LABEL: cat08: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cat08: +; LINUX-32-PIC-LABEL: cat08: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 64([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cat08: +; LINUX-64-PIC-LABEL: cat08: ; LINUX-64-PIC: movq lptr(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 64([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7675,21 +7675,21 @@ entry: %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam00: +; LINUX-64-STATIC-LABEL: cam00: ; LINUX-64-STATIC: leaq src+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam00: +; LINUX-32-STATIC-LABEL: cam00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal src+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam00: +; LINUX-32-PIC-LABEL: cam00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal src+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam00: +; LINUX-64-PIC-LABEL: cam00: ; LINUX-64-PIC: movq src@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7736,21 +7736,21 @@ entry: %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cxm00: +; LINUX-64-STATIC-LABEL: cxm00: ; LINUX-64-STATIC: leaq xsrc+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cxm00: +; LINUX-32-STATIC-LABEL: cxm00: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal xsrc+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cxm00: +; LINUX-32-PIC-LABEL: cxm00: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xsrc+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cxm00: +; LINUX-64-PIC-LABEL: cxm00: ; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7797,21 +7797,21 @@ entry: %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam01: +; LINUX-64-STATIC-LABEL: cam01: ; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam01: +; LINUX-32-STATIC-LABEL: cam01: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dst+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam01: +; LINUX-32-PIC-LABEL: cam01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dst+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam01: +; LINUX-64-PIC-LABEL: cam01: ; LINUX-64-PIC: movq dst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7858,21 +7858,21 @@ entry: %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cxm01: +; LINUX-64-STATIC-LABEL: cxm01: ; LINUX-64-STATIC: leaq xdst+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cxm01: +; LINUX-32-STATIC-LABEL: cxm01: ; LINUX-32-STATIC: movl 4(%esp), %eax ; LINUX-32-STATIC-NEXT: leal xdst+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cxm01: +; LINUX-32-PIC-LABEL: cxm01: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal xdst+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cxm01: +; LINUX-64-PIC-LABEL: cxm01: ; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -7920,24 +7920,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cam02: +; LINUX-64-STATIC-LABEL: cam02: ; LINUX-64-STATIC: movq ptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam02: +; LINUX-32-STATIC-LABEL: cam02: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam02: +; LINUX-32-PIC-LABEL: cam02: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl ptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam02: +; LINUX-64-PIC-LABEL: cam02: ; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax @@ -7991,21 +7991,21 @@ entry: %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam03: +; LINUX-64-STATIC-LABEL: cam03: ; LINUX-64-STATIC: leaq dsrc+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam03: +; LINUX-32-STATIC-LABEL: cam03: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal dsrc+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam03: +; LINUX-32-PIC-LABEL: cam03: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal dsrc+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam03: +; LINUX-64-PIC-LABEL: cam03: ; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -8050,21 +8050,21 @@ entry: %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam04: +; LINUX-64-STATIC-LABEL: cam04: ; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam04: +; LINUX-32-STATIC-LABEL: cam04: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ddst+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam04: +; LINUX-32-PIC-LABEL: cam04: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ddst+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam04: +; LINUX-64-PIC-LABEL: cam04: ; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -8110,24 +8110,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cam05: +; LINUX-64-STATIC-LABEL: cam05: ; LINUX-64-STATIC: movq dptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam05: +; LINUX-32-STATIC-LABEL: cam05: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam05: +; LINUX-32-PIC-LABEL: cam05: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl dptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam05: +; LINUX-64-PIC-LABEL: cam05: ; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: movq ([[RAX]]), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax @@ -8176,21 +8176,21 @@ entry: %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam06: +; LINUX-64-STATIC-LABEL: cam06: ; LINUX-64-STATIC: leaq lsrc+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam06: +; LINUX-32-STATIC-LABEL: cam06: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal lsrc+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam06: +; LINUX-32-PIC-LABEL: cam06: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal lsrc+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam06: +; LINUX-64-PIC-LABEL: cam06: ; LINUX-64-PIC: leaq lsrc(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -8235,21 +8235,21 @@ entry: %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 -; LINUX-64-STATIC: cam07: +; LINUX-64-STATIC-LABEL: cam07: ; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam07: +; LINUX-32-STATIC-LABEL: cam07: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: leal ldst+262144(,[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam07: +; LINUX-32-PIC-LABEL: cam07: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: leal ldst+262144(,[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam07: +; LINUX-64-PIC-LABEL: cam07: ; LINUX-64-PIC: leaq ldst(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -8295,24 +8295,24 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 -; LINUX-64-STATIC: cam08: +; LINUX-64-STATIC-LABEL: cam08: ; LINUX-64-STATIC: movq lptr(%rip), [[RAX:%r.x]] ; LINUX-64-STATIC: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: cam08: +; LINUX-32-STATIC-LABEL: cam08: ; LINUX-32-STATIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-STATIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-STATIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: cam08: +; LINUX-32-PIC-LABEL: cam08: ; LINUX-32-PIC: movl 4(%esp), [[EAX:%e.x]] ; LINUX-32-PIC-NEXT: movl lptr, [[ECX:%e.x]] ; LINUX-32-PIC-NEXT: leal 262144([[ECX]],[[EAX]],4), %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: cam08: +; LINUX-64-PIC-LABEL: cam08: ; LINUX-64-PIC: movq lptr(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: leaq 262144([[RAX]],%rdi,4), %rax ; LINUX-64-PIC-NEXT: ret @@ -8364,7 +8364,7 @@ entry: call void @x() nounwind call void @x() nounwind ret void -; LINUX-64-STATIC: lcallee: +; LINUX-64-STATIC-LABEL: lcallee: ; LINUX-64-STATIC: callq x ; LINUX-64-STATIC: callq x ; LINUX-64-STATIC: callq x @@ -8374,7 +8374,7 @@ entry: ; LINUX-64-STATIC: callq x ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: lcallee: +; LINUX-32-STATIC-LABEL: lcallee: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll x ; LINUX-32-STATIC-NEXT: calll x @@ -8386,7 +8386,7 @@ entry: ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: lcallee: +; LINUX-32-PIC-LABEL: lcallee: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll x ; LINUX-32-PIC-NEXT: calll x @@ -8399,7 +8399,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: lcallee: +; LINUX-64-PIC-LABEL: lcallee: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT @@ -8496,7 +8496,7 @@ entry: call void @y() nounwind call void @y() nounwind ret void -; LINUX-64-STATIC: dcallee: +; LINUX-64-STATIC-LABEL: dcallee: ; LINUX-64-STATIC: callq y ; LINUX-64-STATIC: callq y ; LINUX-64-STATIC: callq y @@ -8506,7 +8506,7 @@ entry: ; LINUX-64-STATIC: callq y ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: dcallee: +; LINUX-32-STATIC-LABEL: dcallee: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll y ; LINUX-32-STATIC-NEXT: calll y @@ -8518,7 +8518,7 @@ entry: ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: dcallee: +; LINUX-32-PIC-LABEL: dcallee: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll y ; LINUX-32-PIC-NEXT: calll y @@ -8531,7 +8531,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: dcallee: +; LINUX-64-PIC-LABEL: dcallee: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT @@ -8621,19 +8621,19 @@ declare void @y() define void ()* @address() nounwind { entry: ret void ()* @callee -; LINUX-64-STATIC: address: +; LINUX-64-STATIC-LABEL: address: ; LINUX-64-STATIC: movl $callee, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: address: +; LINUX-32-STATIC-LABEL: address: ; LINUX-32-STATIC: movl $callee, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: address: +; LINUX-32-PIC-LABEL: address: ; LINUX-32-PIC: movl $callee, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: address: +; LINUX-64-PIC-LABEL: address: ; LINUX-64-PIC: movq callee@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -8670,19 +8670,19 @@ declare void @callee() define void ()* @laddress() nounwind { entry: ret void ()* @lcallee -; LINUX-64-STATIC: laddress: +; LINUX-64-STATIC-LABEL: laddress: ; LINUX-64-STATIC: movl $lcallee, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: laddress: +; LINUX-32-STATIC-LABEL: laddress: ; LINUX-32-STATIC: movl $lcallee, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: laddress: +; LINUX-32-PIC-LABEL: laddress: ; LINUX-32-PIC: movl $lcallee, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: laddress: +; LINUX-64-PIC-LABEL: laddress: ; LINUX-64-PIC: movq lcallee@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -8717,19 +8717,19 @@ entry: define void ()* @daddress() nounwind { entry: ret void ()* @dcallee -; LINUX-64-STATIC: daddress: +; LINUX-64-STATIC-LABEL: daddress: ; LINUX-64-STATIC: movl $dcallee, %eax ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: daddress: +; LINUX-32-STATIC-LABEL: daddress: ; LINUX-32-STATIC: movl $dcallee, %eax ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: daddress: +; LINUX-32-PIC-LABEL: daddress: ; LINUX-32-PIC: movl $dcallee, %eax ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: daddress: +; LINUX-64-PIC-LABEL: daddress: ; LINUX-64-PIC: leaq dcallee(%rip), %rax ; LINUX-64-PIC-NEXT: ret @@ -8766,19 +8766,19 @@ entry: call void @callee() nounwind call void @callee() nounwind ret void -; LINUX-64-STATIC: caller: +; LINUX-64-STATIC-LABEL: caller: ; LINUX-64-STATIC: callq callee ; LINUX-64-STATIC: callq callee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: caller: +; LINUX-32-STATIC-LABEL: caller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll callee ; LINUX-32-STATIC-NEXT: calll callee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: caller: +; LINUX-32-PIC-LABEL: caller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll callee ; LINUX-32-PIC-NEXT: calll callee @@ -8786,7 +8786,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: caller: +; LINUX-64-PIC-LABEL: caller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: callq callee@PLT @@ -8841,19 +8841,19 @@ entry: call void @dcallee() nounwind call void @dcallee() nounwind ret void -; LINUX-64-STATIC: dcaller: +; LINUX-64-STATIC-LABEL: dcaller: ; LINUX-64-STATIC: callq dcallee ; LINUX-64-STATIC: callq dcallee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: dcaller: +; LINUX-32-STATIC-LABEL: dcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll dcallee ; LINUX-32-STATIC-NEXT: calll dcallee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: dcaller: +; LINUX-32-PIC-LABEL: dcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll dcallee ; LINUX-32-PIC-NEXT: calll dcallee @@ -8861,7 +8861,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: dcaller: +; LINUX-64-PIC-LABEL: dcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: callq dcallee @@ -8916,19 +8916,19 @@ entry: call void @lcallee() nounwind call void @lcallee() nounwind ret void -; LINUX-64-STATIC: lcaller: +; LINUX-64-STATIC-LABEL: lcaller: ; LINUX-64-STATIC: callq lcallee ; LINUX-64-STATIC: callq lcallee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: lcaller: +; LINUX-32-STATIC-LABEL: lcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll lcallee ; LINUX-32-STATIC-NEXT: calll lcallee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: lcaller: +; LINUX-32-PIC-LABEL: lcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll lcallee ; LINUX-32-PIC-NEXT: calll lcallee @@ -8936,7 +8936,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: lcaller: +; LINUX-64-PIC-LABEL: lcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: callq lcallee@PLT @@ -8990,24 +8990,24 @@ define void @tailcaller() nounwind { entry: call void @callee() nounwind ret void -; LINUX-64-STATIC: tailcaller: +; LINUX-64-STATIC-LABEL: tailcaller: ; LINUX-64-STATIC: callq callee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: tailcaller: +; LINUX-32-STATIC-LABEL: tailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll callee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: tailcaller: +; LINUX-32-PIC-LABEL: tailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll callee ; LINUX-32-PIC-NEXT: addl ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: tailcaller: +; LINUX-64-PIC-LABEL: tailcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: popq @@ -9054,24 +9054,24 @@ define void @dtailcaller() nounwind { entry: call void @dcallee() nounwind ret void -; LINUX-64-STATIC: dtailcaller: +; LINUX-64-STATIC-LABEL: dtailcaller: ; LINUX-64-STATIC: callq dcallee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: dtailcaller: +; LINUX-32-STATIC-LABEL: dtailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll dcallee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: dtailcaller: +; LINUX-32-PIC-LABEL: dtailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll dcallee ; LINUX-32-PIC-NEXT: addl ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: dtailcaller: +; LINUX-64-PIC-LABEL: dtailcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: popq @@ -9118,24 +9118,24 @@ define void @ltailcaller() nounwind { entry: call void @lcallee() nounwind ret void -; LINUX-64-STATIC: ltailcaller: +; LINUX-64-STATIC-LABEL: ltailcaller: ; LINUX-64-STATIC: callq lcallee ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ltailcaller: +; LINUX-32-STATIC-LABEL: ltailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll lcallee ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ltailcaller: +; LINUX-32-PIC-LABEL: ltailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll lcallee ; LINUX-32-PIC-NEXT: addl ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ltailcaller: +; LINUX-64-PIC-LABEL: ltailcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: popq @@ -9185,19 +9185,19 @@ entry: %1 = load void ()** @ifunc, align 8 call void %1() nounwind ret void -; LINUX-64-STATIC: icaller: +; LINUX-64-STATIC-LABEL: icaller: ; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: icaller: +; LINUX-32-STATIC-LABEL: icaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: icaller: +; LINUX-32-PIC-LABEL: icaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *ifunc ; LINUX-32-PIC-NEXT: calll *ifunc @@ -9205,7 +9205,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: icaller: +; LINUX-64-PIC-LABEL: icaller: ; LINUX-64-PIC: pushq [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: callq *([[RBX]]) @@ -9275,19 +9275,19 @@ entry: %1 = load void ()** @difunc, align 8 call void %1() nounwind ret void -; LINUX-64-STATIC: dicaller: +; LINUX-64-STATIC-LABEL: dicaller: ; LINUX-64-STATIC: callq *difunc ; LINUX-64-STATIC: callq *difunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: dicaller: +; LINUX-32-STATIC-LABEL: dicaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *difunc ; LINUX-32-STATIC-NEXT: calll *difunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: dicaller: +; LINUX-32-PIC-LABEL: dicaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *difunc ; LINUX-32-PIC-NEXT: calll *difunc @@ -9295,7 +9295,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: dicaller: +; LINUX-64-PIC-LABEL: dicaller: ; LINUX-64-PIC: pushq [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: callq *([[RBX]]) @@ -9358,19 +9358,19 @@ entry: %1 = load void ()** @lifunc, align 8 call void %1() nounwind ret void -; LINUX-64-STATIC: licaller: +; LINUX-64-STATIC-LABEL: licaller: ; LINUX-64-STATIC: callq *lifunc ; LINUX-64-STATIC: callq *lifunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: licaller: +; LINUX-32-STATIC-LABEL: licaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *lifunc ; LINUX-32-STATIC-NEXT: calll *lifunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: licaller: +; LINUX-32-PIC-LABEL: licaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *lifunc ; LINUX-32-PIC-NEXT: calll *lifunc @@ -9378,7 +9378,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: licaller: +; LINUX-64-PIC-LABEL: licaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) @@ -9440,19 +9440,19 @@ entry: %1 = load void ()** @ifunc, align 8 call void %1() nounwind ret void -; LINUX-64-STATIC: itailcaller: +; LINUX-64-STATIC-LABEL: itailcaller: ; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: callq *ifunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: itailcaller: +; LINUX-32-STATIC-LABEL: itailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: calll *ifunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: itailcaller: +; LINUX-32-PIC-LABEL: itailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *ifunc ; LINUX-32-PIC-NEXT: calll *ifunc @@ -9460,7 +9460,7 @@ entry: ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: itailcaller: +; LINUX-64-PIC-LABEL: itailcaller: ; LINUX-64-PIC: pushq [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), [[RBX:%r.x]] ; LINUX-64-PIC-NEXT: callq *([[RBX]]) @@ -9528,24 +9528,24 @@ entry: %0 = load void ()** @difunc, align 8 call void %0() nounwind ret void -; LINUX-64-STATIC: ditailcaller: +; LINUX-64-STATIC-LABEL: ditailcaller: ; LINUX-64-STATIC: callq *difunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: ditailcaller: +; LINUX-32-STATIC-LABEL: ditailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *difunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: ditailcaller: +; LINUX-32-PIC-LABEL: ditailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *difunc ; LINUX-32-PIC-NEXT: addl ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: ditailcaller: +; LINUX-64-PIC-LABEL: ditailcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), [[RAX:%r.x]] ; LINUX-64-PIC-NEXT: callq *([[RAX]]) @@ -9596,24 +9596,24 @@ entry: %0 = load void ()** @lifunc, align 8 call void %0() nounwind ret void -; LINUX-64-STATIC: litailcaller: +; LINUX-64-STATIC-LABEL: litailcaller: ; LINUX-64-STATIC: callq *lifunc ; LINUX-64-STATIC: ret -; LINUX-32-STATIC: litailcaller: +; LINUX-32-STATIC-LABEL: litailcaller: ; LINUX-32-STATIC: subl ; LINUX-32-STATIC-NEXT: calll *lifunc ; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret -; LINUX-32-PIC: litailcaller: +; LINUX-32-PIC-LABEL: litailcaller: ; LINUX-32-PIC: subl ; LINUX-32-PIC-NEXT: calll *lifunc ; LINUX-32-PIC-NEXT: addl ; LINUX-32-PIC-NEXT: ret -; LINUX-64-PIC: litailcaller: +; LINUX-64-PIC-LABEL: litailcaller: ; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: popq diff --git a/test/CodeGen/X86/and-su.ll b/test/CodeGen/X86/and-su.ll index 38db88a..70c2461 100644 --- a/test/CodeGen/X86/and-su.ll +++ b/test/CodeGen/X86/and-su.ll @@ -3,7 +3,7 @@ ; Don't duplicate the load. define fastcc i32 @foo(i32* %p) nounwind { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: andl $10, %eax ; CHECK: je %t0 = load i32* %p @@ -18,7 +18,7 @@ bb76: define fastcc double @bar(i32 %hash, double %x, double %y) nounwind { entry: -; CHECK: bar: +; CHECK-LABEL: bar: %0 = and i32 %hash, 15 %1 = icmp ult i32 %0, 8 br i1 %1, label %bb11, label %bb10 diff --git a/test/CodeGen/X86/apm.ll b/test/CodeGen/X86/apm.ll index aaedf18..4ba1e21 100644 --- a/test/CodeGen/X86/apm.ll +++ b/test/CodeGen/X86/apm.ll @@ -2,11 +2,11 @@ ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse3 | FileCheck %s -check-prefix=WIN64 ; PR8573 -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: leaq (%rdi), %rax ; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: monitor -; WIN64: foo: +; WIN64-LABEL: foo: ; WIN64: leaq (%rcx), %rax ; WIN64-NEXT: movl %edx, %ecx ; WIN64-NEXT: movl %r8d, %edx @@ -19,11 +19,11 @@ entry: declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: movl %edi, %ecx ; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: mwait -; WIN64: bar: +; WIN64-LABEL: bar: ; WIN64: movl %edx, %eax ; WIN64-NEXT: mwait define void @bar(i32 %E, i32 %H) nounwind { diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll index 6c569d6..ebf585a 100644 --- a/test/CodeGen/X86/asm-global-imm.ll +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -7,7 +7,7 @@ target triple = "i686-apple-darwin9.0.0d2" @str = external global [12 x i8] ; <[12 x i8]*> [#uses=1] define void @foo() { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: ret ; CHECK: test1 $_GV ; CHECK-NOT: ret diff --git a/test/CodeGen/X86/asm-modifier-P.ll b/test/CodeGen/X86/asm-modifier-P.ll index 6139da8..0aa5555 100644 --- a/test/CodeGen/X86/asm-modifier-P.ll +++ b/test/CodeGen/X86/asm-modifier-P.ll @@ -21,20 +21,20 @@ define void @test1() nounwind { entry: ; P suffix removes (rip) in -static 64-bit mode. -; CHECK-PIC-64: test1: +; CHECK-PIC-64-LABEL: test1: ; CHECK-PIC-64: movq G@GOTPCREL(%rip), %rax ; CHECK-PIC-64: frob (%rax) x ; CHECK-PIC-64: frob (%rax) x -; CHECK-STATIC-64: test1: +; CHECK-STATIC-64-LABEL: test1: ; CHECK-STATIC-64: frob G(%rip) x ; CHECK-STATIC-64: frob G x -; CHECK-PIC-32: test1: +; CHECK-PIC-32-LABEL: test1: ; CHECK-PIC-32: frob G x ; CHECK-PIC-32: frob G x -; CHECK-STATIC-32: test1: +; CHECK-STATIC-32-LABEL: test1: ; CHECK-STATIC-32: frob G x ; CHECK-STATIC-32: frob G x @@ -45,25 +45,25 @@ entry: define void @test3() nounwind { entry: -; CHECK-STATIC-64: test3: +; CHECK-STATIC-64-LABEL: test3: ; CHECK-STATIC-64: call bar ; CHECK-STATIC-64: call test3 ; CHECK-STATIC-64: call $bar ; CHECK-STATIC-64: call $test3 -; CHECK-STATIC-32: test3: +; CHECK-STATIC-32-LABEL: test3: ; CHECK-STATIC-32: call bar ; CHECK-STATIC-32: call test3 ; CHECK-STATIC-32: call $bar ; CHECK-STATIC-32: call $test3 -; CHECK-PIC-64: test3: +; CHECK-PIC-64-LABEL: test3: ; CHECK-PIC-64: call bar@PLT ; CHECK-PIC-64: call test3@PLT ; CHECK-PIC-64: call $bar ; CHECK-PIC-64: call $test3 -; CHECK-PIC-32: test3: +; CHECK-PIC-32-LABEL: test3: ; CHECK-PIC-32: call bar@PLT ; CHECK-PIC-32: call test3@PLT ; CHECK-PIC-32: call $bar diff --git a/test/CodeGen/X86/atom-bypass-slow-division-64.ll b/test/CodeGen/X86/atom-bypass-slow-division-64.ll index 26b9a1e..d1b52a4 100644 --- a/test/CodeGen/X86/atom-bypass-slow-division-64.ll +++ b/test/CodeGen/X86/atom-bypass-slow-division-64.ll @@ -3,7 +3,7 @@ ; Additional tests for 64-bit divide bypass define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind { -; CHECK: Test_get_quotient: +; CHECK-LABEL: Test_get_quotient: ; CHECK: movq %rdi, %rax ; CHECK: orq %rsi, %rax ; CHECK-NEXT: testq $-65536, %rax @@ -17,7 +17,7 @@ define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind { } define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind { -; CHECK: Test_get_remainder: +; CHECK-LABEL: Test_get_remainder: ; CHECK: movq %rdi, %rax ; CHECK: orq %rsi, %rax ; CHECK-NEXT: testq $-65536, %rax @@ -31,7 +31,7 @@ define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind { } define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind { -; CHECK: Test_get_quotient_and_remainder: +; CHECK-LABEL: Test_get_quotient_and_remainder: ; CHECK: movq %rdi, %rax ; CHECK: orq %rsi, %rax ; CHECK-NEXT: testq $-65536, %rax diff --git a/test/CodeGen/X86/atom-bypass-slow-division.ll b/test/CodeGen/X86/atom-bypass-slow-division.ll index 4612940..79001e5 100644 --- a/test/CodeGen/X86/atom-bypass-slow-division.ll +++ b/test/CodeGen/X86/atom-bypass-slow-division.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s define i32 @Test_get_quotient(i32 %a, i32 %b) nounwind { -; CHECK: Test_get_quotient: +; CHECK-LABEL: Test_get_quotient: ; CHECK: orl %ecx, %edx ; CHECK-NEXT: testl $-256, %edx ; CHECK-NEXT: je @@ -14,7 +14,7 @@ define i32 @Test_get_quotient(i32 %a, i32 %b) nounwind { } define i32 @Test_get_remainder(i32 %a, i32 %b) nounwind { -; CHECK: Test_get_remainder: +; CHECK-LABEL: Test_get_remainder: ; CHECK: orl %ecx, %edx ; CHECK-NEXT: testl $-256, %edx ; CHECK-NEXT: je @@ -27,7 +27,7 @@ define i32 @Test_get_remainder(i32 %a, i32 %b) nounwind { } define i32 @Test_get_quotient_and_remainder(i32 %a, i32 %b) nounwind { -; CHECK: Test_get_quotient_and_remainder: +; CHECK-LABEL: Test_get_quotient_and_remainder: ; CHECK: orl %ecx, %edx ; CHECK-NEXT: testl $-256, %edx ; CHECK-NEXT: je @@ -44,7 +44,7 @@ define i32 @Test_get_quotient_and_remainder(i32 %a, i32 %b) nounwind { } define i32 @Test_use_div_and_idiv(i32 %a, i32 %b) nounwind { -; CHECK: Test_use_div_and_idiv: +; CHECK-LABEL: Test_use_div_and_idiv: ; CHECK: idivl ; CHECK: divb ; CHECK: divl @@ -58,14 +58,14 @@ define i32 @Test_use_div_and_idiv(i32 %a, i32 %b) nounwind { } define i32 @Test_use_div_imm_imm() nounwind { -; CHECK: Test_use_div_imm_imm: +; CHECK-LABEL: Test_use_div_imm_imm: ; CHECK: movl $64 %resultdiv = sdiv i32 256, 4 ret i32 %resultdiv } define i32 @Test_use_div_reg_imm(i32 %a) nounwind { -; CHECK: Test_use_div_reg_imm: +; CHECK-LABEL: Test_use_div_reg_imm: ; CHECK-NOT: test ; CHECK-NOT: idiv ; CHECK-NOT: divb @@ -74,7 +74,7 @@ define i32 @Test_use_div_reg_imm(i32 %a) nounwind { } define i32 @Test_use_rem_reg_imm(i32 %a) nounwind { -; CHECK: Test_use_rem_reg_imm: +; CHECK-LABEL: Test_use_rem_reg_imm: ; CHECK-NOT: test ; CHECK-NOT: idiv ; CHECK-NOT: divb @@ -83,7 +83,7 @@ define i32 @Test_use_rem_reg_imm(i32 %a) nounwind { } define i32 @Test_use_divrem_reg_imm(i32 %a) nounwind { -; CHECK: Test_use_divrem_reg_imm: +; CHECK-LABEL: Test_use_divrem_reg_imm: ; CHECK-NOT: test ; CHECK-NOT: idiv ; CHECK-NOT: divb @@ -94,7 +94,7 @@ define i32 @Test_use_divrem_reg_imm(i32 %a) nounwind { } define i32 @Test_use_div_imm_reg(i32 %a) nounwind { -; CHECK: Test_use_div_imm_reg: +; CHECK-LABEL: Test_use_div_imm_reg: ; CHECK: test ; CHECK: idiv ; CHECK: divb @@ -103,7 +103,7 @@ define i32 @Test_use_div_imm_reg(i32 %a) nounwind { } define i32 @Test_use_rem_imm_reg(i32 %a) nounwind { -; CHECK: Test_use_rem_imm_reg: +; CHECK-LABEL: Test_use_rem_imm_reg: ; CHECK: test ; CHECK: idiv ; CHECK: divb diff --git a/test/CodeGen/X86/atomic-minmax-i6432.ll b/test/CodeGen/X86/atomic-minmax-i6432.ll index 62f784f..1cfbc49 100644 --- a/test/CodeGen/X86/atomic-minmax-i6432.ll +++ b/test/CodeGen/X86/atomic-minmax-i6432.ll @@ -97,7 +97,7 @@ define void @atomic_maxmin_i6432() { @id = internal global i64 0, align 8 define void @tf_bug(i8* %ptr) nounwind { -; PIC: tf_bug: +; PIC-LABEL: tf_bug: ; PIC: movl _id-L1$pb( ; PIC: movl (_id-L1$pb)+4( %tmp1 = atomicrmw add i64* @id, i64 1 seq_cst diff --git a/test/CodeGen/X86/atomic-or.ll b/test/CodeGen/X86/atomic-or.ll index d759beb..1687e07 100644 --- a/test/CodeGen/X86/atomic-or.ll +++ b/test/CodeGen/X86/atomic-or.ll @@ -7,7 +7,7 @@ entry: %p.addr = alloca i64*, align 8 store i64* %p, i64** %p.addr, align 8 %tmp = load i64** %p.addr, align 8 -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: movl $2147483648, %eax ; CHECK: lock ; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}}) @@ -20,7 +20,7 @@ entry: %p.addr = alloca i64*, align 8 store i64* %p, i64** %p.addr, align 8 %tmp = load i64** %p.addr, align 8 -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: lock ; CHECK-NEXT: orq $2147483644, (%r{{.*}}) %0 = atomicrmw or i64* %tmp, i64 2147483644 seq_cst diff --git a/test/CodeGen/X86/atomic_add.ll b/test/CodeGen/X86/atomic_add.ll index 6b3a6b2..bdd25e6 100644 --- a/test/CodeGen/X86/atomic_add.ll +++ b/test/CodeGen/X86/atomic_add.ll @@ -4,7 +4,7 @@ define void @sub1(i32* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: sub1: +; CHECK-LABEL: sub1: ; CHECK: subl %0 = atomicrmw sub i32* %p, i32 %v monotonic ret void @@ -12,7 +12,7 @@ entry: define void @inc4(i64* nocapture %p) nounwind ssp { entry: -; CHECK: inc4: +; CHECK-LABEL: inc4: ; CHECK: incq %0 = atomicrmw add i64* %p, i64 1 monotonic ret void @@ -20,7 +20,7 @@ entry: define void @add8(i64* nocapture %p) nounwind ssp { entry: -; CHECK: add8: +; CHECK-LABEL: add8: ; CHECK: addq $2 %0 = atomicrmw add i64* %p, i64 2 monotonic ret void @@ -28,7 +28,7 @@ entry: define void @add4(i64* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: add4: +; CHECK-LABEL: add4: ; CHECK: addq %0 = sext i32 %v to i64 ; <i64> [#uses=1] %1 = atomicrmw add i64* %p, i64 %0 monotonic @@ -37,7 +37,7 @@ entry: define void @inc3(i8* nocapture %p) nounwind ssp { entry: -; CHECK: inc3: +; CHECK-LABEL: inc3: ; CHECK: incb %0 = atomicrmw add i8* %p, i8 1 monotonic ret void @@ -45,7 +45,7 @@ entry: define void @add7(i8* nocapture %p) nounwind ssp { entry: -; CHECK: add7: +; CHECK-LABEL: add7: ; CHECK: addb $2 %0 = atomicrmw add i8* %p, i8 2 monotonic ret void @@ -53,7 +53,7 @@ entry: define void @add3(i8* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: add3: +; CHECK-LABEL: add3: ; CHECK: addb %0 = trunc i32 %v to i8 ; <i8> [#uses=1] %1 = atomicrmw add i8* %p, i8 %0 monotonic @@ -62,7 +62,7 @@ entry: define void @inc2(i16* nocapture %p) nounwind ssp { entry: -; CHECK: inc2: +; CHECK-LABEL: inc2: ; CHECK: incw %0 = atomicrmw add i16* %p, i16 1 monotonic ret void @@ -70,7 +70,7 @@ entry: define void @add6(i16* nocapture %p) nounwind ssp { entry: -; CHECK: add6: +; CHECK-LABEL: add6: ; CHECK: addw $2 %0 = atomicrmw add i16* %p, i16 2 monotonic ret void @@ -78,7 +78,7 @@ entry: define void @add2(i16* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: add2: +; CHECK-LABEL: add2: ; CHECK: addw %0 = trunc i32 %v to i16 ; <i16> [#uses=1] %1 = atomicrmw add i16* %p, i16 %0 monotonic @@ -87,7 +87,7 @@ entry: define void @inc1(i32* nocapture %p) nounwind ssp { entry: -; CHECK: inc1: +; CHECK-LABEL: inc1: ; CHECK: incl %0 = atomicrmw add i32* %p, i32 1 monotonic ret void @@ -95,7 +95,7 @@ entry: define void @add5(i32* nocapture %p) nounwind ssp { entry: -; CHECK: add5: +; CHECK-LABEL: add5: ; CHECK: addl $2 %0 = atomicrmw add i32* %p, i32 2 monotonic ret void @@ -103,7 +103,7 @@ entry: define void @add1(i32* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: add1: +; CHECK-LABEL: add1: ; CHECK: addl %0 = atomicrmw add i32* %p, i32 %v monotonic ret void @@ -111,7 +111,7 @@ entry: define void @dec4(i64* nocapture %p) nounwind ssp { entry: -; CHECK: dec4: +; CHECK-LABEL: dec4: ; CHECK: decq %0 = atomicrmw sub i64* %p, i64 1 monotonic ret void @@ -119,7 +119,7 @@ entry: define void @sub8(i64* nocapture %p) nounwind ssp { entry: -; CHECK: sub8: +; CHECK-LABEL: sub8: ; CHECK: subq $2 %0 = atomicrmw sub i64* %p, i64 2 monotonic ret void @@ -127,7 +127,7 @@ entry: define void @sub4(i64* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: sub4: +; CHECK-LABEL: sub4: ; CHECK: subq %0 = sext i32 %v to i64 ; <i64> [#uses=1] %1 = atomicrmw sub i64* %p, i64 %0 monotonic @@ -136,7 +136,7 @@ entry: define void @dec3(i8* nocapture %p) nounwind ssp { entry: -; CHECK: dec3: +; CHECK-LABEL: dec3: ; CHECK: decb %0 = atomicrmw sub i8* %p, i8 1 monotonic ret void @@ -144,7 +144,7 @@ entry: define void @sub7(i8* nocapture %p) nounwind ssp { entry: -; CHECK: sub7: +; CHECK-LABEL: sub7: ; CHECK: subb $2 %0 = atomicrmw sub i8* %p, i8 2 monotonic ret void @@ -152,7 +152,7 @@ entry: define void @sub3(i8* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: sub3: +; CHECK-LABEL: sub3: ; CHECK: subb %0 = trunc i32 %v to i8 ; <i8> [#uses=1] %1 = atomicrmw sub i8* %p, i8 %0 monotonic @@ -161,7 +161,7 @@ entry: define void @dec2(i16* nocapture %p) nounwind ssp { entry: -; CHECK: dec2: +; CHECK-LABEL: dec2: ; CHECK: decw %0 = atomicrmw sub i16* %p, i16 1 monotonic ret void @@ -169,7 +169,7 @@ entry: define void @sub6(i16* nocapture %p) nounwind ssp { entry: -; CHECK: sub6: +; CHECK-LABEL: sub6: ; CHECK: subw $2 %0 = atomicrmw sub i16* %p, i16 2 monotonic ret void @@ -177,7 +177,7 @@ entry: define void @sub2(i16* nocapture %p, i32 %v) nounwind ssp { entry: -; CHECK: sub2: +; CHECK-LABEL: sub2: ; CHECK-NOT: negl ; CHECK: subw %0 = trunc i32 %v to i16 ; <i16> [#uses=1] @@ -187,7 +187,7 @@ entry: define void @dec1(i32* nocapture %p) nounwind ssp { entry: -; CHECK: dec1: +; CHECK-LABEL: dec1: ; CHECK: decl %0 = atomicrmw sub i32* %p, i32 1 monotonic ret void @@ -195,7 +195,7 @@ entry: define void @sub5(i32* nocapture %p) nounwind ssp { entry: -; CHECK: sub5: +; CHECK-LABEL: sub5: ; CHECK: subl $2 %0 = atomicrmw sub i32* %p, i32 2 monotonic ret void diff --git a/test/CodeGen/X86/avx-minmax.ll b/test/CodeGen/X86/avx-minmax.ll index eff9251..c94962b 100644 --- a/test/CodeGen/X86/avx-minmax.ll +++ b/test/CodeGen/X86/avx-minmax.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s -; UNSAFE: maxpd: +; UNSAFE-LABEL: maxpd: ; UNSAFE: vmaxpd {{.+}}, %xmm define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { %max_is_x = fcmp oge <2 x double> %x, %y @@ -8,7 +8,7 @@ define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { ret <2 x double> %max } -; UNSAFE: minpd: +; UNSAFE-LABEL: minpd: ; UNSAFE: vminpd {{.+}}, %xmm define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { %min_is_x = fcmp ole <2 x double> %x, %y @@ -16,7 +16,7 @@ define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { ret <2 x double> %min } -; UNSAFE: maxps: +; UNSAFE-LABEL: maxps: ; UNSAFE: vmaxps {{.+}}, %xmm define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { %max_is_x = fcmp oge <4 x float> %x, %y @@ -24,7 +24,7 @@ define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { ret <4 x float> %max } -; UNSAFE: minps: +; UNSAFE-LABEL: minps: ; UNSAFE: vminps {{.+}}, %xmm define <4 x float> @minps(<4 x float> %x, <4 x float> %y) { %min_is_x = fcmp ole <4 x float> %x, %y @@ -32,7 +32,7 @@ define <4 x float> @minps(<4 x float> %x, <4 x float> %y) { ret <4 x float> %min } -; UNSAFE: vmaxpd: +; UNSAFE-LABEL: vmaxpd: ; UNSAFE: vmaxpd {{.+}}, %ymm define <4 x double> @vmaxpd(<4 x double> %x, <4 x double> %y) { %max_is_x = fcmp oge <4 x double> %x, %y @@ -40,7 +40,7 @@ define <4 x double> @vmaxpd(<4 x double> %x, <4 x double> %y) { ret <4 x double> %max } -; UNSAFE: vminpd: +; UNSAFE-LABEL: vminpd: ; UNSAFE: vminpd {{.+}}, %ymm define <4 x double> @vminpd(<4 x double> %x, <4 x double> %y) { %min_is_x = fcmp ole <4 x double> %x, %y @@ -48,7 +48,7 @@ define <4 x double> @vminpd(<4 x double> %x, <4 x double> %y) { ret <4 x double> %min } -; UNSAFE: vmaxps: +; UNSAFE-LABEL: vmaxps: ; UNSAFE: vmaxps {{.+}}, %ymm define <8 x float> @vmaxps(<8 x float> %x, <8 x float> %y) { %max_is_x = fcmp oge <8 x float> %x, %y @@ -56,7 +56,7 @@ define <8 x float> @vmaxps(<8 x float> %x, <8 x float> %y) { ret <8 x float> %max } -; UNSAFE: vminps: +; UNSAFE-LABEL: vminps: ; UNSAFE: vminps {{.+}}, %ymm define <8 x float> @vminps(<8 x float> %x, <8 x float> %y) { %min_is_x = fcmp ole <8 x float> %x, %y diff --git a/test/CodeGen/X86/avx-shuffle-x86_32.ll b/test/CodeGen/X86/avx-shuffle-x86_32.ll index e203c4e..78b4888 100644 --- a/test/CodeGen/X86/avx-shuffle-x86_32.ll +++ b/test/CodeGen/X86/avx-shuffle-x86_32.ll @@ -3,6 +3,6 @@ define <4 x i64> @test1(<4 x i64> %a) nounwind { %b = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> ret <4 x i64>%b - ; CHECK: test1: + ; CHECK-LABEL: test1: ; CHECK-NOT: vinsertf128 } diff --git a/test/CodeGen/X86/avx-vextractf128.ll b/test/CodeGen/X86/avx-vextractf128.ll index ad8365b..fa49f94 100644 --- a/test/CodeGen/X86/avx-vextractf128.ll +++ b/test/CodeGen/X86/avx-vextractf128.ll @@ -114,7 +114,7 @@ define void @t9(i64* %p) { store i64 0, i64* %s ret void -; CHECK: t9: +; CHECK-LABEL: t9: ; CHECK: vxorps %xmm ; CHECK-NOT: vextractf ; CHECK: vmovups diff --git a/test/CodeGen/X86/avx2-logic.ll b/test/CodeGen/X86/avx2-logic.ll index a5bb1a8..3d4fcec 100644 --- a/test/CodeGen/X86/avx2-logic.ll +++ b/test/CodeGen/X86/avx2-logic.ll @@ -55,7 +55,7 @@ define <32 x i8> @vpblendvb(<32 x i1> %cond, <32 x i8> %x, <32 x i8> %y) { define <8 x i32> @signd(<8 x i32> %a, <8 x i32> %b) nounwind { entry: -; CHECK: signd: +; CHECK-LABEL: signd: ; CHECK: psignd ; CHECK-NOT: sub ; CHECK: ret @@ -70,7 +70,7 @@ entry: define <8 x i32> @blendvb(<8 x i32> %b, <8 x i32> %a, <8 x i32> %c) nounwind { entry: -; CHECK: blendvb: +; CHECK-LABEL: blendvb: ; CHECK: pblendvb ; CHECK: ret %b.lobit = ashr <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31> diff --git a/test/CodeGen/X86/avx2-phaddsub.ll b/test/CodeGen/X86/avx2-phaddsub.ll index 4eac71d..3f9c95c 100644 --- a/test/CodeGen/X86/avx2-phaddsub.ll +++ b/test/CodeGen/X86/avx2-phaddsub.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mattr=+avx2 | FileCheck %s -; CHECK: phaddw1: +; CHECK-LABEL: phaddw1: ; CHECK: vphaddw define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) { %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30> @@ -9,7 +9,7 @@ define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) { ret <16 x i16> %r } -; CHECK: phaddw2: +; CHECK-LABEL: phaddw2: ; CHECK: vphaddw define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) { %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31> @@ -18,7 +18,7 @@ define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) { ret <16 x i16> %r } -; CHECK: phaddd1: +; CHECK-LABEL: phaddd1: ; CHECK: vphaddd define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) { %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14> @@ -27,7 +27,7 @@ define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) { ret <8 x i32> %r } -; CHECK: phaddd2: +; CHECK-LABEL: phaddd2: ; CHECK: vphaddd define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) { %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 2, i32 9, i32 10, i32 5, i32 6, i32 13, i32 14> @@ -36,7 +36,7 @@ define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) { ret <8 x i32> %r } -; CHECK: phaddd3: +; CHECK-LABEL: phaddd3: ; CHECK: vphaddd define <8 x i32> @phaddd3(<8 x i32> %x) { %a = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 undef, i32 2, i32 8, i32 10, i32 4, i32 6, i32 undef, i32 14> @@ -45,7 +45,7 @@ define <8 x i32> @phaddd3(<8 x i32> %x) { ret <8 x i32> %r } -; CHECK: phsubw1: +; CHECK-LABEL: phsubw1: ; CHECK: vphsubw define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) { %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30> @@ -54,7 +54,7 @@ define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) { ret <16 x i16> %r } -; CHECK: phsubd1: +; CHECK-LABEL: phsubd1: ; CHECK: vphsubd define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) { %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14> @@ -63,7 +63,7 @@ define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) { ret <8 x i32> %r } -; CHECK: phsubd2: +; CHECK-LABEL: phsubd2: ; CHECK: vphsubd define <8 x i32> @phsubd2(<8 x i32> %x, <8 x i32> %y) { %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 undef, i32 8, i32 undef, i32 4, i32 6, i32 12, i32 14> diff --git a/test/CodeGen/X86/avx2-shift.ll b/test/CodeGen/X86/avx2-shift.ll index 1f192a0..7fdbaaa 100644 --- a/test/CodeGen/X86/avx2-shift.ll +++ b/test/CodeGen/X86/avx2-shift.ll @@ -212,7 +212,7 @@ define <4 x i64> @variable_srl3_load(<4 x i64> %x, <4 x i64>* %y) { define <32 x i8> @shl9(<32 x i8> %A) nounwind { %B = shl <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <32 x i8> %B -; CHECK: shl9: +; CHECK-LABEL: shl9: ; CHECK: vpsllw $3 ; CHECK: vpand ; CHECK: ret @@ -221,7 +221,7 @@ define <32 x i8> @shl9(<32 x i8> %A) nounwind { define <32 x i8> @shr9(<32 x i8> %A) nounwind { %B = lshr <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <32 x i8> %B -; CHECK: shr9: +; CHECK-LABEL: shr9: ; CHECK: vpsrlw $3 ; CHECK: vpand ; CHECK: ret @@ -230,7 +230,7 @@ define <32 x i8> @shr9(<32 x i8> %A) nounwind { define <32 x i8> @sra_v32i8_7(<32 x i8> %A) nounwind { %B = ashr <32 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> ret <32 x i8> %B -; CHECK: sra_v32i8_7: +; CHECK-LABEL: sra_v32i8_7: ; CHECK: vpxor ; CHECK: vpcmpgtb ; CHECK: ret @@ -239,7 +239,7 @@ define <32 x i8> @sra_v32i8_7(<32 x i8> %A) nounwind { define <32 x i8> @sra_v32i8(<32 x i8> %A) nounwind { %B = ashr <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <32 x i8> %B -; CHECK: sra_v32i8: +; CHECK-LABEL: sra_v32i8: ; CHECK: vpsrlw $3 ; CHECK: vpand ; CHECK: vpxor diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll index b89e648..4eda888 100644 --- a/test/CodeGen/X86/bmi.ll +++ b/test/CodeGen/X86/bmi.ll @@ -8,21 +8,21 @@ declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone define i8 @t1(i8 %x) nounwind { %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 false ) ret i8 %tmp -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: tzcntl } define i16 @t2(i16 %x) nounwind { %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false ) ret i16 %tmp -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: tzcntw } define i32 @t3(i32 %x) nounwind { %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false ) ret i32 %tmp -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: tzcntl } @@ -30,42 +30,42 @@ define i32 @tzcnt32_load(i32* %x) nounwind { %x1 = load i32* %x %tmp = tail call i32 @llvm.cttz.i32(i32 %x1, i1 false ) ret i32 %tmp -; CHECK: tzcnt32_load: +; CHECK-LABEL: tzcnt32_load: ; CHECK: tzcntl ({{.*}}) } define i64 @t4(i64 %x) nounwind { %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false ) ret i64 %tmp -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: tzcntq } define i8 @t5(i8 %x) nounwind { %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 true ) ret i8 %tmp -; CHECK: t5: +; CHECK-LABEL: t5: ; CHECK: tzcntl } define i16 @t6(i16 %x) nounwind { %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 true ) ret i16 %tmp -; CHECK: t6: +; CHECK-LABEL: t6: ; CHECK: tzcntw } define i32 @t7(i32 %x) nounwind { %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true ) ret i32 %tmp -; CHECK: t7: +; CHECK-LABEL: t7: ; CHECK: tzcntl } define i64 @t8(i64 %x) nounwind { %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 true ) ret i64 %tmp -; CHECK: t8: +; CHECK-LABEL: t8: ; CHECK: tzcntq } @@ -73,7 +73,7 @@ define i32 @andn32(i32 %x, i32 %y) nounwind readnone { %tmp1 = xor i32 %x, -1 %tmp2 = and i32 %y, %tmp1 ret i32 %tmp2 -; CHECK: andn32: +; CHECK-LABEL: andn32: ; CHECK: andnl } @@ -82,7 +82,7 @@ define i32 @andn32_load(i32 %x, i32* %y) nounwind readnone { %tmp1 = xor i32 %x, -1 %tmp2 = and i32 %y1, %tmp1 ret i32 %tmp2 -; CHECK: andn32_load: +; CHECK-LABEL: andn32_load: ; CHECK: andnl ({{.*}}) } @@ -90,14 +90,14 @@ define i64 @andn64(i64 %x, i64 %y) nounwind readnone { %tmp1 = xor i64 %x, -1 %tmp2 = and i64 %tmp1, %y ret i64 %tmp2 -; CHECK: andn64: +; CHECK-LABEL: andn64: ; CHECK: andnq } define i32 @bextr32(i32 %x, i32 %y) nounwind readnone { %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y) ret i32 %tmp -; CHECK: bextr32: +; CHECK-LABEL: bextr32: ; CHECK: bextrl } @@ -105,7 +105,7 @@ define i32 @bextr32_load(i32* %x, i32 %y) nounwind readnone { %x1 = load i32* %x %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x1, i32 %y) ret i32 %tmp -; CHECK: bextr32_load: +; CHECK-LABEL: bextr32_load: ; CHECK: bextrl {{.*}}, ({{.*}}), {{.*}} } @@ -114,7 +114,7 @@ declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone define i64 @bextr64(i64 %x, i64 %y) nounwind readnone { %tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y) ret i64 %tmp -; CHECK: bextr64: +; CHECK-LABEL: bextr64: ; CHECK: bextrq } @@ -123,7 +123,7 @@ declare i64 @llvm.x86.bmi.bextr.64(i64, i64) nounwind readnone define i32 @bzhi32(i32 %x, i32 %y) nounwind readnone { %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y) ret i32 %tmp -; CHECK: bzhi32: +; CHECK-LABEL: bzhi32: ; CHECK: bzhil } @@ -131,7 +131,7 @@ define i32 @bzhi32_load(i32* %x, i32 %y) nounwind readnone { %x1 = load i32* %x %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y) ret i32 %tmp -; CHECK: bzhi32_load: +; CHECK-LABEL: bzhi32_load: ; CHECK: bzhil {{.*}}, ({{.*}}), {{.*}} } @@ -140,7 +140,7 @@ declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) nounwind readnone define i64 @bzhi64(i64 %x, i64 %y) nounwind readnone { %tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y) ret i64 %tmp -; CHECK: bzhi64: +; CHECK-LABEL: bzhi64: ; CHECK: bzhiq } @@ -150,7 +150,7 @@ define i32 @blsi32(i32 %x) nounwind readnone { %tmp = sub i32 0, %x %tmp2 = and i32 %x, %tmp ret i32 %tmp2 -; CHECK: blsi32: +; CHECK-LABEL: blsi32: ; CHECK: blsil } @@ -159,7 +159,7 @@ define i32 @blsi32_load(i32* %x) nounwind readnone { %tmp = sub i32 0, %x1 %tmp2 = and i32 %x1, %tmp ret i32 %tmp2 -; CHECK: blsi32_load: +; CHECK-LABEL: blsi32_load: ; CHECK: blsil ({{.*}}) } @@ -167,7 +167,7 @@ define i64 @blsi64(i64 %x) nounwind readnone { %tmp = sub i64 0, %x %tmp2 = and i64 %tmp, %x ret i64 %tmp2 -; CHECK: blsi64: +; CHECK-LABEL: blsi64: ; CHECK: blsiq } @@ -175,7 +175,7 @@ define i32 @blsmsk32(i32 %x) nounwind readnone { %tmp = sub i32 %x, 1 %tmp2 = xor i32 %x, %tmp ret i32 %tmp2 -; CHECK: blsmsk32: +; CHECK-LABEL: blsmsk32: ; CHECK: blsmskl } @@ -184,7 +184,7 @@ define i32 @blsmsk32_load(i32* %x) nounwind readnone { %tmp = sub i32 %x1, 1 %tmp2 = xor i32 %x1, %tmp ret i32 %tmp2 -; CHECK: blsmsk32_load: +; CHECK-LABEL: blsmsk32_load: ; CHECK: blsmskl ({{.*}}) } @@ -192,7 +192,7 @@ define i64 @blsmsk64(i64 %x) nounwind readnone { %tmp = sub i64 %x, 1 %tmp2 = xor i64 %tmp, %x ret i64 %tmp2 -; CHECK: blsmsk64: +; CHECK-LABEL: blsmsk64: ; CHECK: blsmskq } @@ -200,7 +200,7 @@ define i32 @blsr32(i32 %x) nounwind readnone { %tmp = sub i32 %x, 1 %tmp2 = and i32 %x, %tmp ret i32 %tmp2 -; CHECK: blsr32: +; CHECK-LABEL: blsr32: ; CHECK: blsrl } @@ -209,7 +209,7 @@ define i32 @blsr32_load(i32* %x) nounwind readnone { %tmp = sub i32 %x1, 1 %tmp2 = and i32 %x1, %tmp ret i32 %tmp2 -; CHECK: blsr32_load: +; CHECK-LABEL: blsr32_load: ; CHECK: blsrl ({{.*}}) } @@ -217,14 +217,14 @@ define i64 @blsr64(i64 %x) nounwind readnone { %tmp = sub i64 %x, 1 %tmp2 = and i64 %tmp, %x ret i64 %tmp2 -; CHECK: blsr64: +; CHECK-LABEL: blsr64: ; CHECK: blsrq } define i32 @pdep32(i32 %x, i32 %y) nounwind readnone { %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y) ret i32 %tmp -; CHECK: pdep32: +; CHECK-LABEL: pdep32: ; CHECK: pdepl } @@ -232,7 +232,7 @@ define i32 @pdep32_load(i32 %x, i32* %y) nounwind readnone { %y1 = load i32* %y %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1) ret i32 %tmp -; CHECK: pdep32_load: +; CHECK-LABEL: pdep32_load: ; CHECK: pdepl ({{.*}}) } @@ -241,7 +241,7 @@ declare i32 @llvm.x86.bmi.pdep.32(i32, i32) nounwind readnone define i64 @pdep64(i64 %x, i64 %y) nounwind readnone { %tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y) ret i64 %tmp -; CHECK: pdep64: +; CHECK-LABEL: pdep64: ; CHECK: pdepq } @@ -250,7 +250,7 @@ declare i64 @llvm.x86.bmi.pdep.64(i64, i64) nounwind readnone define i32 @pext32(i32 %x, i32 %y) nounwind readnone { %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y) ret i32 %tmp -; CHECK: pext32: +; CHECK-LABEL: pext32: ; CHECK: pextl } @@ -258,7 +258,7 @@ define i32 @pext32_load(i32 %x, i32* %y) nounwind readnone { %y1 = load i32* %y %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1) ret i32 %tmp -; CHECK: pext32_load: +; CHECK-LABEL: pext32_load: ; CHECK: pextl ({{.*}}) } @@ -267,7 +267,7 @@ declare i32 @llvm.x86.bmi.pext.32(i32, i32) nounwind readnone define i64 @pext64(i64 %x, i64 %y) nounwind readnone { %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y) ret i64 %tmp -; CHECK: pext64: +; CHECK-LABEL: pext64: ; CHECK: pextq } diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll index 4d80189..8124d6f 100644 --- a/test/CodeGen/X86/break-sse-dep.ll +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -3,7 +3,7 @@ define double @t1(float* nocapture %x) nounwind readonly ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: movss ([[A0:%rdi|%rcx]]), %xmm0 ; CHECK: cvtss2sd %xmm0, %xmm0 @@ -14,7 +14,7 @@ entry: define float @t2(double* nocapture %x) nounwind readonly ssp optsize { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: cvtsd2ss ([[A0]]), %xmm0 %0 = load double* %x, align 8 %1 = fptrunc double %0 to float @@ -23,7 +23,7 @@ entry: define float @squirtf(float* %x) nounwind { entry: -; CHECK: squirtf: +; CHECK-LABEL: squirtf: ; CHECK: movss ([[A0]]), %xmm0 ; CHECK: sqrtss %xmm0, %xmm0 %z = load float* %x @@ -33,7 +33,7 @@ entry: define double @squirt(double* %x) nounwind { entry: -; CHECK: squirt: +; CHECK-LABEL: squirt: ; CHECK: sqrtsd ([[A0]]), %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) @@ -42,7 +42,7 @@ entry: define float @squirtf_size(float* %x) nounwind optsize { entry: -; CHECK: squirtf_size: +; CHECK-LABEL: squirtf_size: ; CHECK: sqrtss ([[A0]]), %xmm0 %z = load float* %x %t = call float @llvm.sqrt.f32(float %z) @@ -51,7 +51,7 @@ entry: define double @squirt_size(double* %x) nounwind optsize { entry: -; CHECK: squirt_size: +; CHECK-LABEL: squirt_size: ; CHECK: sqrtsd ([[A0]]), %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index d69bfa6..f8f154c 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -3,84 +3,84 @@ ; CHK-NOT: InlineAsm -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: bswapq define i64 @foo(i64 %x) nounwind { %asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind ret i64 %asmtmp } -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: bswapq define i64 @bar(i64 %x) nounwind { %asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind ret i64 %asmtmp } -; CHECK: pen: +; CHECK-LABEL: pen: ; CHECK: bswapl define i32 @pen(i32 %x) nounwind { %asmtmp = tail call i32 asm "bswapl ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind ret i32 %asmtmp } -; CHECK: s16: +; CHECK-LABEL: s16: ; CHECK: rolw $8, define zeroext i16 @s16(i16 zeroext %x) nounwind { %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind ret i16 %asmtmp } -; CHECK: t16: +; CHECK-LABEL: t16: ; CHECK: rolw $8, define zeroext i16 @t16(i16 zeroext %x) nounwind { %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind ret i16 %asmtmp } -; CHECK: u16: +; CHECK-LABEL: u16: ; CHECK: rolw $8, define zeroext i16 @u16(i16 zeroext %x) nounwind { %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind ret i16 %asmtmp } -; CHECK: v16: +; CHECK-LABEL: v16: ; CHECK: rolw $8, define zeroext i16 @v16(i16 zeroext %x) nounwind { %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind ret i16 %asmtmp } -; CHECK: s32: +; CHECK-LABEL: s32: ; CHECK: bswapl define i32 @s32(i32 %x) nounwind { %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind ret i32 %asmtmp } -; CHECK: t32: +; CHECK-LABEL: t32: ; CHECK: bswapl define i32 @t32(i32 %x) nounwind { %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind ret i32 %asmtmp } -; CHECK: u32: +; CHECK-LABEL: u32: ; CHECK: bswapl define i32 @u32(i32 %x) nounwind { %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind ret i32 %asmtmp } -; CHECK: s64: +; CHECK-LABEL: s64: ; CHECK: bswapq define i64 @s64(i64 %x) nounwind { %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind ret i64 %asmtmp } -; CHECK: t64: +; CHECK-LABEL: t64: ; CHECK: bswapq define i64 @t64(i64 %x) nounwind { %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{fpsr},~{dirflag},~{flags}"(i64 %x) nounwind diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll index d2d6f90..9e46592 100644 --- a/test/CodeGen/X86/bswap.ll +++ b/test/CodeGen/X86/bswap.ll @@ -9,21 +9,21 @@ declare i32 @llvm.bswap.i32(i32) declare i64 @llvm.bswap.i64(i64) define i16 @W(i16 %A) { -; CHECK: W: +; CHECK-LABEL: W: ; CHECK: rolw $8, %ax %Z = call i16 @llvm.bswap.i16( i16 %A ) ; <i16> [#uses=1] ret i16 %Z } define i32 @X(i32 %A) { -; CHECK: X: +; CHECK-LABEL: X: ; CHECK: bswapl %eax %Z = call i32 @llvm.bswap.i32( i32 %A ) ; <i32> [#uses=1] ret i32 %Z } define i64 @Y(i64 %A) { -; CHECK: Y: +; CHECK-LABEL: Y: ; CHECK: bswapl %eax ; CHECK: bswapl %edx %Z = call i64 @llvm.bswap.i64( i64 %A ) ; <i64> [#uses=1] diff --git a/test/CodeGen/X86/byval7.ll b/test/CodeGen/X86/byval7.ll index 98a26e4..8a96e41 100644 --- a/test/CodeGen/X86/byval7.ll +++ b/test/CodeGen/X86/byval7.ll @@ -6,7 +6,7 @@ define i32 @main() nounwind { entry: -; CHECK: main: +; CHECK-LABEL: main: ; CHECK: movl $1, (%esp) ; CHECK: leal 16(%esp), %edi ; CHECK: leal 160(%esp), %esi diff --git a/test/CodeGen/X86/call-push.ll b/test/CodeGen/X86/call-push.ll index e69f8c1..ccb98fe 100644 --- a/test/CodeGen/X86/call-push.ll +++ b/test/CodeGen/X86/call-push.ll @@ -4,7 +4,7 @@ %struct.range_t = type { float, float, i32, i32, i32, [0 x i8] } define i32 @decode_byte(%struct.decode_t* %decode) nounwind { -; CHECK: decode_byte: +; CHECK-LABEL: decode_byte: ; CHECK: pushl ; CHECK: popl ; CHECK: jmp diff --git a/test/CodeGen/X86/change-compare-stride-1.ll b/test/CodeGen/X86/change-compare-stride-1.ll index 1c5c113..b45b404 100644 --- a/test/CodeGen/X86/change-compare-stride-1.ll +++ b/test/CodeGen/X86/change-compare-stride-1.ll @@ -8,7 +8,7 @@ ; XFAIL: * define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind { -; CHECK: borf: +; CHECK-LABEL: borf: ; CHECK-NOT: inc ; CHECK-NOT: leal 1( ; CHECK-NOT: leal -1( diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-0.ll b/test/CodeGen/X86/change-compare-stride-trickiness-0.ll index 1f7f6ec..be9e709 100644 --- a/test/CodeGen/X86/change-compare-stride-trickiness-0.ll +++ b/test/CodeGen/X86/change-compare-stride-trickiness-0.ll @@ -5,7 +5,7 @@ target triple = "x86_64-apple-darwin9" ; The comparison happens before the relevant use, but it can still be rewritten ; to compare with zero. -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: align ; CHECK: incl %eax ; CHECK-NEXT: decl %ecx diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-1.ll b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll index a3933e2..63733ab 100644 --- a/test/CodeGen/X86/change-compare-stride-trickiness-1.ll +++ b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll @@ -7,7 +7,7 @@ ; could be made simpler. define void @foo() nounwind { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: ret ; CHECK: cmpl $10 ; CHECK: ret diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll index 763079f..6a6f525 100644 --- a/test/CodeGen/X86/clz.ll +++ b/test/CodeGen/X86/clz.ll @@ -12,7 +12,7 @@ declare i64 @llvm.ctlz.i64(i64, i1) define i8 @cttz_i8(i8 %x) { %tmp = call i8 @llvm.cttz.i8( i8 %x, i1 true ) ret i8 %tmp -; CHECK: cttz_i8: +; CHECK-LABEL: cttz_i8: ; CHECK: bsfl ; CHECK-NOT: cmov ; CHECK: ret @@ -21,7 +21,7 @@ define i8 @cttz_i8(i8 %x) { define i16 @cttz_i16(i16 %x) { %tmp = call i16 @llvm.cttz.i16( i16 %x, i1 true ) ret i16 %tmp -; CHECK: cttz_i16: +; CHECK-LABEL: cttz_i16: ; CHECK: bsfw ; CHECK-NOT: cmov ; CHECK: ret @@ -30,7 +30,7 @@ define i16 @cttz_i16(i16 %x) { define i32 @cttz_i32(i32 %x) { %tmp = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ret i32 %tmp -; CHECK: cttz_i32: +; CHECK-LABEL: cttz_i32: ; CHECK: bsfl ; CHECK-NOT: cmov ; CHECK: ret @@ -39,7 +39,7 @@ define i32 @cttz_i32(i32 %x) { define i64 @cttz_i64(i64 %x) { %tmp = call i64 @llvm.cttz.i64( i64 %x, i1 true ) ret i64 %tmp -; CHECK: cttz_i64: +; CHECK-LABEL: cttz_i64: ; CHECK: bsfq ; CHECK-NOT: cmov ; CHECK: ret @@ -49,7 +49,7 @@ define i8 @ctlz_i8(i8 %x) { entry: %tmp2 = call i8 @llvm.ctlz.i8( i8 %x, i1 true ) ret i8 %tmp2 -; CHECK: ctlz_i8: +; CHECK-LABEL: ctlz_i8: ; CHECK: bsrl ; CHECK-NOT: cmov ; CHECK: xorl $7, @@ -60,7 +60,7 @@ define i16 @ctlz_i16(i16 %x) { entry: %tmp2 = call i16 @llvm.ctlz.i16( i16 %x, i1 true ) ret i16 %tmp2 -; CHECK: ctlz_i16: +; CHECK-LABEL: ctlz_i16: ; CHECK: bsrw ; CHECK-NOT: cmov ; CHECK: xorl $15, @@ -70,7 +70,7 @@ entry: define i32 @ctlz_i32(i32 %x) { %tmp = call i32 @llvm.ctlz.i32( i32 %x, i1 true ) ret i32 %tmp -; CHECK: ctlz_i32: +; CHECK-LABEL: ctlz_i32: ; CHECK: bsrl ; CHECK-NOT: cmov ; CHECK: xorl $31, @@ -80,7 +80,7 @@ define i32 @ctlz_i32(i32 %x) { define i64 @ctlz_i64(i64 %x) { %tmp = call i64 @llvm.ctlz.i64( i64 %x, i1 true ) ret i64 %tmp -; CHECK: ctlz_i64: +; CHECK-LABEL: ctlz_i64: ; CHECK: bsrq ; CHECK-NOT: cmov ; CHECK: xorq $63, @@ -90,7 +90,7 @@ define i64 @ctlz_i64(i64 %x) { define i32 @ctlz_i32_cmov(i32 %n) { entry: ; Generate a cmov to handle zero inputs when necessary. -; CHECK: ctlz_i32_cmov: +; CHECK-LABEL: ctlz_i32_cmov: ; CHECK: bsrl ; CHECK: cmov ; CHECK: xorl $31, @@ -104,7 +104,7 @@ entry: ; Don't generate the cmovne when the source is known non-zero (and bsr would ; not set ZF). ; rdar://9490949 -; CHECK: ctlz_i32_fold_cmov: +; CHECK-LABEL: ctlz_i32_fold_cmov: ; CHECK: bsrl ; CHECK-NOT: cmov ; CHECK: xorl $31, @@ -118,7 +118,7 @@ define i32 @ctlz_bsr(i32 %n) { entry: ; Don't generate any xors when a 'ctlz' intrinsic is actually used to compute ; the most significant bit, which is what 'bsr' does natively. -; CHECK: ctlz_bsr: +; CHECK-LABEL: ctlz_bsr: ; CHECK: bsrl ; CHECK-NOT: xorl ; CHECK: ret @@ -131,7 +131,7 @@ define i32 @ctlz_bsr_cmov(i32 %n) { entry: ; Same as ctlz_bsr, but ensure this happens even when there is a potential ; zero. -; CHECK: ctlz_bsr_cmov: +; CHECK-LABEL: ctlz_bsr_cmov: ; CHECK: bsrl ; CHECK-NOT: xorl ; CHECK: ret diff --git a/test/CodeGen/X86/codegen-prepare.ll b/test/CodeGen/X86/codegen-prepare.ll index e8ee070..316accf 100644 --- a/test/CodeGen/X86/codegen-prepare.ll +++ b/test/CodeGen/X86/codegen-prepare.ll @@ -38,7 +38,7 @@ if.end: ; preds = %if.then, %if.else, ret void } -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: movss 12([[THIS:%[a-zA-Z0-9]+]]), [[REGISTER:%[a-zA-Z0-9]+]] ; CHECK-NEXT: movss [[REGISTER]], 60([[THIS]]) diff --git a/test/CodeGen/X86/codemodel.ll b/test/CodeGen/X86/codemodel.ll index b6ca1ce..3aebc13 100644 --- a/test/CodeGen/X86/codemodel.ll +++ b/test/CodeGen/X86/codemodel.ll @@ -7,9 +7,9 @@ target triple = "x86_64-unknown-linux-gnu" define i32 @foo() nounwind readonly { entry: -; CHECK-SMALL: foo: +; CHECK-SMALL-LABEL: foo: ; CHECK-SMALL: movl data(%rip), %eax -; CHECK-KERNEL: foo: +; CHECK-KERNEL-LABEL: foo: ; CHECK-KERNEL: movl data, %eax %0 = load i32* getelementptr ([0 x i32]* @data, i64 0, i64 0), align 4 ; <i32> [#uses=1] ret i32 %0 @@ -17,9 +17,9 @@ entry: define i32 @foo2() nounwind readonly { entry: -; CHECK-SMALL: foo2: +; CHECK-SMALL-LABEL: foo2: ; CHECK-SMALL: movl data+40(%rip), %eax -; CHECK-KERNEL: foo2: +; CHECK-KERNEL-LABEL: foo2: ; CHECK-KERNEL: movl data+40, %eax %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 10), align 4 ; <i32> [#uses=1] ret i32 %0 @@ -27,9 +27,9 @@ entry: define i32 @foo3() nounwind readonly { entry: -; CHECK-SMALL: foo3: +; CHECK-SMALL-LABEL: foo3: ; CHECK-SMALL: movl data-40(%rip), %eax -; CHECK-KERNEL: foo3: +; CHECK-KERNEL-LABEL: foo3: ; CHECK-KERNEL: movq $-40, %rax %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -10), align 4 ; <i32> [#uses=1] ret i32 %0 @@ -38,10 +38,10 @@ entry: define i32 @foo4() nounwind readonly { entry: ; FIXME: We really can use movabsl here! -; CHECK-SMALL: foo4: +; CHECK-SMALL-LABEL: foo4: ; CHECK-SMALL: movl $16777216, %eax ; CHECK-SMALL: movl data(%rax), %eax -; CHECK-KERNEL: foo4: +; CHECK-KERNEL-LABEL: foo4: ; CHECK-KERNEL: movl data+16777216, %eax %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194304), align 4 ; <i32> [#uses=1] ret i32 %0 @@ -49,18 +49,18 @@ entry: define i32 @foo1() nounwind readonly { entry: -; CHECK-SMALL: foo1: +; CHECK-SMALL-LABEL: foo1: ; CHECK-SMALL: movl data+16777212(%rip), %eax -; CHECK-KERNEL: foo1: +; CHECK-KERNEL-LABEL: foo1: ; CHECK-KERNEL: movl data+16777212, %eax %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194303), align 4 ; <i32> [#uses=1] ret i32 %0 } define i32 @foo5() nounwind readonly { entry: -; CHECK-SMALL: foo5: +; CHECK-SMALL-LABEL: foo5: ; CHECK-SMALL: movl data-16777216(%rip), %eax -; CHECK-KERNEL: foo5: +; CHECK-KERNEL-LABEL: foo5: ; CHECK-KERNEL: movq $-16777216, %rax %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -4194304), align 4 ; <i32> [#uses=1] ret i32 %0 diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll index 0ceea29..eb44e08 100644 --- a/test/CodeGen/X86/commute-two-addr.ll +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -11,7 +11,7 @@ declare void @ext(i32) define i32 @t1(i32 %X, i32 %Y) nounwind { -; LINUX: t1: +; LINUX-LABEL: t1: ; LINUX: movl 4(%esp), %eax ; LINUX: movl 8(%esp), %ecx ; LINUX: addl %eax, %ecx @@ -22,7 +22,7 @@ define i32 @t1(i32 %X, i32 %Y) nounwind { } define i32 @t2(i32 %X, i32 %Y) nounwind { -; LINUX: t2: +; LINUX-LABEL: t2: ; LINUX: movl 4(%esp), %eax ; LINUX: movl 8(%esp), %ecx ; LINUX: xorl %eax, %ecx @@ -37,7 +37,7 @@ define i32 @t2(i32 %X, i32 %Y) nounwind { define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { entry: -; DARWIN: t3: +; DARWIN-LABEL: t3: ; DARWIN: shll $16 ; DARWIN: shlq $32, %rcx ; DARWIN-NOT: leaq diff --git a/test/CodeGen/X86/compare-inf.ll b/test/CodeGen/X86/compare-inf.ll index 9aa44a3..d592fc1 100644 --- a/test/CodeGen/X86/compare-inf.ll +++ b/test/CodeGen/X86/compare-inf.ll @@ -3,7 +3,7 @@ ; Convert oeq and une to ole/oge/ule/uge when comparing with infinity ; and negative infinity, because those are more efficient on x86. -; CHECK: oeq_inff: +; CHECK-LABEL: oeq_inff: ; CHECK: ucomiss ; CHECK: jb define float @oeq_inff(float %x, float %y) nounwind readonly { @@ -12,7 +12,7 @@ define float @oeq_inff(float %x, float %y) nounwind readonly { ret float %t1 } -; CHECK: oeq_inf: +; CHECK-LABEL: oeq_inf: ; CHECK: ucomisd ; CHECK: jb define double @oeq_inf(double %x, double %y) nounwind readonly { @@ -21,7 +21,7 @@ define double @oeq_inf(double %x, double %y) nounwind readonly { ret double %t1 } -; CHECK: une_inff: +; CHECK-LABEL: une_inff: ; CHECK: ucomiss ; CHECK: jae define float @une_inff(float %x, float %y) nounwind readonly { @@ -30,7 +30,7 @@ define float @une_inff(float %x, float %y) nounwind readonly { ret float %t1 } -; CHECK: une_inf: +; CHECK-LABEL: une_inf: ; CHECK: ucomisd ; CHECK: jae define double @une_inf(double %x, double %y) nounwind readonly { @@ -39,7 +39,7 @@ define double @une_inf(double %x, double %y) nounwind readonly { ret double %t1 } -; CHECK: oeq_neg_inff: +; CHECK-LABEL: oeq_neg_inff: ; CHECK: ucomiss ; CHECK: jb define float @oeq_neg_inff(float %x, float %y) nounwind readonly { @@ -48,7 +48,7 @@ define float @oeq_neg_inff(float %x, float %y) nounwind readonly { ret float %t1 } -; CHECK: oeq_neg_inf: +; CHECK-LABEL: oeq_neg_inf: ; CHECK: ucomisd ; CHECK: jb define double @oeq_neg_inf(double %x, double %y) nounwind readonly { @@ -57,7 +57,7 @@ define double @oeq_neg_inf(double %x, double %y) nounwind readonly { ret double %t1 } -; CHECK: une_neg_inff: +; CHECK-LABEL: une_neg_inff: ; CHECK: ucomiss ; CHECK: jae define float @une_neg_inff(float %x, float %y) nounwind readonly { @@ -66,7 +66,7 @@ define float @une_neg_inff(float %x, float %y) nounwind readonly { ret float %t1 } -; CHECK: une_neg_inf: +; CHECK-LABEL: une_neg_inf: ; CHECK: ucomisd ; CHECK: jae define double @une_neg_inf(double %x, double %y) nounwind readonly { diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll index 06d739c..cadc0fb 100644 --- a/test/CodeGen/X86/extractelement-load.ll +++ b/test/CodeGen/X86/extractelement-load.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | FileCheck %s define i32 @t(<2 x i64>* %val) nounwind { -; CHECK: t: +; CHECK-LABEL: t: ; CHECK-NOT: movd ; CHECK: movl 8( ; CHECK-NEXT: ret @@ -15,7 +15,7 @@ define i32 @t(<2 x i64>* %val) nounwind { ; Case where extractelement of load ends up as undef. ; (Making sure this doesn't crash.) define i32 @t2(<8 x i32>* %xp) { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: ret %x = load <8 x i32>* %xp %Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 diff --git a/test/CodeGen/X86/fast-isel-fneg.ll b/test/CodeGen/X86/fast-isel-fneg.ll index 67fdad2..8b38587 100644 --- a/test/CodeGen/X86/fast-isel-fneg.ll +++ b/test/CodeGen/X86/fast-isel-fneg.ll @@ -5,14 +5,14 @@ ; SSE2: xor ; SSE2-NOT: xor -; CHECK: doo: +; CHECK-LABEL: doo: ; CHECK: xor define double @doo(double %x) nounwind { %y = fsub double -0.0, %x ret double %y } -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: xor define float @foo(float %x) nounwind { %y = fsub float -0.0, %x diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll index 52b1e85..7fcef03 100644 --- a/test/CodeGen/X86/fast-isel-mem.ll +++ b/test/CodeGen/X86/fast-isel-mem.ll @@ -12,7 +12,7 @@ entry: store i32 %2, i32* @src ret i32 %2 ; This should fold one of the loads into the add. -; CHECK: loadgv: +; CHECK-LABEL: loadgv: ; CHECK: movl L_src$non_lazy_ptr, %ecx ; CHECK: movl (%ecx), %eax ; CHECK: addl (%ecx), %eax diff --git a/test/CodeGen/X86/fast-isel-ret-ext.ll b/test/CodeGen/X86/fast-isel-ret-ext.ll index 395ad1e..0370d99 100644 --- a/test/CodeGen/X86/fast-isel-ret-ext.ll +++ b/test/CodeGen/X86/fast-isel-ret-ext.ll @@ -4,35 +4,35 @@ define zeroext i8 @test1(i32 %y) nounwind { %conv = trunc i32 %y to i8 ret i8 %conv - ; CHECK: test1: + ; CHECK-LABEL: test1: ; CHECK: movzbl {{.*}}, %eax } define signext i8 @test2(i32 %y) nounwind { %conv = trunc i32 %y to i8 ret i8 %conv - ; CHECK: test2: + ; CHECK-LABEL: test2: ; CHECK: movsbl {{.*}}, %eax } define zeroext i16 @test3(i32 %y) nounwind { %conv = trunc i32 %y to i16 ret i16 %conv - ; CHECK: test3: + ; CHECK-LABEL: test3: ; CHECK: movzwl {{.*}}, %eax } define signext i16 @test4(i32 %y) nounwind { %conv = trunc i32 %y to i16 ret i16 %conv - ; CHECK: test4: + ; CHECK-LABEL: test4: ; CHECK: {{(movswl.%.x, %eax|cwtl)}} } define zeroext i1 @test5(i32 %y) nounwind { %conv = trunc i32 %y to i1 ret i1 %conv - ; CHECK: test5: + ; CHECK-LABEL: test5: ; CHECK: andb $1 ; CHECK: movzbl {{.*}}, %eax } diff --git a/test/CodeGen/X86/fast-isel-tls.ll b/test/CodeGen/X86/fast-isel-tls.ll index 0963c52..f71abd2 100644 --- a/test/CodeGen/X86/fast-isel-tls.ll +++ b/test/CodeGen/X86/fast-isel-tls.ll @@ -9,7 +9,7 @@ entry: ret i32 %s } -; CHECK: f: +; CHECK-LABEL: f: ; CHECK: leal v@TLSGD ; CHECK: __tls_get_addr @@ -21,6 +21,6 @@ entry: ret i32 %s } -; CHECK: f_alias: +; CHECK-LABEL: f_alias: ; CHECK: leal v@TLSGD ; CHECK: __tls_get_addr diff --git a/test/CodeGen/X86/fold-add.ll b/test/CodeGen/X86/fold-add.ll index 63e7d36..0b27387 100644 --- a/test/CodeGen/X86/fold-add.ll +++ b/test/CodeGen/X86/fold-add.ll @@ -7,7 +7,7 @@ target triple = "x86_64-apple-darwin9.6" @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i32)* @longest_match to i8*)] ; <[1 x i8*]*> [#uses=0] define fastcc i32 @longest_match(i32 %cur_match) nounwind { -; CHECK: longest_match: +; CHECK-LABEL: longest_match: ; CHECK-NOT: ret ; CHECK: cmpb $0, (%r{{.*}},%r{{.*}}) ; CHECK: ret diff --git a/test/CodeGen/X86/fold-and-shift.ll b/test/CodeGen/X86/fold-and-shift.ll index 93baa0e..a5eb8b5 100644 --- a/test/CodeGen/X86/fold-and-shift.ll +++ b/test/CodeGen/X86/fold-and-shift.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86 | FileCheck %s define i32 @t1(i8* %X, i32 %i) { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK-NOT: and ; CHECK: movzbl ; CHECK: movl (%{{...}},%{{...}},4), @@ -17,7 +17,7 @@ entry: } define i32 @t2(i16* %X, i32 %i) { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK-NOT: and ; CHECK: movzwl ; CHECK: movl (%{{...}},%{{...}},4), @@ -39,7 +39,7 @@ define i32 @t3(i16* %i.ptr, i32* %arr) { ; To make matters worse, because of the two-phase zext of %i and their reuse in ; the function, the DAG can get confusing trying to re-use both of them and ; prevent easy analysis of the mask in order to match this. -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK-NOT: and ; CHECK: shrl ; CHECK: addl (%{{...}},%{{...}},4), @@ -58,7 +58,7 @@ entry: define i32 @t4(i16* %i.ptr, i32* %arr) { ; A version of @t3 that has more zero extends and more re-use of intermediate ; values. This exercise slightly different bits of canonicalization. -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK-NOT: and ; CHECK: shrl ; CHECK: addl (%{{...}},%{{...}},4), diff --git a/test/CodeGen/X86/fold-pcmpeqd-1.ll b/test/CodeGen/X86/fold-pcmpeqd-1.ll index d850630..663e2af 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-1.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-1.ll @@ -2,14 +2,14 @@ define <2 x double> @foo() nounwind { ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>) -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: pcmpeqd %xmm0, %xmm0 ; CHECK-NOT: %xmm ; CHECK: ret } define <2 x double> @bar() nounwind { ret <2 x double> bitcast (<2 x i64><i64 0, i64 0> to <2 x double>) -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: xorps %xmm0, %xmm0 ; CHECK-NOT: %xmm ; CHECK: ret diff --git a/test/CodeGen/X86/fold-pcmpeqd-2.ll b/test/CodeGen/X86/fold-pcmpeqd-2.ll index 2bde76e..0a3afb7 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-2.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-2.ll @@ -11,7 +11,7 @@ ; CHECK: .space 16,255 ; No pcmpeqd instructions, everybody uses the constant pool. -; CHECK: program_1: +; CHECK-LABEL: program_1: ; CHECK-NOT: pcmpeqd %struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }> diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll index 2ada194..95defc8 100644 --- a/test/CodeGen/X86/force-align-stack-alloca.ll +++ b/test/CodeGen/X86/force-align-stack-alloca.ll @@ -16,7 +16,7 @@ entry: } define i64 @g(i32 %i) nounwind { -; CHECK: g: +; CHECK-LABEL: g: ; CHECK: pushl %ebp ; CHECK-NEXT: movl %esp, %ebp ; CHECK-NEXT: pushl diff --git a/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll b/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll index 3468a45..c3b2dfb 100644 --- a/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll +++ b/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s define void @bar(i32 %argc) #0 { -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: pushq %rbp entry: %conv = sitofp i32 %argc to double @@ -14,7 +14,7 @@ entry: } define void @qux(i32 %argc) #1 { -; CHECK: qux: +; CHECK-LABEL: qux: ; CHECK-NOT: pushq %rbp entry: %conv = sitofp i32 %argc to double diff --git a/test/CodeGen/X86/fp-elim.ll b/test/CodeGen/X86/fp-elim.ll index 60892a2..d43ee36 100644 --- a/test/CodeGen/X86/fp-elim.ll +++ b/test/CodeGen/X86/fp-elim.ll @@ -7,16 +7,16 @@ define i32 @t1() nounwind readnone { entry: -; FP-ELIM: t1: +; FP-ELIM-LABEL: t1: ; FP-ELIM-NEXT: movl ; FP-ELIM-NEXT: ret -; NO-ELIM: t1: +; NO-ELIM-LABEL: t1: ; NO-ELIM-NEXT: pushl %ebp ; NO-ELIM: popl %ebp ; NO-ELIM-NEXT: ret -; NON-LEAF: t1: +; NON-LEAF-LABEL: t1: ; NON-LEAF-NEXT: movl ; NON-LEAF-NEXT: ret ret i32 10 @@ -24,16 +24,16 @@ entry: define void @t2() nounwind { entry: -; FP-ELIM: t2: +; FP-ELIM-LABEL: t2: ; FP-ELIM-NOT: pushl %ebp ; FP-ELIM: ret -; NO-ELIM: t2: +; NO-ELIM-LABEL: t2: ; NO-ELIM-NEXT: pushl %ebp ; NO-ELIM: popl %ebp ; NO-ELIM-NEXT: ret -; NON-LEAF: t2: +; NON-LEAF-LABEL: t2: ; NON-LEAF-NEXT: pushl %ebp ; NON-LEAF: popl %ebp ; NON-LEAF-NEXT: ret diff --git a/test/CodeGen/X86/fp_constant_op.ll b/test/CodeGen/X86/fp_constant_op.ll index b3ec538..3cd32e6 100644 --- a/test/CodeGen/X86/fp_constant_op.ll +++ b/test/CodeGen/X86/fp_constant_op.ll @@ -6,41 +6,41 @@ define double @foo_add(double %P) { %tmp.1 = fadd double %P, 1.230000e+02 ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_add: +; CHECK-LABEL: foo_add: ; CHECK: fadd DWORD PTR define double @foo_mul(double %P) { %tmp.1 = fmul double %P, 1.230000e+02 ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_mul: +; CHECK-LABEL: foo_mul: ; CHECK: fmul DWORD PTR define double @foo_sub(double %P) { %tmp.1 = fsub double %P, 1.230000e+02 ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_sub: +; CHECK-LABEL: foo_sub: ; CHECK: fadd DWORD PTR define double @foo_subr(double %P) { %tmp.1 = fsub double 1.230000e+02, %P ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_subr: +; CHECK-LABEL: foo_subr: ; CHECK: fsub QWORD PTR define double @foo_div(double %P) { %tmp.1 = fdiv double %P, 1.230000e+02 ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_div: +; CHECK-LABEL: foo_div: ; CHECK: fdiv DWORD PTR define double @foo_divr(double %P) { %tmp.1 = fdiv double 1.230000e+02, %P ; <double> [#uses=1] ret double %tmp.1 } -; CHECK: foo_divr: +; CHECK-LABEL: foo_divr: ; CHECK: fdiv QWORD PTR diff --git a/test/CodeGen/X86/h-registers-0.ll b/test/CodeGen/X86/h-registers-0.ll index cdc75af..71b3b43 100644 --- a/test/CodeGen/X86/h-registers-0.ll +++ b/test/CodeGen/X86/h-registers-0.ll @@ -6,17 +6,17 @@ ; of h registers yet, due to x86 encoding complications. define void @bar64(i64 inreg %x, i8* inreg %p) nounwind { -; X86-64: bar64: +; X86-64-LABEL: bar64: ; X86-64: shrq $8, %rdi ; X86-64: incb %dil ; See FIXME: on regclass GR8. ; It could be optimally transformed like; incb %ch; movb %ch, (%rdx) -; WIN64: bar64: +; WIN64-LABEL: bar64: ; WIN64: shrq $8, %rcx ; WIN64: incb %cl -; X86-32: bar64: +; X86-32-LABEL: bar64: ; X86-32: incb %ah %t0 = lshr i64 %x, 8 %t1 = trunc i64 %t0 to i8 @@ -26,15 +26,15 @@ define void @bar64(i64 inreg %x, i8* inreg %p) nounwind { } define void @bar32(i32 inreg %x, i8* inreg %p) nounwind { -; X86-64: bar32: +; X86-64-LABEL: bar32: ; X86-64: shrl $8, %edi ; X86-64: incb %dil -; WIN64: bar32: +; WIN64-LABEL: bar32: ; WIN64: shrl $8, %ecx ; WIN64: incb %cl -; X86-32: bar32: +; X86-32-LABEL: bar32: ; X86-32: incb %ah %t0 = lshr i32 %x, 8 %t1 = trunc i32 %t0 to i8 @@ -44,15 +44,15 @@ define void @bar32(i32 inreg %x, i8* inreg %p) nounwind { } define void @bar16(i16 inreg %x, i8* inreg %p) nounwind { -; X86-64: bar16: +; X86-64-LABEL: bar16: ; X86-64: shrl $8, %edi ; X86-64: incb %dil -; WIN64: bar16: +; WIN64-LABEL: bar16: ; WIN64: shrl $8, %ecx ; WIN64: incb %cl -; X86-32: bar16: +; X86-32-LABEL: bar16: ; X86-32: incb %ah %t0 = lshr i16 %x, 8 %t1 = trunc i16 %t0 to i8 @@ -62,14 +62,14 @@ define void @bar16(i16 inreg %x, i8* inreg %p) nounwind { } define i64 @qux64(i64 inreg %x) nounwind { -; X86-64: qux64: +; X86-64-LABEL: qux64: ; X86-64: movq %rdi, %rax ; X86-64: movzbl %ah, %eax -; WIN64: qux64: +; WIN64-LABEL: qux64: ; WIN64: movzbl %ch, %eax -; X86-32: qux64: +; X86-32-LABEL: qux64: ; X86-32: movzbl %ah, %eax %t0 = lshr i64 %x, 8 %t1 = and i64 %t0, 255 @@ -77,14 +77,14 @@ define i64 @qux64(i64 inreg %x) nounwind { } define i32 @qux32(i32 inreg %x) nounwind { -; X86-64: qux32: +; X86-64-LABEL: qux32: ; X86-64: movl %edi, %eax ; X86-64: movzbl %ah, %eax -; WIN64: qux32: +; WIN64-LABEL: qux32: ; WIN64: movzbl %ch, %eax -; X86-32: qux32: +; X86-32-LABEL: qux32: ; X86-32: movzbl %ah, %eax %t0 = lshr i32 %x, 8 %t1 = and i32 %t0, 255 @@ -92,14 +92,14 @@ define i32 @qux32(i32 inreg %x) nounwind { } define i16 @qux16(i16 inreg %x) nounwind { -; X86-64: qux16: +; X86-64-LABEL: qux16: ; X86-64: movl %edi, %eax ; X86-64: movzbl %ah, %eax -; WIN64: qux16: +; WIN64-LABEL: qux16: ; WIN64: movzbl %ch, %eax -; X86-32: qux16: +; X86-32-LABEL: qux16: ; X86-32: movzbl %ah, %eax %t0 = lshr i16 %x, 8 ret i16 %t0 diff --git a/test/CodeGen/X86/h-registers-2.ll b/test/CodeGen/X86/h-registers-2.ll index 488444c..91acb7d 100644 --- a/test/CodeGen/X86/h-registers-2.ll +++ b/test/CodeGen/X86/h-registers-2.ll @@ -4,7 +4,7 @@ ; non-address use(s). define i32 @foo(i8* %x, i32 %y) nounwind { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: ret ; CHECK: movzbl %{{[abcd]h}}, ; CHECK-NOT: ret diff --git a/test/CodeGen/X86/haddsub.ll b/test/CodeGen/X86/haddsub.ll index 5f1f4fd..9feb5f6 100644 --- a/test/CodeGen/X86/haddsub.ll +++ b/test/CodeGen/X86/haddsub.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -march=x86-64 -mattr=+sse3,-avx | FileCheck %s -check-prefix=SSE3 ; RUN: llc < %s -march=x86-64 -mattr=-sse3,+avx | FileCheck %s -check-prefix=AVX -; SSE3: haddpd1: +; SSE3-LABEL: haddpd1: ; SSE3-NOT: vhaddpd ; SSE3: haddpd -; AVX: haddpd1: +; AVX-LABEL: haddpd1: ; AVX: vhaddpd define <2 x double> @haddpd1(<2 x double> %x, <2 x double> %y) { %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 0, i32 2> @@ -13,10 +13,10 @@ define <2 x double> @haddpd1(<2 x double> %x, <2 x double> %y) { ret <2 x double> %r } -; SSE3: haddpd2: +; SSE3-LABEL: haddpd2: ; SSE3-NOT: vhaddpd ; SSE3: haddpd -; AVX: haddpd2: +; AVX-LABEL: haddpd2: ; AVX: vhaddpd define <2 x double> @haddpd2(<2 x double> %x, <2 x double> %y) { %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 1, i32 2> @@ -25,10 +25,10 @@ define <2 x double> @haddpd2(<2 x double> %x, <2 x double> %y) { ret <2 x double> %r } -; SSE3: haddpd3: +; SSE3-LABEL: haddpd3: ; SSE3-NOT: vhaddpd ; SSE3: haddpd -; AVX: haddpd3: +; AVX-LABEL: haddpd3: ; AVX: vhaddpd define <2 x double> @haddpd3(<2 x double> %x) { %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> <i32 0, i32 undef> @@ -37,10 +37,10 @@ define <2 x double> @haddpd3(<2 x double> %x) { ret <2 x double> %r } -; SSE3: haddps1: +; SSE3-LABEL: haddps1: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps1: +; AVX-LABEL: haddps1: ; AVX: vhaddps define <4 x float> @haddps1(<4 x float> %x, <4 x float> %y) { %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6> @@ -49,10 +49,10 @@ define <4 x float> @haddps1(<4 x float> %x, <4 x float> %y) { ret <4 x float> %r } -; SSE3: haddps2: +; SSE3-LABEL: haddps2: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps2: +; AVX-LABEL: haddps2: ; AVX: vhaddps define <4 x float> @haddps2(<4 x float> %x, <4 x float> %y) { %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> <i32 1, i32 2, i32 5, i32 6> @@ -61,10 +61,10 @@ define <4 x float> @haddps2(<4 x float> %x, <4 x float> %y) { ret <4 x float> %r } -; SSE3: haddps3: +; SSE3-LABEL: haddps3: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps3: +; AVX-LABEL: haddps3: ; AVX: vhaddps define <4 x float> @haddps3(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6> @@ -73,10 +73,10 @@ define <4 x float> @haddps3(<4 x float> %x) { ret <4 x float> %r } -; SSE3: haddps4: +; SSE3-LABEL: haddps4: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps4: +; AVX-LABEL: haddps4: ; AVX: vhaddps define <4 x float> @haddps4(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> @@ -85,10 +85,10 @@ define <4 x float> @haddps4(<4 x float> %x) { ret <4 x float> %r } -; SSE3: haddps5: +; SSE3-LABEL: haddps5: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps5: +; AVX-LABEL: haddps5: ; AVX: vhaddps define <4 x float> @haddps5(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 undef, i32 undef> @@ -97,10 +97,10 @@ define <4 x float> @haddps5(<4 x float> %x) { ret <4 x float> %r } -; SSE3: haddps6: +; SSE3-LABEL: haddps6: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps6: +; AVX-LABEL: haddps6: ; AVX: vhaddps define <4 x float> @haddps6(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> @@ -109,10 +109,10 @@ define <4 x float> @haddps6(<4 x float> %x) { ret <4 x float> %r } -; SSE3: haddps7: +; SSE3-LABEL: haddps7: ; SSE3-NOT: vhaddps ; SSE3: haddps -; AVX: haddps7: +; AVX-LABEL: haddps7: ; AVX: vhaddps define <4 x float> @haddps7(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 undef, i32 3, i32 undef, i32 undef> @@ -121,10 +121,10 @@ define <4 x float> @haddps7(<4 x float> %x) { ret <4 x float> %r } -; SSE3: hsubpd1: +; SSE3-LABEL: hsubpd1: ; SSE3-NOT: vhsubpd ; SSE3: hsubpd -; AVX: hsubpd1: +; AVX-LABEL: hsubpd1: ; AVX: vhsubpd define <2 x double> @hsubpd1(<2 x double> %x, <2 x double> %y) { %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 0, i32 2> @@ -133,10 +133,10 @@ define <2 x double> @hsubpd1(<2 x double> %x, <2 x double> %y) { ret <2 x double> %r } -; SSE3: hsubpd2: +; SSE3-LABEL: hsubpd2: ; SSE3-NOT: vhsubpd ; SSE3: hsubpd -; AVX: hsubpd2: +; AVX-LABEL: hsubpd2: ; AVX: vhsubpd define <2 x double> @hsubpd2(<2 x double> %x) { %a = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> <i32 0, i32 undef> @@ -145,10 +145,10 @@ define <2 x double> @hsubpd2(<2 x double> %x) { ret <2 x double> %r } -; SSE3: hsubps1: +; SSE3-LABEL: hsubps1: ; SSE3-NOT: vhsubps ; SSE3: hsubps -; AVX: hsubps1: +; AVX-LABEL: hsubps1: ; AVX: vhsubps define <4 x float> @hsubps1(<4 x float> %x, <4 x float> %y) { %a = shufflevector <4 x float> %x, <4 x float> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6> @@ -157,10 +157,10 @@ define <4 x float> @hsubps1(<4 x float> %x, <4 x float> %y) { ret <4 x float> %r } -; SSE3: hsubps2: +; SSE3-LABEL: hsubps2: ; SSE3-NOT: vhsubps ; SSE3: hsubps -; AVX: hsubps2: +; AVX-LABEL: hsubps2: ; AVX: vhsubps define <4 x float> @hsubps2(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6> @@ -169,10 +169,10 @@ define <4 x float> @hsubps2(<4 x float> %x) { ret <4 x float> %r } -; SSE3: hsubps3: +; SSE3-LABEL: hsubps3: ; SSE3-NOT: vhsubps ; SSE3: hsubps -; AVX: hsubps3: +; AVX-LABEL: hsubps3: ; AVX: vhsubps define <4 x float> @hsubps3(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> @@ -181,10 +181,10 @@ define <4 x float> @hsubps3(<4 x float> %x) { ret <4 x float> %r } -; SSE3: hsubps4: +; SSE3-LABEL: hsubps4: ; SSE3-NOT: vhsubps ; SSE3: hsubps -; AVX: hsubps4: +; AVX-LABEL: hsubps4: ; AVX: vhsubps define <4 x float> @hsubps4(<4 x float> %x) { %a = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> @@ -193,11 +193,11 @@ define <4 x float> @hsubps4(<4 x float> %x) { ret <4 x float> %r } -; SSE3: vhaddps1: +; SSE3-LABEL: vhaddps1: ; SSE3-NOT: vhaddps ; SSE3: haddps ; SSE3: haddps -; AVX: vhaddps1: +; AVX-LABEL: vhaddps1: ; AVX: vhaddps define <8 x float> @vhaddps1(<8 x float> %x, <8 x float> %y) { %a = shufflevector <8 x float> %x, <8 x float> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14> @@ -206,11 +206,11 @@ define <8 x float> @vhaddps1(<8 x float> %x, <8 x float> %y) { ret <8 x float> %r } -; SSE3: vhaddps2: +; SSE3-LABEL: vhaddps2: ; SSE3-NOT: vhaddps ; SSE3: haddps ; SSE3: haddps -; AVX: vhaddps2: +; AVX-LABEL: vhaddps2: ; AVX: vhaddps define <8 x float> @vhaddps2(<8 x float> %x, <8 x float> %y) { %a = shufflevector <8 x float> %x, <8 x float> %y, <8 x i32> <i32 1, i32 2, i32 9, i32 10, i32 5, i32 6, i32 13, i32 14> @@ -219,11 +219,11 @@ define <8 x float> @vhaddps2(<8 x float> %x, <8 x float> %y) { ret <8 x float> %r } -; SSE3: vhaddps3: +; SSE3-LABEL: vhaddps3: ; SSE3-NOT: vhaddps ; SSE3: haddps ; SSE3: haddps -; AVX: vhaddps3: +; AVX-LABEL: vhaddps3: ; AVX: vhaddps define <8 x float> @vhaddps3(<8 x float> %x) { %a = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 undef, i32 2, i32 8, i32 10, i32 4, i32 6, i32 undef, i32 14> @@ -232,11 +232,11 @@ define <8 x float> @vhaddps3(<8 x float> %x) { ret <8 x float> %r } -; SSE3: vhsubps1: +; SSE3-LABEL: vhsubps1: ; SSE3-NOT: vhsubps ; SSE3: hsubps ; SSE3: hsubps -; AVX: vhsubps1: +; AVX-LABEL: vhsubps1: ; AVX: vhsubps define <8 x float> @vhsubps1(<8 x float> %x, <8 x float> %y) { %a = shufflevector <8 x float> %x, <8 x float> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14> @@ -245,11 +245,11 @@ define <8 x float> @vhsubps1(<8 x float> %x, <8 x float> %y) { ret <8 x float> %r } -; SSE3: vhsubps3: +; SSE3-LABEL: vhsubps3: ; SSE3-NOT: vhsubps ; SSE3: hsubps ; SSE3: hsubps -; AVX: vhsubps3: +; AVX-LABEL: vhsubps3: ; AVX: vhsubps define <8 x float> @vhsubps3(<8 x float> %x) { %a = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 undef, i32 2, i32 8, i32 10, i32 4, i32 6, i32 undef, i32 14> @@ -258,11 +258,11 @@ define <8 x float> @vhsubps3(<8 x float> %x) { ret <8 x float> %r } -; SSE3: vhaddpd1: +; SSE3-LABEL: vhaddpd1: ; SSE3-NOT: vhaddpd ; SSE3: haddpd ; SSE3: haddpd -; AVX: vhaddpd1: +; AVX-LABEL: vhaddpd1: ; AVX: vhaddpd define <4 x double> @vhaddpd1(<4 x double> %x, <4 x double> %y) { %a = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 0, i32 4, i32 2, i32 6> @@ -271,11 +271,11 @@ define <4 x double> @vhaddpd1(<4 x double> %x, <4 x double> %y) { ret <4 x double> %r } -; SSE3: vhsubpd1: +; SSE3-LABEL: vhsubpd1: ; SSE3-NOT: vhsubpd ; SSE3: hsubpd ; SSE3: hsubpd -; AVX: vhsubpd1: +; AVX-LABEL: vhsubpd1: ; AVX: vhsubpd define <4 x double> @vhsubpd1(<4 x double> %x, <4 x double> %y) { %a = shufflevector <4 x double> %x, <4 x double> %y, <4 x i32> <i32 0, i32 4, i32 2, i32 6> diff --git a/test/CodeGen/X86/hidden-vis-4.ll b/test/CodeGen/X86/hidden-vis-4.ll index a8aede5..25a87b9 100644 --- a/test/CodeGen/X86/hidden-vis-4.ll +++ b/test/CodeGen/X86/hidden-vis-4.ll @@ -4,7 +4,7 @@ define i32 @t() nounwind readonly { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movl _x, %eax ; CHECK: .comm _x,4 %0 = load i32* @x, align 4 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/hidden-vis.ll b/test/CodeGen/X86/hidden-vis.ll index fcb74fc..a072cb0 100644 --- a/test/CodeGen/X86/hidden-vis.ll +++ b/test/CodeGen/X86/hidden-vis.ll @@ -9,12 +9,12 @@ define weak hidden void @t1() nounwind { ; LINUX: .hidden t1 -; LINUX: t1: +; LINUX-LABEL: t1: ; DARWIN: .private_extern _t1 -; DARWIN: t1: +; DARWIN-LABEL: t1: -; WINDOWS: t1: +; WINDOWS-LABEL: t1: ; WINDOWS-NOT: hidden ret void } diff --git a/test/CodeGen/X86/hipe-prologue.ll b/test/CodeGen/X86/hipe-prologue.ll index ff3c5c8..2f16423 100644 --- a/test/CodeGen/X86/hipe-prologue.ll +++ b/test/CodeGen/X86/hipe-prologue.ll @@ -9,10 +9,10 @@ declare void @dummy_use(i32*, i32) define {i32, i32} @test_basic(i32 %hp, i32 %p) { - ; X32-Linux: test_basic: + ; X32-Linux-LABEL: test_basic: ; X32-Linux-NOT: calll inc_stack_0 - ; X64-Linux: test_basic: + ; X64-Linux-LABEL: test_basic: ; X64-Linux-NOT: callq inc_stack_0 %mem = alloca i32, i32 10 @@ -23,7 +23,7 @@ define {i32, i32} @test_basic(i32 %hp, i32 %p) { } define cc 11 {i32, i32} @test_basic_hipecc(i32 %hp, i32 %p) { - ; X32-Linux: test_basic_hipecc: + ; X32-Linux-LABEL: test_basic_hipecc: ; X32-Linux: leal -156(%esp), %ebx ; X32-Linux-NEXT: cmpl 76(%ebp), %ebx ; X32-Linux-NEXT: jb .LBB1_1 @@ -33,7 +33,7 @@ define cc 11 {i32, i32} @test_basic_hipecc(i32 %hp, i32 %p) { ; X32-Linux: .LBB1_1: ; X32-Linux-NEXT: calll inc_stack_0 - ; X64-Linux: test_basic_hipecc: + ; X64-Linux-LABEL: test_basic_hipecc: ; X64-Linux: leaq -232(%rsp), %r14 ; X64-Linux-NEXT: cmpq 144(%rbp), %r14 ; X64-Linux-NEXT: jb .LBB1_1 @@ -51,10 +51,10 @@ define cc 11 {i32, i32} @test_basic_hipecc(i32 %hp, i32 %p) { } define cc 11 {i32,i32,i32} @test_nocall_hipecc(i32 %hp,i32 %p,i32 %x,i32 %y) { - ; X32-Linux: test_nocall_hipecc: + ; X32-Linux-LABEL: test_nocall_hipecc: ; X32-Linux-NOT: calll inc_stack_0 - ; X64-Linux: test_nocall_hipecc: + ; X64-Linux-LABEL: test_nocall_hipecc: ; X64-Linux-NOT: callq inc_stack_0 %1 = add i32 %x, %y diff --git a/test/CodeGen/X86/hoist-common.ll b/test/CodeGen/X86/hoist-common.ll index cdfdea3..6b26876 100644 --- a/test/CodeGen/X86/hoist-common.ll +++ b/test/CodeGen/X86/hoist-common.ll @@ -7,7 +7,7 @@ define zeroext i1 @t(i32 %c) nounwind ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: xorl %eax, %eax ; CHECK: test ; CHECK: je diff --git a/test/CodeGen/X86/i128-sdiv.ll b/test/CodeGen/X86/i128-sdiv.ll index ab5cdda..89cd495 100644 --- a/test/CodeGen/X86/i128-sdiv.ll +++ b/test/CodeGen/X86/i128-sdiv.ll @@ -3,21 +3,21 @@ ; trigger correctly. define i128 @test1(i128 %x) { - ; CHECK: test1: + ; CHECK-LABEL: test1: ; CHECK-NOT: call %tmp = sdiv i128 %x, 73786976294838206464 ret i128 %tmp } define i128 @test2(i128 %x) { - ; CHECK: test2: + ; CHECK-LABEL: test2: ; CHECK-NOT: call %tmp = sdiv i128 %x, -73786976294838206464 ret i128 %tmp } define i128 @test3(i128 %x) { - ; CHECK: test3: + ; CHECK-LABEL: test3: ; CHECK: call %tmp = sdiv i128 %x, -73786976294838206467 ret i128 %tmp diff --git a/test/CodeGen/X86/inline-asm-R-constraint.ll b/test/CodeGen/X86/inline-asm-R-constraint.ll index 66c27ac..d17e04d 100644 --- a/test/CodeGen/X86/inline-asm-R-constraint.ll +++ b/test/CodeGen/X86/inline-asm-R-constraint.ll @@ -6,7 +6,7 @@ target triple = "x86_64-apple-darwin10.0" define void @udiv8(i8* %quotient, i16 zeroext %a, i8 zeroext %b, i8 zeroext %c, i8* %remainder) nounwind ssp { entry: -; CHECK: udiv8: +; CHECK-LABEL: udiv8: ; CHECK-NOT: movb %ah, (%r8) %a_addr = alloca i16, align 2 ; <i16*> [#uses=2] %b_addr = alloca i8, align 1 ; <i8*> [#uses=2] diff --git a/test/CodeGen/X86/inreg.ll b/test/CodeGen/X86/inreg.ll index 6653cfb..e4610e3 100644 --- a/test/CodeGen/X86/inreg.ll +++ b/test/CodeGen/X86/inreg.ll @@ -8,7 +8,7 @@ entry: %tmp = alloca %struct.s1, align 4 call void @f(%struct.s1* inreg sret %tmp, i32 inreg 41, i32 inreg 42, i32 43) ret void - ; DAG: g1: + ; DAG-LABEL: g1: ; DAG: subl $[[AMT:.*]], %esp ; DAG-NEXT: $43, (%esp) ; DAG-NEXT: leal 16(%esp), %eax @@ -18,7 +18,7 @@ entry: ; DAG-NEXT: addl $[[AMT]], %esp ; DAG-NEXT: ret - ; FAST: g1: + ; FAST-LABEL: g1: ; FAST: subl $[[AMT:.*]], %esp ; FAST-NEXT: leal 8(%esp), %eax ; FAST-NEXT: movl $41, %edx diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll index 8367436..bec98a2 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-1.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll @@ -2,7 +2,7 @@ define fastcc i32 @t() nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movzwl 0, %eax ; CHECK: orl $2, %eax ; CHECK: movw %ax, 0 diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll index 91ac942..3d3a9a9 100644 --- a/test/CodeGen/X86/jump_sign.ll +++ b/test/CodeGen/X86/jump_sign.ll @@ -2,7 +2,7 @@ define i32 @f(i32 %X) { entry: -; CHECK: f: +; CHECK-LABEL: f: ; CHECK: jns %tmp1 = add i32 %X, 1 ; <i32> [#uses=1] %tmp = icmp slt i32 %tmp1, 0 ; <i1> [#uses=1] @@ -25,7 +25,7 @@ declare i32 @baz(...) ; rdar://11355268 define i32 @g(i32 %a, i32 %b) nounwind { entry: -; CHECK: g: +; CHECK-LABEL: g: ; CHECK-NOT: test ; CHECK: cmovs %sub = sub nsw i32 %a, %b @@ -37,7 +37,7 @@ entry: ; rdar://10734411 define i32 @h(i32 %a, i32 %b) nounwind { entry: -; CHECK: h: +; CHECK-LABEL: h: ; CHECK-NOT: cmp ; CHECK: cmov ; CHECK-NOT: movl @@ -49,7 +49,7 @@ entry: } define i32 @i(i32 %a, i32 %b) nounwind { entry: -; CHECK: i: +; CHECK-LABEL: i: ; CHECK-NOT: cmp ; CHECK: cmov ; CHECK-NOT: movl @@ -61,7 +61,7 @@ entry: } define i32 @j(i32 %a, i32 %b) nounwind { entry: -; CHECK: j: +; CHECK-LABEL: j: ; CHECK-NOT: cmp ; CHECK: cmov ; CHECK-NOT: movl @@ -73,7 +73,7 @@ entry: } define i32 @k(i32 %a, i32 %b) nounwind { entry: -; CHECK: k: +; CHECK-LABEL: k: ; CHECK-NOT: cmp ; CHECK: cmov ; CHECK-NOT: movl @@ -86,7 +86,7 @@ entry: ; redundant cmp instruction define i32 @l(i32 %a, i32 %b) nounwind { entry: -; CHECK: l: +; CHECK-LABEL: l: ; CHECK-NOT: cmp %cmp = icmp slt i32 %b, %a %sub = sub nsw i32 %a, %b @@ -95,7 +95,7 @@ entry: } define i32 @m(i32 %a, i32 %b) nounwind { entry: -; CHECK: m: +; CHECK-LABEL: m: ; CHECK-NOT: cmp %cmp = icmp sgt i32 %a, %b %sub = sub nsw i32 %a, %b @@ -106,7 +106,7 @@ entry: ; a swapped sub. define i32 @l2(i32 %a, i32 %b) nounwind { entry: -; CHECK: l2: +; CHECK-LABEL: l2: ; CHECK: cmp %cmp = icmp eq i32 %b, %a %sub = sub nsw i32 %a, %b @@ -122,7 +122,7 @@ if.else: } define i32 @l3(i32 %a, i32 %b) nounwind { entry: -; CHECK: l3: +; CHECK-LABEL: l3: ; CHECK: sub ; CHECK-NOT: cmp ; CHECK: jge @@ -141,7 +141,7 @@ if.else: ; When Movr0 is between sub and cmp, we need to move "Movr0" before sub. define i32 @l4(i32 %a, i32 %b) nounwind { entry: -; CHECK: l4: +; CHECK-LABEL: l4: ; CHECK: xor ; CHECK: sub ; CHECK-NOT: cmp @@ -153,7 +153,7 @@ entry: ; rdar://11540023 define i32 @n(i32 %x, i32 %y) nounwind { entry: -; CHECK: n: +; CHECK-LABEL: n: ; CHECK-NOT: sub ; CHECK: cmp %sub = sub nsw i32 %x, %y @@ -177,7 +177,7 @@ sw.bb: ; preds = %if.end.i br i1 undef, label %if.then44, label %if.end29 if.end29: ; preds = %sw.bb -; CHECK: o: +; CHECK-LABEL: o: ; CHECK: cmp %1 = urem i16 %0, 10 %cmp25 = icmp eq i16 %1, 0 @@ -206,7 +206,7 @@ if.else.i104: ; preds = %if.then44 ; rdar://11855129 define i32 @p(i32 %a, i32 %b) nounwind { entry: -; CHECK: p: +; CHECK-LABEL: p: ; CHECK-NOT: test ; CHECK: cmovs %add = add nsw i32 %b, %a @@ -218,7 +218,7 @@ entry: ; If we have sub a, b and cmp b, a and the result of cmp is used ; by sbb, we should not optimize cmp away. define i32 @q(i32 %j.4, i32 %w, i32 %el) { -; CHECK: q: +; CHECK-LABEL: q: ; CHECK: cmp ; CHECK-NEXT: sbb %tmp532 = add i32 %j.4, %w @@ -232,7 +232,7 @@ define i32 @q(i32 %j.4, i32 %w, i32 %el) { ; rdar://11873276 define i8* @r(i8* %base, i32* nocapture %offset, i32 %size) nounwind { entry: -; CHECK: r: +; CHECK-LABEL: r: ; CHECK: sub ; CHECK-NOT: cmp ; CHECK: j @@ -256,7 +256,7 @@ return: ; Test optimizations of dec/inc. define i32 @dec(i32 %a) nounwind { entry: -; CHECK: dec: +; CHECK-LABEL: dec: ; CHECK: decl ; CHECK-NOT: test ; CHECK: cmovsl @@ -268,7 +268,7 @@ entry: define i32 @inc(i32 %a) nounwind { entry: -; CHECK: inc: +; CHECK-LABEL: inc: ; CHECK: incl ; CHECK-NOT: test ; CHECK: cmovsl diff --git a/test/CodeGen/X86/lock-inst-encoding.ll b/test/CodeGen/X86/lock-inst-encoding.ll index 9765fae..5ce771f 100644 --- a/test/CodeGen/X86/lock-inst-encoding.ll +++ b/test/CodeGen/X86/lock-inst-encoding.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: addq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x01,0x37] ; CHECK: ret define void @f1(i64* %a, i64 %b) nounwind { @@ -11,7 +11,7 @@ define void @f1(i64* %a, i64 %b) nounwind { ret void } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: subq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x29,0x37] ; CHECK: ret define void @f2(i64* %a, i64 %b) nounwind { @@ -19,7 +19,7 @@ define void @f2(i64* %a, i64 %b) nounwind { ret void } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: andq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x21,0x37] ; CHECK: ret define void @f3(i64* %a, i64 %b) nounwind { @@ -27,7 +27,7 @@ define void @f3(i64* %a, i64 %b) nounwind { ret void } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: orq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x09,0x37] ; CHECK: ret define void @f4(i64* %a, i64 %b) nounwind { @@ -35,7 +35,7 @@ define void @f4(i64* %a, i64 %b) nounwind { ret void } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: xorq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x31,0x37] ; CHECK: ret define void @f5(i64* %a, i64 %b) nounwind { diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index 4bd162b..a81ceb9 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -6,7 +6,7 @@ ; CodeGen should insert a branch into the middle of the loop in ; order to avoid a branch within the loop. -; CHECK: simple: +; CHECK-LABEL: simple: ; CHECK: jmp .LBB0_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB0_2: @@ -36,7 +36,7 @@ done: ; CodeGen should move block_a to the top of the loop so that it ; falls through into the loop, avoiding a branch within the loop. -; CHECK: slightly_more_involved: +; CHECK-LABEL: slightly_more_involved: ; CHECK: jmp .LBB1_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_4: @@ -72,7 +72,7 @@ exit: ; fallthrough edges which should be preserved. ; "callq block_a_merge_func" is tail duped. -; CHECK: yet_more_involved: +; CHECK-LABEL: yet_more_involved: ; CHECK: jmp .LBB2_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB2_5: @@ -132,7 +132,7 @@ exit: ; conveniently fit anywhere so that they are at least contiguous with the ; loop. -; CHECK: cfg_islands: +; CHECK-LABEL: cfg_islands: ; CHECK: jmp .LBB3_1 ; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_7: diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll index 8a81f70..68048ab 100644 --- a/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -1,12 +1,12 @@ ; RUN: llc -mtriple=x86_64-darwin -mcpu=generic < %s | FileCheck %s ; RUN: llc -mtriple=x86_64-darwin -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: decq ; CHECK-NEXT: movl (%r9,%rax,4), %eax ; CHECK-NEXT: jne -; ATOM: t: +; ATOM-LABEL: t: ; ATOM: movl (%r9,%rax,4), %eax ; ATOM-NEXT: decq ; ATOM-NEXT: jne @@ -148,14 +148,14 @@ bb2: ; preds = %bb ; is equal to the stride. ; It must not fold (cmp (add iv, 1), 1) --> (cmp iv, 0). -; CHECK: f: +; CHECK-LABEL: f: ; CHECK: %for.body ; CHECK: incl [[IV:%e..]] ; CHECK: cmpl $1, [[IV]] ; CHECK: jne ; CHECK: ret -; ATOM: f: +; ATOM-LABEL: f: ; ATOM: %for.body ; ATOM: incl [[IV:%e..]] ; ATOM: cmpl $1, [[IV]] diff --git a/test/CodeGen/X86/lsr-reuse.ll b/test/CodeGen/X86/lsr-reuse.ll index a267450..40c041a 100644 --- a/test/CodeGen/X86/lsr-reuse.ll +++ b/test/CodeGen/X86/lsr-reuse.ll @@ -8,7 +8,7 @@ target triple = "x86_64-unknown-unknown" ; Instruction selection should use the FLAGS value from the dec for ; the branch. Scheduling should push the adds upwards. -; CHECK: full_me_0: +; CHECK-LABEL: full_me_0: ; CHECK: movsd (%rsi), %xmm0 ; CHECK: mulsd (%rdx), %xmm0 ; CHECK: movsd %xmm0, (%rdi) @@ -50,7 +50,7 @@ return: ; would be better on x86-64, since the start value would be 0 instead of ; 2048. -; CHECK: mostly_full_me_0: +; CHECK-LABEL: mostly_full_me_0: ; CHECK: movsd -2048(%rsi), %xmm0 ; CHECK: mulsd -2048(%rdx), %xmm0 ; CHECK: movsd %xmm0, -2048(%rdi) @@ -96,7 +96,7 @@ return: ; A minor variation on mostly_full_me_0. ; Prefer to start the indvar at 0. -; CHECK: mostly_full_me_1: +; CHECK-LABEL: mostly_full_me_1: ; CHECK: movsd (%rsi), %xmm0 ; CHECK: mulsd (%rdx), %xmm0 ; CHECK: movsd %xmm0, (%rdi) @@ -141,7 +141,7 @@ return: ; A slightly less minor variation on mostly_full_me_0. -; CHECK: mostly_full_me_2: +; CHECK-LABEL: mostly_full_me_2: ; CHECK: movsd (%rsi), %xmm0 ; CHECK: mulsd (%rdx), %xmm0 ; CHECK: movsd %xmm0, (%rdi) @@ -190,7 +190,7 @@ return: ; cases away, but it's useful here to verify that LSR's register pressure ; heuristics are working as expected. -; CHECK: count_me_0: +; CHECK-LABEL: count_me_0: ; CHECK: movsd (%rsi,%rax,8), %xmm0 ; CHECK: mulsd (%rdx,%rax,8), %xmm0 ; CHECK: movsd %xmm0, (%rdi,%rax,8) @@ -225,7 +225,7 @@ return: ; would not reduce register pressure. ; (though it would reduce register pressure inside the loop...) -; CHECK: count_me_1: +; CHECK-LABEL: count_me_1: ; CHECK: movsd (%rsi,%rax,8), %xmm0 ; CHECK: mulsd (%rdx,%rax,8), %xmm0 ; CHECK: movsd %xmm0, (%rdi,%rax,8) @@ -259,7 +259,7 @@ return: ; Full strength reduction doesn't save any registers here because the ; loop tripcount is a constant. -; CHECK: count_me_2: +; CHECK-LABEL: count_me_2: ; CHECK: movl $10, %eax ; CHECK: align ; CHECK: BB6_1: @@ -305,7 +305,7 @@ return: ; This should be fully strength-reduced to reduce register pressure. -; CHECK: full_me_1: +; CHECK-LABEL: full_me_1: ; CHECK: align ; CHECK: BB7_1: ; CHECK: movsd (%rdi), %xmm0 @@ -353,7 +353,7 @@ return: ; This is a variation on full_me_0 in which the 0,+,1 induction variable ; has a non-address use, pinning that value in a register. -; CHECK: count_me_3: +; CHECK-LABEL: count_me_3: ; CHECK: call ; CHECK: movsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0 ; CHECK: mulsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0 @@ -390,7 +390,7 @@ return: ; LSR should use only one indvar for the inner loop. ; rdar://7657764 -; CHECK: asd: +; CHECK-LABEL: asd: ; CHECK: BB9_4: ; CHECK-NEXT: addl (%r{{[^,]*}},%rdi,4), %e ; CHECK-NEXT: incq %rdi diff --git a/test/CodeGen/X86/lzcnt.ll b/test/CodeGen/X86/lzcnt.ll index 2faa24a..ff83f85 100644 --- a/test/CodeGen/X86/lzcnt.ll +++ b/test/CodeGen/X86/lzcnt.ll @@ -8,55 +8,55 @@ declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone define i8 @t1(i8 %x) nounwind { %tmp = tail call i8 @llvm.ctlz.i8( i8 %x, i1 false ) ret i8 %tmp -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: lzcntl } define i16 @t2(i16 %x) nounwind { %tmp = tail call i16 @llvm.ctlz.i16( i16 %x, i1 false ) ret i16 %tmp -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: lzcntw } define i32 @t3(i32 %x) nounwind { %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 false ) ret i32 %tmp -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: lzcntl } define i64 @t4(i64 %x) nounwind { %tmp = tail call i64 @llvm.ctlz.i64( i64 %x, i1 false ) ret i64 %tmp -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: lzcntq } define i8 @t5(i8 %x) nounwind { %tmp = tail call i8 @llvm.ctlz.i8( i8 %x, i1 true ) ret i8 %tmp -; CHECK: t5: +; CHECK-LABEL: t5: ; CHECK: lzcntl } define i16 @t6(i16 %x) nounwind { %tmp = tail call i16 @llvm.ctlz.i16( i16 %x, i1 true ) ret i16 %tmp -; CHECK: t6: +; CHECK-LABEL: t6: ; CHECK: lzcntw } define i32 @t7(i32 %x) nounwind { %tmp = tail call i32 @llvm.ctlz.i32( i32 %x, i1 true ) ret i32 %tmp -; CHECK: t7: +; CHECK-LABEL: t7: ; CHECK: lzcntl } define i64 @t8(i64 %x) nounwind { %tmp = tail call i64 @llvm.ctlz.i64( i64 %x, i1 true ) ret i64 %tmp -; CHECK: t8: +; CHECK-LABEL: t8: ; CHECK: lzcntq } diff --git a/test/CodeGen/X86/machine-cp.ll b/test/CodeGen/X86/machine-cp.ll index 8e97b99..f04e111 100644 --- a/test/CodeGen/X86/machine-cp.ll +++ b/test/CodeGen/X86/machine-cp.ll @@ -4,7 +4,7 @@ ; rdar://10640363 define i32 @t1(i32 %a, i32 %b) nounwind { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: je [[LABEL:.*BB.*]] %cmp1 = icmp eq i32 %b, 0 br i1 %cmp1, label %while.end, label %while.body @@ -29,7 +29,7 @@ while.end: ; preds = %while.body, %entry ; rdar://10428165 define <8 x i16> @t2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK-NOT: movdqa %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef > ret <8 x i16> %tmp8 diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index b42d82e..409147b 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -8,7 +8,7 @@ define fastcc i8* @t(i32 %base) nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: leaq (%rax,%rax,4) %0 = zext i32 %base to i64 %1 = getelementptr inbounds %struct.s2* null, i64 %0 @@ -43,7 +43,7 @@ declare fastcc i8* @foo(%struct.s2*) nounwind declare void @printf(...) nounwind define void @commute(i32 %test_case, i32 %scale) nounwind ssp { -; CHECK: commute: +; CHECK-LABEL: commute: entry: switch i32 %test_case, label %sw.bb307 [ i32 1, label %sw.bb @@ -83,7 +83,7 @@ sw.bb307: ; preds = %sw.bb, %entry ; rdar://10660865 define i32 @cross_mbb_phys_cse(i32 %a, i32 %b) nounwind ssp { entry: -; CHECK: cross_mbb_phys_cse: +; CHECK-LABEL: cross_mbb_phys_cse: ; CHECK: cmpl ; CHECK: ja %cmp = icmp ugt i32 %a, %b @@ -153,7 +153,7 @@ a: b: ret i32 0 -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: t2_global@GOTPCREL(%rip) ; CHECK-NOT: t2_global@GOTPCREL(%rip) } diff --git a/test/CodeGen/X86/mcinst-lowering.ll b/test/CodeGen/X86/mcinst-lowering.ll index 391f939..a82cfc4 100644 --- a/test/CodeGen/X86/mcinst-lowering.ll +++ b/test/CodeGen/X86/mcinst-lowering.ll @@ -30,7 +30,7 @@ define i32 @f1() nounwind { %conv = sext i16 %ax to i32 ret i32 %conv -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: cwtl ## encoding: [0x98] } @@ -39,6 +39,6 @@ define i64 @f2() nounwind { %conv = sext i32 %eax to i64 ret i64 %conv -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: cltq ## encoding: [0x48,0x98] } diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll index 723d1d8..cb0797d 100644 --- a/test/CodeGen/X86/memcmp.ll +++ b/test/CodeGen/X86/memcmp.ll @@ -21,10 +21,10 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp2: +; CHECK-LABEL: memcmp2: ; CHECK: movw ([[A0:%rdi|%rcx]]), %ax ; CHECK: cmpw ([[A1:%rsi|%rdx]]), %ax -; NOBUILTIN: memcmp2: +; NOBUILTIN-LABEL: memcmp2: ; NOBUILTIN: callq } @@ -40,7 +40,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp2a: +; CHECK-LABEL: memcmp2a: ; CHECK: cmpw $28527, ([[A0]]) } @@ -57,7 +57,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp4: +; CHECK-LABEL: memcmp4: ; CHECK: movl ([[A0]]), %eax ; CHECK: cmpl ([[A1]]), %eax } @@ -74,7 +74,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp4a: +; CHECK-LABEL: memcmp4a: ; CHECK: cmpl $1869573999, ([[A0]]) } @@ -90,7 +90,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp8: +; CHECK-LABEL: memcmp8: ; CHECK: movq ([[A0]]), %rax ; CHECK: cmpq ([[A1]]), %rax } @@ -107,7 +107,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void -; CHECK: memcmp8a: +; CHECK-LABEL: memcmp8a: ; CHECK: movabsq $8029759185026510694, %rax ; CHECK: cmpq %rax, ([[A0]]) } diff --git a/test/CodeGen/X86/memcpy-2.ll b/test/CodeGen/X86/memcpy-2.ll index 630c0ed..c17cc7f 100644 --- a/test/CodeGen/X86/memcpy-2.ll +++ b/test/CodeGen/X86/memcpy-2.ll @@ -9,28 +9,28 @@ define void @t1(i32 %argc, i8** %argv) nounwind { entry: -; SSE2-Darwin: t1: +; SSE2-Darwin-LABEL: t1: ; SSE2-Darwin: movsd _.str+16, %xmm0 ; SSE2-Darwin: movsd %xmm0, 16(%esp) ; SSE2-Darwin: movaps _.str, %xmm0 ; SSE2-Darwin: movaps %xmm0 ; SSE2-Darwin: movb $0, 24(%esp) -; SSE2-Mingw32: t1: +; SSE2-Mingw32-LABEL: t1: ; SSE2-Mingw32: movsd _.str+16, %xmm0 ; SSE2-Mingw32: movsd %xmm0, 16(%esp) ; SSE2-Mingw32: movaps _.str, %xmm0 ; SSE2-Mingw32: movups %xmm0 ; SSE2-Mingw32: movb $0, 24(%esp) -; SSE1: t1: +; SSE1-LABEL: t1: ; SSE1: movaps _.str, %xmm0 ; SSE1: movaps %xmm0 ; SSE1: movb $0, 24(%esp) ; SSE1: movl $0, 20(%esp) ; SSE1: movl $0, 16(%esp) -; NOSSE: t1: +; NOSSE-LABEL: t1: ; NOSSE: movb $0 ; NOSSE: movl $0 ; NOSSE: movl $0 @@ -39,7 +39,7 @@ entry: ; NOSSE: movl $101 ; NOSSE: movl $1734438249 -; X86-64: t1: +; X86-64-LABEL: t1: ; X86-64: movaps _.str(%rip), %xmm0 ; X86-64: movaps %xmm0 ; X86-64: movb $0 @@ -55,19 +55,19 @@ entry: define void @t2(%struct.s0* nocapture %a, %struct.s0* nocapture %b) nounwind ssp { entry: -; SSE2-Darwin: t2: +; SSE2-Darwin-LABEL: t2: ; SSE2-Darwin: movaps (%eax), %xmm0 ; SSE2-Darwin: movaps %xmm0, (%eax) -; SSE2-Mingw32: t2: +; SSE2-Mingw32-LABEL: t2: ; SSE2-Mingw32: movaps (%eax), %xmm0 ; SSE2-Mingw32: movaps %xmm0, (%eax) -; SSE1: t2: +; SSE1-LABEL: t2: ; SSE1: movaps (%eax), %xmm0 ; SSE1: movaps %xmm0, (%eax) -; NOSSE: t2: +; NOSSE-LABEL: t2: ; NOSSE: movl ; NOSSE: movl ; NOSSE: movl @@ -79,7 +79,7 @@ entry: ; NOSSE: movl ; NOSSE: movl -; X86-64: t2: +; X86-64-LABEL: t2: ; X86-64: movaps (%rsi), %xmm0 ; X86-64: movaps %xmm0, (%rdi) %tmp2 = bitcast %struct.s0* %a to i8* ; <i8*> [#uses=1] @@ -90,19 +90,19 @@ entry: define void @t3(%struct.s0* nocapture %a, %struct.s0* nocapture %b) nounwind ssp { entry: -; SSE2-Darwin: t3: +; SSE2-Darwin-LABEL: t3: ; SSE2-Darwin: movsd (%eax), %xmm0 ; SSE2-Darwin: movsd 8(%eax), %xmm1 ; SSE2-Darwin: movsd %xmm1, 8(%eax) ; SSE2-Darwin: movsd %xmm0, (%eax) -; SSE2-Mingw32: t3: +; SSE2-Mingw32-LABEL: t3: ; SSE2-Mingw32: movsd (%eax), %xmm0 ; SSE2-Mingw32: movsd 8(%eax), %xmm1 ; SSE2-Mingw32: movsd %xmm1, 8(%eax) ; SSE2-Mingw32: movsd %xmm0, (%eax) -; SSE1: t3: +; SSE1-LABEL: t3: ; SSE1: movl ; SSE1: movl ; SSE1: movl @@ -114,7 +114,7 @@ entry: ; SSE1: movl ; SSE1: movl -; NOSSE: t3: +; NOSSE-LABEL: t3: ; NOSSE: movl ; NOSSE: movl ; NOSSE: movl @@ -126,7 +126,7 @@ entry: ; NOSSE: movl ; NOSSE: movl -; X86-64: t3: +; X86-64-LABEL: t3: ; X86-64: movq (%rsi), %rax ; X86-64: movq 8(%rsi), %rcx ; X86-64: movq %rcx, 8(%rdi) @@ -139,7 +139,7 @@ entry: define void @t4() nounwind { entry: -; SSE2-Darwin: t4: +; SSE2-Darwin-LABEL: t4: ; SSE2-Darwin: movw $120 ; SSE2-Darwin: movl $2021161080 ; SSE2-Darwin: movl $2021161080 @@ -149,7 +149,7 @@ entry: ; SSE2-Darwin: movl $2021161080 ; SSE2-Darwin: movl $2021161080 -; SSE2-Mingw32: t4: +; SSE2-Mingw32-LABEL: t4: ; SSE2-Mingw32: movw $120 ; SSE2-Mingw32: movl $2021161080 ; SSE2-Mingw32: movl $2021161080 @@ -159,7 +159,7 @@ entry: ; SSE2-Mingw32: movl $2021161080 ; SSE2-Mingw32: movl $2021161080 -; SSE1: t4: +; SSE1-LABEL: t4: ; SSE1: movw $120 ; SSE1: movl $2021161080 ; SSE1: movl $2021161080 @@ -169,7 +169,7 @@ entry: ; SSE1: movl $2021161080 ; SSE1: movl $2021161080 -; NOSSE: t4: +; NOSSE-LABEL: t4: ; NOSSE: movw $120 ; NOSSE: movl $2021161080 ; NOSSE: movl $2021161080 @@ -179,7 +179,7 @@ entry: ; NOSSE: movl $2021161080 ; NOSSE: movl $2021161080 -; X86-64: t4: +; X86-64-LABEL: t4: ; X86-64: movabsq $8680820740569200760, %rax ; X86-64: movq %rax ; X86-64: movq %rax diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll index b2bd72b..d0a3c7a 100644 --- a/test/CodeGen/X86/memset-2.ll +++ b/test/CodeGen/X86/memset-2.ll @@ -4,7 +4,7 @@ declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind define fastcc void @t1() nounwind { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: calll _memset call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false) unreachable @@ -12,7 +12,7 @@ entry: define fastcc void @t2(i8 signext %c) nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: calll _memset call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false) unreachable @@ -24,7 +24,7 @@ define void @t3(i8* nocapture %s, i8 %a) nounwind { entry: tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false) ret void -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: imull $16843009 } @@ -32,7 +32,7 @@ define void @t4(i8* nocapture %s, i8 %a) nounwind { entry: tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false) ret void -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: imull $16843009 ; CHECK-NOT: imul ; CHECK: ret diff --git a/test/CodeGen/X86/mmx-arg-passing.ll b/test/CodeGen/X86/mmx-arg-passing.ll index d9ea487..3a0fb95 100644 --- a/test/CodeGen/X86/mmx-arg-passing.ll +++ b/test/CodeGen/X86/mmx-arg-passing.ll @@ -13,10 +13,10 @@ define void @t1(x86_mmx %v1) nounwind { store x86_mmx %v1, x86_mmx* @u1, align 8 ret void -; X86-32: t1: +; X86-32-LABEL: t1: ; X86-32: movq %mm0 -; X86-64: t1: +; X86-64-LABEL: t1: ; X86-64: movdq2q %xmm0 ; X86-64: movq %mm0 } @@ -28,11 +28,11 @@ define void @t2(<1 x i64> %v1) nounwind { store x86_mmx %tmp, x86_mmx* @u2, align 8 ret void -; X86-32: t2: +; X86-32-LABEL: t2: ; X86-32: movl 4(%esp) ; X86-32: movl 8(%esp) -; X86-64: t2: +; X86-64-LABEL: t2: ; X86-64: movq %rdi } diff --git a/test/CodeGen/X86/mmx-shift.ll b/test/CodeGen/X86/mmx-shift.ll index 2b6dc6f..c7c6e75 100644 --- a/test/CodeGen/X86/mmx-shift.ll +++ b/test/CodeGen/X86/mmx-shift.ll @@ -8,7 +8,7 @@ entry: %retval1112 = bitcast x86_mmx %tmp6 to i64 ret i64 %retval1112 -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: psllq $32 } @@ -20,7 +20,7 @@ entry: %retval1112 = bitcast x86_mmx %tmp7 to i64 ret i64 %retval1112 -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: psrad } @@ -32,7 +32,7 @@ entry: %retval1314 = bitcast x86_mmx %tmp8 to i64 ret i64 %retval1314 -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: psrlw } diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index e5afb27..d3930fa 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -45,12 +45,12 @@ entry: %3 = bitcast <4 x i32> %2 to <2 x i64> ret <2 x i64> %3 -; X32: pmovsxwd_1: +; X32-LABEL: pmovsxwd_1: ; X32: movl 4(%esp), %eax ; X32: pmovsxwd %gs:(%eax), %xmm0 ; X32: ret -; X64: pmovsxwd_1: +; X64-LABEL: pmovsxwd_1: ; X64: pmovsxwd %gs:([[A0]]), %xmm0 ; X64: ret } diff --git a/test/CodeGen/X86/movmsk.ll b/test/CodeGen/X86/movmsk.ll index 928ad03..2520662 100644 --- a/test/CodeGen/X86/movmsk.ll +++ b/test/CodeGen/X86/movmsk.ll @@ -83,7 +83,7 @@ define void @float_call_signbit(double %n) { entry: ; FIXME: This should also use movmskps; we don't form the FGETSIGN node ; in this case, though. -; CHECK: float_call_signbit: +; CHECK-LABEL: float_call_signbit: ; CHECK: movd %xmm0, %rdi ; FIXME %t0 = bitcast double %n to i64 @@ -99,7 +99,7 @@ declare void @float_call_signbit_callee(i1 zeroext) define i32 @t1(<4 x float> %x, i32* nocapture %indexTable) nounwind uwtable readonly ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: movmskps ; CHECK-NOT: movslq %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind @@ -111,7 +111,7 @@ entry: define i32 @t2(<4 x float> %x, i32* nocapture %indexTable) nounwind uwtable readonly ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: movmskpd ; CHECK-NOT: movslq %0 = bitcast <4 x float> %x to <2 x double> diff --git a/test/CodeGen/X86/ms-inline-asm.ll b/test/CodeGen/X86/ms-inline-asm.ll index 5048a93..5e7ba37 100644 --- a/test/CodeGen/X86/ms-inline-asm.ll +++ b/test/CodeGen/X86/ms-inline-asm.ll @@ -75,7 +75,7 @@ define void @t19() nounwind { entry: call void asm sideeffect inteldialect "call $0", "r,~{dirflag},~{fpsr},~{flags}"(void ()* @t19_helper) nounwind ret void -; CHECK: t19: +; CHECK-LABEL: t19: ; CHECK: movl %esp, %ebp ; CHECK: movl ${{_?}}t19_helper, %eax ; CHECK: {{## InlineAsm Start|#APP}} @@ -94,7 +94,7 @@ entry: call void asm sideeffect inteldialect "mov dword ptr $0, edi", "=*m,~{dirflag},~{fpsr},~{flags}"(i32** %res) nounwind %0 = load i32** %res, align 4 ret i32* %0 -; CHECK: t30: +; CHECK-LABEL: t30: ; CHECK: movl %esp, %ebp ; CHECK: {{## InlineAsm Start|#APP}} ; CHECK: .intel_syntax diff --git a/test/CodeGen/X86/narrow_op-1.ll b/test/CodeGen/X86/narrow_op-1.ll index d203d49..89ae3f1 100644 --- a/test/CodeGen/X86/narrow_op-1.ll +++ b/test/CodeGen/X86/narrow_op-1.ll @@ -10,7 +10,7 @@ entry: store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8 ret void -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: orb $1 ; CHECK-NEXT: ret } @@ -22,7 +22,7 @@ entry: store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8 ret void -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: orl $16842752 ; CHECK-NEXT: ret } diff --git a/test/CodeGen/X86/neg_cmp.ll b/test/CodeGen/X86/neg_cmp.ll index 866514e..7905072 100644 --- a/test/CodeGen/X86/neg_cmp.ll +++ b/test/CodeGen/X86/neg_cmp.ll @@ -4,7 +4,7 @@ ; PR12545 define void @f(i32 %x, i32 %y) nounwind uwtable ssp { entry: -; CHECK: f: +; CHECK-LABEL: f: ; CHECK-NOT: neg ; CHECK: add %sub = sub i32 0, %y diff --git a/test/CodeGen/X86/non-lazy-bind.ll b/test/CodeGen/X86/non-lazy-bind.ll index f729658..546a136 100644 --- a/test/CodeGen/X86/non-lazy-bind.ll +++ b/test/CodeGen/X86/non-lazy-bind.ll @@ -3,7 +3,7 @@ declare void @lazy() nonlazybind declare void @not() -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: callq _not ; CHECK: callq *_lazy@GOTPCREL(%rip) define void @foo() nounwind { @@ -12,14 +12,14 @@ define void @foo() nounwind { ret void } -; CHECK: tail_call_regular: +; CHECK-LABEL: tail_call_regular: ; CHECK: jmp _not define void @tail_call_regular() nounwind { tail call void @not() ret void } -; CHECK: tail_call_eager: +; CHECK-LABEL: tail_call_eager: ; CHECK: jmpq *_lazy@GOTPCREL(%rip) define void @tail_call_eager() nounwind { tail call void @lazy() diff --git a/test/CodeGen/X86/optimize-max-3.ll b/test/CodeGen/X86/optimize-max-3.ll index d092916..1b65373 100644 --- a/test/CodeGen/X86/optimize-max-3.ll +++ b/test/CodeGen/X86/optimize-max-3.ll @@ -3,7 +3,7 @@ ; LSR's OptimizeMax should eliminate the select (max). -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: cmov ; CHECK: jle @@ -37,7 +37,7 @@ for.end: ; preds = %for.body, %entry ; OptimizeMax should handle this case. ; PR7454 -; CHECK: _Z18GenerateStatusPagei: +; CHECK-LABEL: _Z18GenerateStatusPagei: ; CHECK: jle ; CHECK-NOT: cmov diff --git a/test/CodeGen/X86/palignr-2.ll b/test/CodeGen/X86/palignr-2.ll index 116d4c7..4df9a22 100644 --- a/test/CodeGen/X86/palignr-2.ll +++ b/test/CodeGen/X86/palignr-2.ll @@ -7,7 +7,7 @@ define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; palignr $3, %xmm1, %xmm0 %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 @@ -18,7 +18,7 @@ declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwin define void @t2() nounwind ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; palignr $4, _b, %xmm0 %0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] %1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/pass-three.ll b/test/CodeGen/X86/pass-three.ll index 23005c7..39ff69a 100644 --- a/test/CodeGen/X86/pass-three.ll +++ b/test/CodeGen/X86/pass-three.ll @@ -11,6 +11,6 @@ entry: ret { i8*, i64, i64* } %2 } -; CHECK: copy_3: +; CHECK-LABEL: copy_3: ; CHECK-NOT: (%rdi) ; CHECK: ret diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll index a7c456a..b3d4f58 100644 --- a/test/CodeGen/X86/peep-test-3.ll +++ b/test/CodeGen/X86/peep-test-3.ll @@ -3,7 +3,7 @@ ; LLVM should omit the testl and use the flags result from the orl. -; CHECK: or: +; CHECK-LABEL: or: define void @or(float* %A, i32 %IA, i32 %N) nounwind { entry: %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] @@ -22,7 +22,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void } -; CHECK: xor: +; CHECK-LABEL: xor: define void @xor(float* %A, i32 %IA, i32 %N) nounwind { entry: %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] @@ -41,7 +41,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void } -; CHECK: and: +; CHECK-LABEL: and: define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { entry: store i8 0, i8* %p diff --git a/test/CodeGen/X86/peep-test-4.ll b/test/CodeGen/X86/peep-test-4.ll index a1eea00..884ee7c 100644 --- a/test/CodeGen/X86/peep-test-4.ll +++ b/test/CodeGen/X86/peep-test-4.ll @@ -2,7 +2,7 @@ declare void @foo(i32) declare void @foo64(i64) -; CHECK: neg: +; CHECK-LABEL: neg: ; CHECK: negl %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -20,7 +20,7 @@ return: ret void } -; CHECK: sar: +; CHECK-LABEL: sar: ; CHECK: sarl %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -38,7 +38,7 @@ return: ret void } -; CHECK: shr: +; CHECK-LABEL: shr: ; CHECK: shrl %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -56,7 +56,7 @@ return: ret void } -; CHECK: shri: +; CHECK-LABEL: shri: ; CHECK: shrl $3, %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -74,7 +74,7 @@ return: ret void } -; CHECK: shl: +; CHECK-LABEL: shl: ; CHECK: addl %edi, %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -92,7 +92,7 @@ return: ret void } -; CHECK: shli: +; CHECK-LABEL: shli: ; CHECK: shll $4, %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -110,7 +110,7 @@ return: ret void } -; CHECK: adc: +; CHECK-LABEL: adc: ; CHECK: movabsq $-9223372036854775808, %rax ; CHECK-NEXT: addq %rdi, %rax ; CHECK-NEXT: adcq $0, %rsi @@ -122,7 +122,7 @@ define zeroext i1 @adc(i128 %x) nounwind { ret i1 %cmp } -; CHECK: sbb: +; CHECK-LABEL: sbb: ; CHECK: cmpq %rdx, %rdi ; CHECK-NEXT: sbbq %rcx, %rsi ; CHECK-NEXT: setns %al @@ -133,7 +133,7 @@ define zeroext i1 @sbb(i128 %x, i128 %y) nounwind { ret i1 %cmp } -; CHECK: andn: +; CHECK-LABEL: andn: ; CHECK: andnl %esi, %edi, %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -152,7 +152,7 @@ return: ret void } -; CHECK: bextr: +; CHECK-LABEL: bextr: ; CHECK: bextrl %esi, %edi, %edi ; CHECK-NEXT: je ; CHECK: jmp foo @@ -171,7 +171,7 @@ return: ret void } -; CHECK: popcnt: +; CHECK-LABEL: popcnt: ; CHECK: popcntl ; CHECK-NEXT: je ; CHECK: jmp foo diff --git a/test/CodeGen/X86/phaddsub.ll b/test/CodeGen/X86/phaddsub.ll index 62d85f7..17e7e1d 100644 --- a/test/CodeGen/X86/phaddsub.ll +++ b/test/CodeGen/X86/phaddsub.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -march=x86-64 -mattr=+ssse3,-avx | FileCheck %s -check-prefix=SSSE3 ; RUN: llc < %s -march=x86-64 -mattr=-ssse3,+avx | FileCheck %s -check-prefix=AVX -; SSSE3: phaddw1: +; SSSE3-LABEL: phaddw1: ; SSSE3-NOT: vphaddw ; SSSE3: phaddw -; AVX: phaddw1: +; AVX-LABEL: phaddw1: ; AVX: vphaddw define <8 x i16> @phaddw1(<8 x i16> %x, <8 x i16> %y) { %a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> @@ -13,10 +13,10 @@ define <8 x i16> @phaddw1(<8 x i16> %x, <8 x i16> %y) { ret <8 x i16> %r } -; SSSE3: phaddw2: +; SSSE3-LABEL: phaddw2: ; SSSE3-NOT: vphaddw ; SSSE3: phaddw -; AVX: phaddw2: +; AVX-LABEL: phaddw2: ; AVX: vphaddw define <8 x i16> @phaddw2(<8 x i16> %x, <8 x i16> %y) { %a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 1, i32 2, i32 5, i32 6, i32 9, i32 10, i32 13, i32 14> @@ -25,10 +25,10 @@ define <8 x i16> @phaddw2(<8 x i16> %x, <8 x i16> %y) { ret <8 x i16> %r } -; SSSE3: phaddd1: +; SSSE3-LABEL: phaddd1: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd1: +; AVX-LABEL: phaddd1: ; AVX: vphaddd define <4 x i32> @phaddd1(<4 x i32> %x, <4 x i32> %y) { %a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6> @@ -37,10 +37,10 @@ define <4 x i32> @phaddd1(<4 x i32> %x, <4 x i32> %y) { ret <4 x i32> %r } -; SSSE3: phaddd2: +; SSSE3-LABEL: phaddd2: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd2: +; AVX-LABEL: phaddd2: ; AVX: vphaddd define <4 x i32> @phaddd2(<4 x i32> %x, <4 x i32> %y) { %a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 1, i32 2, i32 5, i32 6> @@ -49,10 +49,10 @@ define <4 x i32> @phaddd2(<4 x i32> %x, <4 x i32> %y) { ret <4 x i32> %r } -; SSSE3: phaddd3: +; SSSE3-LABEL: phaddd3: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd3: +; AVX-LABEL: phaddd3: ; AVX: vphaddd define <4 x i32> @phaddd3(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6> @@ -61,10 +61,10 @@ define <4 x i32> @phaddd3(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phaddd4: +; SSSE3-LABEL: phaddd4: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd4: +; AVX-LABEL: phaddd4: ; AVX: vphaddd define <4 x i32> @phaddd4(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> @@ -73,10 +73,10 @@ define <4 x i32> @phaddd4(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phaddd5: +; SSSE3-LABEL: phaddd5: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd5: +; AVX-LABEL: phaddd5: ; AVX: vphaddd define <4 x i32> @phaddd5(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 undef, i32 undef> @@ -85,10 +85,10 @@ define <4 x i32> @phaddd5(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phaddd6: +; SSSE3-LABEL: phaddd6: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd6: +; AVX-LABEL: phaddd6: ; AVX: vphaddd define <4 x i32> @phaddd6(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> @@ -97,10 +97,10 @@ define <4 x i32> @phaddd6(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phaddd7: +; SSSE3-LABEL: phaddd7: ; SSSE3-NOT: vphaddd ; SSSE3: phaddd -; AVX: phaddd7: +; AVX-LABEL: phaddd7: ; AVX: vphaddd define <4 x i32> @phaddd7(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 3, i32 undef, i32 undef> @@ -109,10 +109,10 @@ define <4 x i32> @phaddd7(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phsubw1: +; SSSE3-LABEL: phsubw1: ; SSSE3-NOT: vphsubw ; SSSE3: phsubw -; AVX: phsubw1: +; AVX-LABEL: phsubw1: ; AVX: vphsubw define <8 x i16> @phsubw1(<8 x i16> %x, <8 x i16> %y) { %a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> @@ -121,10 +121,10 @@ define <8 x i16> @phsubw1(<8 x i16> %x, <8 x i16> %y) { ret <8 x i16> %r } -; SSSE3: phsubd1: +; SSSE3-LABEL: phsubd1: ; SSSE3-NOT: vphsubd ; SSSE3: phsubd -; AVX: phsubd1: +; AVX-LABEL: phsubd1: ; AVX: vphsubd define <4 x i32> @phsubd1(<4 x i32> %x, <4 x i32> %y) { %a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6> @@ -133,10 +133,10 @@ define <4 x i32> @phsubd1(<4 x i32> %x, <4 x i32> %y) { ret <4 x i32> %r } -; SSSE3: phsubd2: +; SSSE3-LABEL: phsubd2: ; SSSE3-NOT: vphsubd ; SSSE3: phsubd -; AVX: phsubd2: +; AVX-LABEL: phsubd2: ; AVX: vphsubd define <4 x i32> @phsubd2(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6> @@ -145,10 +145,10 @@ define <4 x i32> @phsubd2(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phsubd3: +; SSSE3-LABEL: phsubd3: ; SSSE3-NOT: vphsubd ; SSSE3: phsubd -; AVX: phsubd3: +; AVX-LABEL: phsubd3: ; AVX: vphsubd define <4 x i32> @phsubd3(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> @@ -157,10 +157,10 @@ define <4 x i32> @phsubd3(<4 x i32> %x) { ret <4 x i32> %r } -; SSSE3: phsubd4: +; SSSE3-LABEL: phsubd4: ; SSSE3-NOT: vphsubd ; SSSE3: phsubd -; AVX: phsubd4: +; AVX-LABEL: phsubd4: ; AVX: vphsubd define <4 x i32> @phsubd4(<4 x i32> %x) { %a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> diff --git a/test/CodeGen/X86/phys_subreg_coalesce-3.ll b/test/CodeGen/X86/phys_subreg_coalesce-3.ll index 2a20e7a..6eb97c3 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce-3.ll @@ -7,7 +7,7 @@ ; 336L %vreg15<def> = SAR32rCL %vreg15, %EFLAGS<imp-def,dead>, %CL<imp-use,kill>; GR32:%vreg15 define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp { -; CHECK: foo: +; CHECK-LABEL: foo: entry: %j.03 = add i32 %bbSize, -1 ; <i32> [#uses=2] %0 = icmp sgt i32 %j.03, -1 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/popcnt.ll b/test/CodeGen/X86/popcnt.ll index 430214c..e9350de 100644 --- a/test/CodeGen/X86/popcnt.ll +++ b/test/CodeGen/X86/popcnt.ll @@ -3,7 +3,7 @@ define i8 @cnt8(i8 %x) nounwind readnone { %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) ret i8 %cnt -; CHECK: cnt8: +; CHECK-LABEL: cnt8: ; CHECK: popcntw ; CHECK: ret } @@ -11,7 +11,7 @@ define i8 @cnt8(i8 %x) nounwind readnone { define i16 @cnt16(i16 %x) nounwind readnone { %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) ret i16 %cnt -; CHECK: cnt16: +; CHECK-LABEL: cnt16: ; CHECK: popcntw ; CHECK: ret } @@ -19,7 +19,7 @@ define i16 @cnt16(i16 %x) nounwind readnone { define i32 @cnt32(i32 %x) nounwind readnone { %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) ret i32 %cnt -; CHECK: cnt32: +; CHECK-LABEL: cnt32: ; CHECK: popcntl ; CHECK: ret } @@ -27,7 +27,7 @@ define i32 @cnt32(i32 %x) nounwind readnone { define i64 @cnt64(i64 %x) nounwind readnone { %cnt = tail call i64 @llvm.ctpop.i64(i64 %x) ret i64 %cnt -; CHECK: cnt64: +; CHECK-LABEL: cnt64: ; CHECK: popcntq ; CHECK: ret } diff --git a/test/CodeGen/X86/postra-licm.ll b/test/CodeGen/X86/postra-licm.ll index 01d6cbe..946b836 100644 --- a/test/CodeGen/X86/postra-licm.ll +++ b/test/CodeGen/X86/postra-licm.ll @@ -16,7 +16,7 @@ @.str24 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1] define i32 @t1(i32 %c, i8** nocapture %v) nounwind ssp { -; X86-32: t1: +; X86-32-LABEL: t1: entry: br i1 undef, label %bb, label %bb3 @@ -146,7 +146,7 @@ declare i32 @strcmp(i8* nocapture, i8* nocapture) nounwind readonly @map_4_to_16 = external constant [16 x i16], align 32 ; <[16 x i16]*> [#uses=2] define void @t2(i8* nocapture %bufp, i8* nocapture %data, i32 %dsize) nounwind ssp { -; X86-64: t2: +; X86-64-LABEL: t2: entry: br i1 undef, label %return, label %bb.nph diff --git a/test/CodeGen/X86/pr12360.ll b/test/CodeGen/X86/pr12360.ll index f29e50e..8b30596 100644 --- a/test/CodeGen/X86/pr12360.ll +++ b/test/CodeGen/X86/pr12360.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s define zeroext i1 @f1(i8* %x) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: movb (%rdi), %al ; CHECK-NEXT: ret @@ -12,7 +12,7 @@ entry: } define zeroext i1 @f2(i8* %x) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: movb (%rdi), %al ; CHECK-NEXT: ret @@ -27,7 +27,7 @@ entry: ; check that we don't build a "trunc" from i1 to i1, which would assert. define zeroext i1 @f3(i1 %x) { -; CHECK: f3: +; CHECK-LABEL: f3: entry: %tobool = icmp ne i1 %x, 0 @@ -36,7 +36,7 @@ entry: ; check that we don't build a trunc when other bits are needed define zeroext i1 @f4(i32 %x) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: and entry: diff --git a/test/CodeGen/X86/pr13209.ll b/test/CodeGen/X86/pr13209.ll index 1c93163..8e5eca2 100644 --- a/test/CodeGen/X86/pr13209.ll +++ b/test/CodeGen/X86/pr13209.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s -; CHECK: pr13209: +; CHECK-LABEL: pr13209: ; CHECK-NOT: mov ; CHECK: .size pr13209 diff --git a/test/CodeGen/X86/pr16031.ll b/test/CodeGen/X86/pr16031.ll index 4721173..ab0b5ef 100644 --- a/test/CodeGen/X86/pr16031.ll +++ b/test/CodeGen/X86/pr16031.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s -; CHECK: main: +; CHECK-LABEL: main: ; CHECK: pushl %esi ; CHECK-NEXT: movl $-12, %eax ; CHECK-NEXT: movl $-1, %edx diff --git a/test/CodeGen/X86/pr2182.ll b/test/CodeGen/X86/pr2182.ll index 02a3605..94429b2 100644 --- a/test/CodeGen/X86/pr2182.ll +++ b/test/CodeGen/X86/pr2182.ll @@ -7,7 +7,7 @@ target triple = "i386-apple-darwin8" @x = weak global i32 0 ; <i32*> [#uses=8] define void @loop_2() nounwind { -; CHECK: loop_2: +; CHECK-LABEL: loop_2: ; CHECK-NOT: ret ; CHECK: addl $3, (%{{.*}}) ; CHECK-NEXT: addl $3, (%{{.*}}) diff --git a/test/CodeGen/X86/pr3216.ll b/test/CodeGen/X86/pr3216.ll index 63676d9..a4a4821 100644 --- a/test/CodeGen/X86/pr3216.ll +++ b/test/CodeGen/X86/pr3216.ll @@ -3,7 +3,7 @@ @foo = global i8 127 define i32 @main() nounwind { -; CHECK: main: +; CHECK-LABEL: main: ; CHECK-NOT: ret ; CHECK: sar{{.}} $5 ; CHECK: ret diff --git a/test/CodeGen/X86/private.ll b/test/CodeGen/X86/private.ll index 557bbd2..c02d193 100644 --- a/test/CodeGen/X86/private.ll +++ b/test/CodeGen/X86/private.ll @@ -13,7 +13,7 @@ define i32 @bar() { %1 = load i32* @baz, align 4 ret i32 %1 -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: callq .Lfoo ; CHECK: movl .Lbaz(%rip) } diff --git a/test/CodeGen/X86/promote-i16.ll b/test/CodeGen/X86/promote-i16.ll index 3c91d74..963bc1c 100644 --- a/test/CodeGen/X86/promote-i16.ll +++ b/test/CodeGen/X86/promote-i16.ll @@ -2,7 +2,7 @@ define signext i16 @foo(i16 signext %x) nounwind { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: movzwl ; CHECK: movswl 4(%esp), %eax ; CHECK: xorl $21998, %eax @@ -12,7 +12,7 @@ entry: define signext i16 @bar(i16 signext %x) nounwind { entry: -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK-NOT: movzwl ; CHECK: movswl 4(%esp), %eax ; CHECK: xorl $-10770, %eax diff --git a/test/CodeGen/X86/rdrand.ll b/test/CodeGen/X86/rdrand.ll index 0fd9916..1b16a2d 100644 --- a/test/CodeGen/X86/rdrand.ll +++ b/test/CodeGen/X86/rdrand.ll @@ -9,7 +9,7 @@ define i32 @_rdrand16_step(i16* %random_val) { store i16 %randval, i16* %random_val %isvalid = extractvalue {i16, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdrand16_step: +; CHECK-LABEL: _rdrand16_step: ; CHECK: rdrandw %ax ; CHECK: movw %ax, (%r[[A0:di|cx]]) ; CHECK: movzwl %ax, %ecx @@ -24,7 +24,7 @@ define i32 @_rdrand32_step(i32* %random_val) { store i32 %randval, i32* %random_val %isvalid = extractvalue {i32, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdrand32_step: +; CHECK-LABEL: _rdrand32_step: ; CHECK: rdrandl %e[[T0:[a-z]+]] ; CHECK: movl %e[[T0]], (%r[[A0]]) ; CHECK: movl $1, %eax @@ -38,7 +38,7 @@ define i32 @_rdrand64_step(i64* %random_val) { store i64 %randval, i64* %random_val %isvalid = extractvalue {i64, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdrand64_step: +; CHECK-LABEL: _rdrand64_step: ; CHECK: rdrandq %r[[T1:[a-z]+]] ; CHECK: movq %r[[T1]], (%r[[A0]]) ; CHECK: movl $1, %eax @@ -54,7 +54,7 @@ define i32 @CSE() nounwind { %v2 = extractvalue { i32, i32 } %rand2, 0 %add = add i32 %v2, %v1 ret i32 %add -; CHECK: CSE: +; CHECK-LABEL: CSE: ; CHECK: rdrandl ; CHECK: rdrandl } @@ -78,7 +78,7 @@ while.body: ; preds = %entry, %while.body while.end: ; preds = %while.body, %entry ret void -; CHECK: loop: +; CHECK-LABEL: loop: ; CHECK-NOT: rdrandl ; CHECK: This Inner Loop Header: Depth=1 ; CHECK: rdrandl diff --git a/test/CodeGen/X86/rdseed.ll b/test/CodeGen/X86/rdseed.ll index 409da62..edc5069 100644 --- a/test/CodeGen/X86/rdseed.ll +++ b/test/CodeGen/X86/rdseed.ll @@ -10,7 +10,7 @@ define i32 @_rdseed16_step(i16* %random_val) { store i16 %randval, i16* %random_val %isvalid = extractvalue {i16, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdseed16_step: +; CHECK-LABEL: _rdseed16_step: ; CHECK: rdseedw %ax ; CHECK: movw %ax, (%r[[A0:di|cx]]) ; CHECK: movzwl %ax, %ecx @@ -25,7 +25,7 @@ define i32 @_rdseed32_step(i32* %random_val) { store i32 %randval, i32* %random_val %isvalid = extractvalue {i32, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdseed32_step: +; CHECK-LABEL: _rdseed32_step: ; CHECK: rdseedl %e[[T0:[a-z]+]] ; CHECK: movl %e[[T0]], (%r[[A0]]) ; CHECK: movl $1, %eax @@ -39,7 +39,7 @@ define i32 @_rdseed64_step(i64* %random_val) { store i64 %randval, i64* %random_val %isvalid = extractvalue {i64, i32} %call, 1 ret i32 %isvalid -; CHECK: _rdseed64_step: +; CHECK-LABEL: _rdseed64_step: ; CHECK: rdseedq %r[[T1:[a-z]+]] ; CHECK: movq %r[[T1]], (%r[[A0]]) ; CHECK: movl $1, %eax diff --git a/test/CodeGen/X86/red-zone.ll b/test/CodeGen/X86/red-zone.ll index d99a7a4..cce71f5 100644 --- a/test/CodeGen/X86/red-zone.ll +++ b/test/CodeGen/X86/red-zone.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s ; First without noredzone. -; CHECK: f0: +; CHECK-LABEL: f0: ; CHECK: -4(%rsp) ; CHECK: -4(%rsp) ; CHECK: ret @@ -12,7 +12,7 @@ entry: } ; Then with noredzone. -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subq $4, %rsp ; CHECK: (%rsp) ; CHECK: (%rsp) diff --git a/test/CodeGen/X86/red-zone2.ll b/test/CodeGen/X86/red-zone2.ll index 3e9c790..c7e855b 100644 --- a/test/CodeGen/X86/red-zone2.ll +++ b/test/CodeGen/X86/red-zone2.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -; CHECK: f0: +; CHECK-LABEL: f0: ; CHECK: subq ; CHECK: addq diff --git a/test/CodeGen/X86/remat-mov-0.ll b/test/CodeGen/X86/remat-mov-0.ll index f89cd33..9e8d8f6 100644 --- a/test/CodeGen/X86/remat-mov-0.ll +++ b/test/CodeGen/X86/remat-mov-0.ll @@ -5,7 +5,7 @@ declare void @foo(i64 %p) -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: xorl %e[[A0:di|cx]], %e ; CHECK: xorl %e[[A0]], %e[[A0]] define void @bar() nounwind { @@ -14,7 +14,7 @@ define void @bar() nounwind { ret void } -; CHECK: bat: +; CHECK-LABEL: bat: ; CHECK: movq $-1, %r[[A0]] ; CHECK: movq $-1, %r[[A0]] define void @bat() nounwind { @@ -23,7 +23,7 @@ define void @bat() nounwind { ret void } -; CHECK: bau: +; CHECK-LABEL: bau: ; CHECK: movl $1, %e[[A0]] ; CHECK: movl $1, %e[[A0]] define void @bau() nounwind { diff --git a/test/CodeGen/X86/ret-mmx.ll b/test/CodeGen/X86/ret-mmx.ll index 778e472..091fd53 100644 --- a/test/CodeGen/X86/ret-mmx.ll +++ b/test/CodeGen/X86/ret-mmx.ll @@ -8,7 +8,7 @@ entry: %call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0] store <1 x i64> %call, <1 x i64>* @g_v1di ret void -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: callq ; CHECK-NEXT: movq _g_v1di ; CHECK-NEXT: movq %rax, @@ -18,21 +18,21 @@ declare <1 x i64> @return_v1di() define <1 x i64> @t2() nounwind { ret <1 x i64> <i64 1> -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: movl $1 ; CHECK-NEXT: ret } define <2 x i32> @t3() nounwind { ret <2 x i32> <i32 1, i32 0> -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: movl $1 ; CHECK: movd {{.*}}, %xmm0 } define double @t4() nounwind { ret double bitcast (<2 x i32> <i32 1, i32 0> to double) -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: movl $1 ; CHECK: movd {{.*}}, %xmm0 } diff --git a/test/CodeGen/X86/rot16.ll b/test/CodeGen/X86/rot16.ll index de23dcb..0293f4e 100644 --- a/test/CodeGen/X86/rot16.ll +++ b/test/CodeGen/X86/rot16.ll @@ -2,7 +2,7 @@ define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: rolw %cl %0 = shl i16 %x, %z %1 = sub i16 16, %z @@ -13,7 +13,7 @@ entry: define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: shldw %cl %0 = shl i16 %y, %z %1 = sub i16 16, %z @@ -24,7 +24,7 @@ entry: define i16 @un(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: un: +; CHECK-LABEL: un: ; CHECK: rorw %cl %0 = lshr i16 %x, %z %1 = sub i16 16, %z @@ -35,7 +35,7 @@ entry: define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: bu: +; CHECK-LABEL: bu: ; CHECK: shrdw %0 = lshr i16 %y, %z %1 = sub i16 16, %z @@ -46,7 +46,7 @@ entry: define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: xfoo: +; CHECK-LABEL: xfoo: ; CHECK: rolw $5 %0 = lshr i16 %x, 11 %1 = shl i16 %x, 5 @@ -56,7 +56,7 @@ entry: define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: xbar: +; CHECK-LABEL: xbar: ; CHECK: shldw $5 %0 = shl i16 %y, 5 %1 = lshr i16 %x, 11 @@ -66,7 +66,7 @@ entry: define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: xun: +; CHECK-LABEL: xun: ; CHECK: rolw $11 %0 = lshr i16 %x, 5 %1 = shl i16 %x, 11 @@ -76,7 +76,7 @@ entry: define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: -; CHECK: xbu: +; CHECK-LABEL: xbu: ; CHECK: shldw $11 %0 = lshr i16 %y, 5 %1 = shl i16 %x, 11 diff --git a/test/CodeGen/X86/rot32.ll b/test/CodeGen/X86/rot32.ll index e95a734..7bdd606 100644 --- a/test/CodeGen/X86/rot32.ll +++ b/test/CodeGen/X86/rot32.ll @@ -3,7 +3,7 @@ define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: roll %cl %0 = shl i32 %x, %z %1 = sub i32 32, %z @@ -14,7 +14,7 @@ entry: define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: shldl %cl %0 = shl i32 %y, %z %1 = sub i32 32, %z @@ -25,7 +25,7 @@ entry: define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: un: +; CHECK-LABEL: un: ; CHECK: rorl %cl %0 = lshr i32 %x, %z %1 = sub i32 32, %z @@ -36,7 +36,7 @@ entry: define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: bu: +; CHECK-LABEL: bu: ; CHECK: shrdl %cl %0 = lshr i32 %y, %z %1 = sub i32 32, %z @@ -47,9 +47,9 @@ entry: define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: xfoo: +; CHECK-LABEL: xfoo: ; CHECK: roll $7 -; BMI2: xfoo: +; BMI2-LABEL: xfoo: ; BMI2: rorxl $25 %0 = lshr i32 %x, 25 %1 = shl i32 %x, 7 @@ -59,7 +59,7 @@ entry: define i32 @xfoop(i32* %p) nounwind readnone { entry: -; BMI2: xfoop: +; BMI2-LABEL: xfoop: ; BMI2: rorxl $25, ({{.+}}), %{{.+}} %x = load i32* %p %a = lshr i32 %x, 25 @@ -70,7 +70,7 @@ entry: define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: xbar: +; CHECK-LABEL: xbar: ; CHECK: shldl $7 %0 = shl i32 %y, 7 %1 = lshr i32 %x, 25 @@ -80,9 +80,9 @@ entry: define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: xun: +; CHECK-LABEL: xun: ; CHECK: roll $25 -; BMI2: xun: +; BMI2-LABEL: xun: ; BMI2: rorxl $7 %0 = lshr i32 %x, 7 %1 = shl i32 %x, 25 @@ -92,7 +92,7 @@ entry: define i32 @xunp(i32* %p) nounwind readnone { entry: -; BMI2: xunp: +; BMI2-LABEL: xunp: ; BMI2: rorxl $7, ({{.+}}), %{{.+}} %x = load i32* %p %a = lshr i32 %x, 7 @@ -103,7 +103,7 @@ entry: define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: -; CHECK: xbu: +; CHECK-LABEL: xbu: ; CHECK: shldl %0 = lshr i32 %y, 7 %1 = shl i32 %x, 25 diff --git a/test/CodeGen/X86/rot64.ll b/test/CodeGen/X86/rot64.ll index 7fa982d..e19a35d 100644 --- a/test/CodeGen/X86/rot64.ll +++ b/test/CodeGen/X86/rot64.ll @@ -43,7 +43,7 @@ entry: define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone { entry: -; BMI2: xfoo: +; BMI2-LABEL: xfoo: ; BMI2: rorxq $57 %0 = lshr i64 %x, 57 %1 = shl i64 %x, 7 @@ -53,7 +53,7 @@ entry: define i64 @xfoop(i64* %p) nounwind readnone { entry: -; BMI2: xfoop: +; BMI2-LABEL: xfoop: ; BMI2: rorxq $57, ({{.+}}), %{{.+}} %x = load i64* %p %a = lshr i64 %x, 57 @@ -72,7 +72,7 @@ entry: define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone { entry: -; BMI2: xun: +; BMI2-LABEL: xun: ; BMI2: rorxq $7 %0 = lshr i64 %x, 7 %1 = shl i64 %x, 57 @@ -82,7 +82,7 @@ entry: define i64 @xunp(i64* %p) nounwind readnone { entry: -; BMI2: xunp: +; BMI2-LABEL: xunp: ; BMI2: rorxq $7, ({{.+}}), %{{.+}} %x = load i64* %p %a = lshr i64 %x, 7 diff --git a/test/CodeGen/X86/rounding-ops.ll b/test/CodeGen/X86/rounding-ops.ll index 51fcf64..ace31cf 100644 --- a/test/CodeGen/X86/rounding-ops.ll +++ b/test/CodeGen/X86/rounding-ops.ll @@ -5,10 +5,10 @@ define float @test1(float %x) nounwind { %call = tail call float @floorf(float %x) nounwind readnone ret float %call -; CHECK-SSE: test1: +; CHECK-SSE-LABEL: test1: ; CHECK-SSE: roundss $1 -; CHECK-AVX: test1: +; CHECK-AVX-LABEL: test1: ; CHECK-AVX: vroundss $1 } @@ -18,10 +18,10 @@ define double @test2(double %x) nounwind { %call = tail call double @floor(double %x) nounwind readnone ret double %call -; CHECK-SSE: test2: +; CHECK-SSE-LABEL: test2: ; CHECK-SSE: roundsd $1 -; CHECK-AVX: test2: +; CHECK-AVX-LABEL: test2: ; CHECK-AVX: vroundsd $1 } @@ -31,10 +31,10 @@ define float @test3(float %x) nounwind { %call = tail call float @nearbyintf(float %x) nounwind readnone ret float %call -; CHECK-SSE: test3: +; CHECK-SSE-LABEL: test3: ; CHECK-SSE: roundss $12 -; CHECK-AVX: test3: +; CHECK-AVX-LABEL: test3: ; CHECK-AVX: vroundss $12 } @@ -44,10 +44,10 @@ define double @test4(double %x) nounwind { %call = tail call double @nearbyint(double %x) nounwind readnone ret double %call -; CHECK-SSE: test4: +; CHECK-SSE-LABEL: test4: ; CHECK-SSE: roundsd $12 -; CHECK-AVX: test4: +; CHECK-AVX-LABEL: test4: ; CHECK-AVX: vroundsd $12 } @@ -57,10 +57,10 @@ define float @test5(float %x) nounwind { %call = tail call float @ceilf(float %x) nounwind readnone ret float %call -; CHECK-SSE: test5: +; CHECK-SSE-LABEL: test5: ; CHECK-SSE: roundss $2 -; CHECK-AVX: test5: +; CHECK-AVX-LABEL: test5: ; CHECK-AVX: vroundss $2 } @@ -70,10 +70,10 @@ define double @test6(double %x) nounwind { %call = tail call double @ceil(double %x) nounwind readnone ret double %call -; CHECK-SSE: test6: +; CHECK-SSE-LABEL: test6: ; CHECK-SSE: roundsd $2 -; CHECK-AVX: test6: +; CHECK-AVX-LABEL: test6: ; CHECK-AVX: vroundsd $2 } @@ -83,10 +83,10 @@ define float @test7(float %x) nounwind { %call = tail call float @rintf(float %x) nounwind readnone ret float %call -; CHECK-SSE: test7: +; CHECK-SSE-LABEL: test7: ; CHECK-SSE: roundss $4 -; CHECK-AVX: test7: +; CHECK-AVX-LABEL: test7: ; CHECK-AVX: vroundss $4 } @@ -96,10 +96,10 @@ define double @test8(double %x) nounwind { %call = tail call double @rint(double %x) nounwind readnone ret double %call -; CHECK-SSE: test8: +; CHECK-SSE-LABEL: test8: ; CHECK-SSE: roundsd $4 -; CHECK-AVX: test8: +; CHECK-AVX-LABEL: test8: ; CHECK-AVX: vroundsd $4 } @@ -109,10 +109,10 @@ define float @test9(float %x) nounwind { %call = tail call float @truncf(float %x) nounwind readnone ret float %call -; CHECK-SSE: test9: +; CHECK-SSE-LABEL: test9: ; CHECK-SSE: roundss $3 -; CHECK-AVX: test9: +; CHECK-AVX-LABEL: test9: ; CHECK-AVX: vroundss $3 } @@ -122,10 +122,10 @@ define double @test10(double %x) nounwind { %call = tail call double @trunc(double %x) nounwind readnone ret double %call -; CHECK-SSE: test10: +; CHECK-SSE-LABEL: test10: ; CHECK-SSE: roundsd $3 -; CHECK-AVX: test10: +; CHECK-AVX-LABEL: test10: ; CHECK-AVX: vroundsd $3 } diff --git a/test/CodeGen/X86/segmented-stacks.ll b/test/CodeGen/X86/segmented-stacks.ll index 5407b87..08a98ef 100644 --- a/test/CodeGen/X86/segmented-stacks.ll +++ b/test/CodeGen/X86/segmented-stacks.ll @@ -32,7 +32,7 @@ define void @test_basic() { call void @dummy_use (i32* %mem, i32 10) ret void -; X32-Linux: test_basic: +; X32-Linux-LABEL: test_basic: ; X32-Linux: cmpl %gs:48, %esp ; X32-Linux-NEXT: ja .LBB0_2 @@ -42,7 +42,7 @@ define void @test_basic() { ; X32-Linux-NEXT: calll __morestack ; X32-Linux-NEXT: ret -; X64-Linux: test_basic: +; X64-Linux-LABEL: test_basic: ; X64-Linux: cmpq %fs:112, %rsp ; X64-Linux-NEXT: ja .LBB0_2 @@ -52,7 +52,7 @@ define void @test_basic() { ; X64-Linux-NEXT: callq __morestack ; X64-Linux-NEXT: ret -; X32-Darwin: test_basic: +; X32-Darwin-LABEL: test_basic: ; X32-Darwin: movl $432, %ecx ; X32-Darwin-NEXT: cmpl %gs:(%ecx), %esp @@ -63,7 +63,7 @@ define void @test_basic() { ; X32-Darwin-NEXT: calll ___morestack ; X32-Darwin-NEXT: ret -; X64-Darwin: test_basic: +; X64-Darwin-LABEL: test_basic: ; X64-Darwin: cmpq %gs:816, %rsp ; X64-Darwin-NEXT: ja LBB0_2 @@ -73,7 +73,7 @@ define void @test_basic() { ; X64-Darwin-NEXT: callq ___morestack ; X64-Darwin-NEXT: ret -; X32-MinGW: test_basic: +; X32-MinGW-LABEL: test_basic: ; X32-MinGW: cmpl %fs:20, %esp ; X32-MinGW-NEXT: ja LBB0_2 @@ -83,7 +83,7 @@ define void @test_basic() { ; X32-MinGW-NEXT: calll ___morestack ; X32-MinGW-NEXT: ret -; X64-FreeBSD: test_basic: +; X64-FreeBSD-LABEL: test_basic: ; X64-FreeBSD: cmpq %fs:24, %rsp ; X64-FreeBSD-NEXT: ja .LBB0_2 @@ -224,7 +224,7 @@ define fastcc void @test_fastcc() { call void @dummy_use (i32* %mem, i32 10) ret void -; X32-Linux: test_fastcc: +; X32-Linux-LABEL: test_fastcc: ; X32-Linux: cmpl %gs:48, %esp ; X32-Linux-NEXT: ja .LBB3_2 @@ -234,7 +234,7 @@ define fastcc void @test_fastcc() { ; X32-Linux-NEXT: calll __morestack ; X32-Linux-NEXT: ret -; X64-Linux: test_fastcc: +; X64-Linux-LABEL: test_fastcc: ; X64-Linux: cmpq %fs:112, %rsp ; X64-Linux-NEXT: ja .LBB3_2 @@ -244,7 +244,7 @@ define fastcc void @test_fastcc() { ; X64-Linux-NEXT: callq __morestack ; X64-Linux-NEXT: ret -; X32-Darwin: test_fastcc: +; X32-Darwin-LABEL: test_fastcc: ; X32-Darwin: movl $432, %eax ; X32-Darwin-NEXT: cmpl %gs:(%eax), %esp @@ -255,7 +255,7 @@ define fastcc void @test_fastcc() { ; X32-Darwin-NEXT: calll ___morestack ; X32-Darwin-NEXT: ret -; X64-Darwin: test_fastcc: +; X64-Darwin-LABEL: test_fastcc: ; X64-Darwin: cmpq %gs:816, %rsp ; X64-Darwin-NEXT: ja LBB3_2 @@ -265,7 +265,7 @@ define fastcc void @test_fastcc() { ; X64-Darwin-NEXT: callq ___morestack ; X64-Darwin-NEXT: ret -; X32-MinGW: test_fastcc: +; X32-MinGW-LABEL: test_fastcc: ; X32-MinGW: cmpl %fs:20, %esp ; X32-MinGW-NEXT: ja LBB3_2 @@ -275,7 +275,7 @@ define fastcc void @test_fastcc() { ; X32-MinGW-NEXT: calll ___morestack ; X32-MinGW-NEXT: ret -; X64-FreeBSD: test_fastcc: +; X64-FreeBSD-LABEL: test_fastcc: ; X64-FreeBSD: cmpq %fs:24, %rsp ; X64-FreeBSD-NEXT: ja .LBB3_2 @@ -292,7 +292,7 @@ define fastcc void @test_fastcc_large() { call void @dummy_use (i32* %mem, i32 0) ret void -; X32-Linux: test_fastcc_large: +; X32-Linux-LABEL: test_fastcc_large: ; X32-Linux: leal -40012(%esp), %eax ; X32-Linux-NEXT: cmpl %gs:48, %eax @@ -303,7 +303,7 @@ define fastcc void @test_fastcc_large() { ; X32-Linux-NEXT: calll __morestack ; X32-Linux-NEXT: ret -; X64-Linux: test_fastcc_large: +; X64-Linux-LABEL: test_fastcc_large: ; X64-Linux: leaq -40008(%rsp), %r11 ; X64-Linux-NEXT: cmpq %fs:112, %r11 @@ -314,7 +314,7 @@ define fastcc void @test_fastcc_large() { ; X64-Linux-NEXT: callq __morestack ; X64-Linux-NEXT: ret -; X32-Darwin: test_fastcc_large: +; X32-Darwin-LABEL: test_fastcc_large: ; X32-Darwin: leal -40012(%esp), %eax ; X32-Darwin-NEXT: movl $432, %ecx @@ -326,7 +326,7 @@ define fastcc void @test_fastcc_large() { ; X32-Darwin-NEXT: calll ___morestack ; X32-Darwin-NEXT: ret -; X64-Darwin: test_fastcc_large: +; X64-Darwin-LABEL: test_fastcc_large: ; X64-Darwin: leaq -40008(%rsp), %r11 ; X64-Darwin-NEXT: cmpq %gs:816, %r11 @@ -337,7 +337,7 @@ define fastcc void @test_fastcc_large() { ; X64-Darwin-NEXT: callq ___morestack ; X64-Darwin-NEXT: ret -; X32-MinGW: test_fastcc_large: +; X32-MinGW-LABEL: test_fastcc_large: ; X32-MinGW: leal -40008(%esp), %eax ; X32-MinGW-NEXT: cmpl %fs:20, %eax @@ -348,7 +348,7 @@ define fastcc void @test_fastcc_large() { ; X32-MinGW-NEXT: calll ___morestack ; X32-MinGW-NEXT: ret -; X64-FreeBSD: test_fastcc_large: +; X64-FreeBSD-LABEL: test_fastcc_large: ; X64-FreeBSD: leaq -40008(%rsp), %r11 ; X64-FreeBSD-NEXT: cmpq %fs:24, %r11 @@ -368,7 +368,7 @@ define fastcc void @test_fastcc_large_with_ecx_arg(i32 %a) { ; This is testing that the Mac implementation preserves ecx -; X32-Darwin: test_fastcc_large_with_ecx_arg: +; X32-Darwin-LABEL: test_fastcc_large_with_ecx_arg: ; X32-Darwin: leal -40012(%esp), %eax ; X32-Darwin-NEXT: pushl %ecx diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll index c37e15d..2454af9 100644 --- a/test/CodeGen/X86/setcc.ll +++ b/test/CodeGen/X86/setcc.ll @@ -6,7 +6,7 @@ define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: seta %al ; CHECK: movzbl %al, %eax ; CHECK: shll $5, %eax @@ -17,7 +17,7 @@ entry: define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: sbbl %eax, %eax ; CHECK: andl $32, %eax %0 = icmp ult i16 %x, 26 ; <i1> [#uses=1] @@ -27,7 +27,7 @@ entry: define i64 @t3(i64 %x) nounwind readnone ssp { entry: -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: sbbq %rax, %rax ; CHECK: andq $64, %rax %0 = icmp ult i64 %x, 18 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/sext-i1.ll b/test/CodeGen/X86/sext-i1.ll index 574769b..64de0ae 100644 --- a/test/CodeGen/X86/sext-i1.ll +++ b/test/CodeGen/X86/sext-i1.ll @@ -5,11 +5,11 @@ define i32 @t1(i32 %x) nounwind readnone ssp { entry: -; 32: t1: +; 32-LABEL: t1: ; 32: cmpl $1 ; 32: sbbl -; 64: t1: +; 64-LABEL: t1: ; 64: cmpl $1 ; 64: sbbl %0 = icmp eq i32 %x, 0 @@ -19,11 +19,11 @@ entry: define i32 @t2(i32 %x) nounwind readnone ssp { entry: -; 32: t2: +; 32-LABEL: t2: ; 32: cmpl $1 ; 32: sbbl -; 64: t2: +; 64-LABEL: t2: ; 64: cmpl $1 ; 64: sbbl %0 = icmp eq i32 %x, 0 @@ -36,13 +36,13 @@ entry: define i32 @t3() nounwind readonly { entry: -; 32: t3: +; 32-LABEL: t3: ; 32: cmpl $1 ; 32: sbbl ; 32: cmpl ; 32: xorl -; 64: t3: +; 64-LABEL: t3: ; 64: cmpl $1 ; 64: sbbq ; 64: cmpq diff --git a/test/CodeGen/X86/sext-subreg.ll b/test/CodeGen/X86/sext-subreg.ll index a128af9..e0c8ff9 100644 --- a/test/CodeGen/X86/sext-subreg.ll +++ b/test/CodeGen/X86/sext-subreg.ll @@ -2,7 +2,7 @@ ; rdar://7529457 define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: movslq %e{{.*}}, %rax ; CHECK: movq %rax ; CHECK: movl %eax diff --git a/test/CodeGen/X86/shift-and.ll b/test/CodeGen/X86/shift-and.ll index 1de9151..d487368 100644 --- a/test/CodeGen/X86/shift-and.ll +++ b/test/CodeGen/X86/shift-and.ll @@ -2,11 +2,11 @@ ; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s --check-prefix=X64 define i32 @t1(i32 %t, i32 %val) nounwind { -; X32: t1: +; X32-LABEL: t1: ; X32-NOT: andl ; X32: shll -; X64: t1: +; X64-LABEL: t1: ; X64-NOT: andl ; X64: shll %shamt = and i32 %t, 31 @@ -15,11 +15,11 @@ define i32 @t1(i32 %t, i32 %val) nounwind { } define i32 @t2(i32 %t, i32 %val) nounwind { -; X32: t2: +; X32-LABEL: t2: ; X32-NOT: andl ; X32: shll -; X64: t2: +; X64-LABEL: t2: ; X64-NOT: andl ; X64: shll %shamt = and i32 %t, 63 @@ -30,11 +30,11 @@ define i32 @t2(i32 %t, i32 %val) nounwind { @X = internal global i16 0 define void @t3(i16 %t) nounwind { -; X32: t3: +; X32-LABEL: t3: ; X32-NOT: andl ; X32: sarw -; X64: t3: +; X64-LABEL: t3: ; X64-NOT: andl ; X64: sarw %shamt = and i16 %t, 31 @@ -45,7 +45,7 @@ define void @t3(i16 %t) nounwind { } define i64 @t4(i64 %t, i64 %val) nounwind { -; X64: t4: +; X64-LABEL: t4: ; X64-NOT: and ; X64: shrq %shamt = and i64 %t, 63 @@ -54,7 +54,7 @@ define i64 @t4(i64 %t, i64 %val) nounwind { } define i64 @t5(i64 %t, i64 %val) nounwind { -; X64: t5: +; X64-LABEL: t5: ; X64-NOT: and ; X64: shrq %shamt = and i64 %t, 191 @@ -66,7 +66,7 @@ define i64 @t5(i64 %t, i64 %val) nounwind { ; rdar://11866926 define i64 @t6(i64 %key, i64* nocapture %val) nounwind { entry: -; X64: t6: +; X64-LABEL: t6: ; X64-NOT: movabsq ; X64: decq ; X64: andq diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll index 7d961e8..88b8610 100644 --- a/test/CodeGen/X86/shift-codegen.ll +++ b/test/CodeGen/X86/shift-codegen.ll @@ -8,7 +8,7 @@ target triple = "i686-apple-darwin8" define void @fn1() { -; CHECK: fn1: +; CHECK-LABEL: fn1: ; CHECK-NOT: ret ; CHECK-NOT: lea ; CHECK: shll $3 @@ -24,7 +24,7 @@ define void @fn1() { } define i32 @fn2(i32 %X, i32 %Y) { -; CHECK: fn2: +; CHECK-LABEL: fn2: ; CHECK-NOT: ret ; CHECK-NOT: lea ; CHECK: shll $3 diff --git a/test/CodeGen/X86/shl-anyext.ll b/test/CodeGen/X86/shl-anyext.ll index 10d489b..0a5d047 100644 --- a/test/CodeGen/X86/shl-anyext.ll +++ b/test/CodeGen/X86/shl-anyext.ll @@ -17,7 +17,7 @@ if.end523: ; preds = %if.end453 ret void } -; CHECK: foo: +; CHECK-LABEL: foo: declare void @bar(i64) diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll index e99ecac..4762b13 100644 --- a/test/CodeGen/X86/shl_elim.ll +++ b/test/CodeGen/X86/shl_elim.ll @@ -8,7 +8,7 @@ define i32 @test1(i64 %a) nounwind { %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1] ret i32 %tmp456 -; CHECK: test1: +; CHECK-LABEL: test1: ; CHECK: movl 8(%esp), %eax ; CHECK: shrl %eax ; CHECK: cwtl diff --git a/test/CodeGen/X86/sibcall-2.ll b/test/CodeGen/X86/sibcall-2.ll index f8a7465..1b9d2db 100644 --- a/test/CodeGen/X86/sibcall-2.ll +++ b/test/CodeGen/X86/sibcall-2.ll @@ -5,10 +5,10 @@ define void @t1(i8* nocapture %value) nounwind { entry: -; 32: t1: +; 32-LABEL: t1: ; 32: jmpl *4(%esp) -; 64: t1: +; 64-LABEL: t1: ; 64: jmpq *%rdi %0 = bitcast i8* %value to void ()* tail call void %0() nounwind @@ -17,10 +17,10 @@ entry: define void @t2(i32 %a, i8* nocapture %value) nounwind { entry: -; 32: t2: +; 32-LABEL: t2: ; 32: jmpl *8(%esp) -; 64: t2: +; 64-LABEL: t2: ; 64: jmpq *%rsi %0 = bitcast i8* %value to void ()* tail call void %0() nounwind @@ -29,10 +29,10 @@ entry: define void @t3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i8* nocapture %value) nounwind { entry: -; 32: t3: +; 32-LABEL: t3: ; 32: jmpl *28(%esp) -; 64: t3: +; 64-LABEL: t3: ; 64: jmpq *8(%rsp) %0 = bitcast i8* %value to void ()* tail call void %0() nounwind @@ -41,10 +41,10 @@ entry: define void @t4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i8* nocapture %value) nounwind { entry: -; 32: t4: +; 32-LABEL: t4: ; 32: jmpl *32(%esp) -; 64: t4: +; 64-LABEL: t4: ; 64: jmpq *16(%rsp) %0 = bitcast i8* %value to void ()* tail call void %0() nounwind diff --git a/test/CodeGen/X86/sibcall-3.ll b/test/CodeGen/X86/sibcall-3.ll index f97abe0..9fcb460 100644 --- a/test/CodeGen/X86/sibcall-3.ll +++ b/test/CodeGen/X86/sibcall-3.ll @@ -2,14 +2,14 @@ ; PR7193 define void @t1(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: calll 0 tail call void null(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind ret void } define void @t2(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: jmpl tail call void null(i8* inreg %dst, i8* inreg %src) nounwind ret void diff --git a/test/CodeGen/X86/sibcall-4.ll b/test/CodeGen/X86/sibcall-4.ll index 1499e66..980b0f7 100644 --- a/test/CodeGen/X86/sibcall-4.ll +++ b/test/CodeGen/X86/sibcall-4.ll @@ -3,7 +3,7 @@ define cc10 void @t(i32* %Base_Arg, i32* %Sp_Arg, i32* %Hp_Arg, i32 %R1_Arg) nounwind { cm1: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: jmpl *%eax %nm3 = getelementptr i32* %Sp_Arg, i32 1 %nm9 = load i32* %Sp_Arg diff --git a/test/CodeGen/X86/sibcall-5.ll b/test/CodeGen/X86/sibcall-5.ll index 937817e..c479030 100644 --- a/test/CodeGen/X86/sibcall-5.ll +++ b/test/CodeGen/X86/sibcall-5.ll @@ -7,20 +7,20 @@ define double @foo(double %a) nounwind readonly ssp { entry: -; X32: foo: +; X32-LABEL: foo: ; X32: jmp _sin$stub -; X64: foo: +; X64-LABEL: foo: ; X64: jmp _sin %0 = tail call double @sin(double %a) nounwind readonly ret double %0 } define float @bar(float %a) nounwind readonly ssp { -; X32: bar: +; X32-LABEL: bar: ; X32: jmp _sinf$stub -; X64: bar: +; X64-LABEL: bar: ; X64: jmp _sinf entry: %0 = tail call float @sinf(float %a) nounwind readonly diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index de98cb4..7b774f6 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -3,10 +3,10 @@ define void @t1(i32 %x) nounwind ssp { entry: -; 32: t1: +; 32-LABEL: t1: ; 32: jmp {{_?}}foo -; 64: t1: +; 64-LABEL: t1: ; 64: jmp {{_?}}foo tail call void @foo() nounwind ret void @@ -16,10 +16,10 @@ declare void @foo() define void @t2() nounwind ssp { entry: -; 32: t2: +; 32-LABEL: t2: ; 32: jmp {{_?}}foo2 -; 64: t2: +; 64-LABEL: t2: ; 64: jmp {{_?}}foo2 %0 = tail call i32 @foo2() nounwind ret void @@ -29,10 +29,10 @@ declare i32 @foo2() define void @t3() nounwind ssp { entry: -; 32: t3: +; 32-LABEL: t3: ; 32: jmp {{_?}}foo3 -; 64: t3: +; 64-LABEL: t3: ; 64: jmp {{_?}}foo3 %0 = tail call i32 @foo3() nounwind ret void @@ -42,11 +42,11 @@ declare i32 @foo3() define void @t4(void (i32)* nocapture %x) nounwind ssp { entry: -; 32: t4: +; 32-LABEL: t4: ; 32: calll * ; FIXME: gcc can generate a tailcall for this. But it's tricky. -; 64: t4: +; 64-LABEL: t4: ; 64-NOT: call ; 64: jmpq * tail call void %x(i32 0) nounwind @@ -55,11 +55,11 @@ entry: define void @t5(void ()* nocapture %x) nounwind ssp { entry: -; 32: t5: +; 32-LABEL: t5: ; 32-NOT: call ; 32: jmpl *4(%esp) -; 64: t5: +; 64-LABEL: t5: ; 64-NOT: call ; 64: jmpq *%rdi tail call void %x() nounwind @@ -68,11 +68,11 @@ entry: define i32 @t6(i32 %x) nounwind ssp { entry: -; 32: t6: +; 32-LABEL: t6: ; 32: calll {{_?}}t6 ; 32: jmp {{_?}}bar -; 64: t6: +; 64-LABEL: t6: ; 64: jmp {{_?}}t6 ; 64: jmp {{_?}}bar %0 = icmp slt i32 %x, 10 @@ -92,10 +92,10 @@ declare i32 @bar(i32) define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp { entry: -; 32: t7: +; 32-LABEL: t7: ; 32: jmp {{_?}}bar2 -; 64: t7: +; 64-LABEL: t7: ; 64: jmp {{_?}}bar2 %0 = tail call i32 @bar2(i32 %a, i32 %b, i32 %c) nounwind ret i32 %0 @@ -105,10 +105,10 @@ declare i32 @bar2(i32, i32, i32) define signext i16 @t8() nounwind ssp { entry: -; 32: t8: +; 32-LABEL: t8: ; 32: calll {{_?}}bar3 -; 64: t8: +; 64-LABEL: t8: ; 64: callq {{_?}}bar3 %0 = tail call signext i16 @bar3() nounwind ; <i16> [#uses=1] ret i16 %0 @@ -118,10 +118,10 @@ declare signext i16 @bar3() define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp { entry: -; 32: t9: +; 32-LABEL: t9: ; 32: calll * -; 64: t9: +; 64-LABEL: t9: ; 64: callq * %0 = bitcast i32 (i32)* %x to i16 (i32)* %1 = tail call signext i16 %0(i32 0) nounwind @@ -130,10 +130,10 @@ entry: define void @t10() nounwind ssp { entry: -; 32: t10: +; 32-LABEL: t10: ; 32: calll -; 64: t10: +; 64-LABEL: t10: ; 64: callq %0 = tail call i32 @foo4() noreturn nounwind unreachable @@ -145,14 +145,14 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp { ; In 32-bit mode, it's emitting a bunch of dead loads that are not being ; eliminated currently. -; 32: t11: +; 32-LABEL: t11: ; 32-NOT: subl ${{[0-9]+}}, %esp ; 32: je ; 32-NOT: movl ; 32-NOT: addl ${{[0-9]+}}, %esp ; 32: jmp {{_?}}foo5 -; 64: t11: +; 64-LABEL: t11: ; 64-NOT: subq ${{[0-9]+}}, %esp ; 64-NOT: addq ${{[0-9]+}}, %esp ; 64: jmp {{_?}}foo5 @@ -173,12 +173,12 @@ declare i32 @foo5(i32, i32, i32, i32, i32) %struct.t = type { i32, i32, i32, i32, i32 } define i32 @t12(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind ssp { -; 32: t12: +; 32-LABEL: t12: ; 32-NOT: subl ${{[0-9]+}}, %esp ; 32-NOT: addl ${{[0-9]+}}, %esp ; 32: jmp {{_?}}foo6 -; 64: t12: +; 64-LABEL: t12: ; 64-NOT: subq ${{[0-9]+}}, %esp ; 64-NOT: addq ${{[0-9]+}}, %esp ; 64: jmp {{_?}}foo6 @@ -201,12 +201,12 @@ declare i32 @foo6(i32, i32, %struct.t* byval align 4) %struct.cp = type { float, float, float, float, float } define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp { -; 32: t13: +; 32-LABEL: t13: ; 32-NOT: jmp ; 32: calll ; 32: ret -; 64: t13: +; 64-LABEL: t13: ; 64-NOT: jmp ; 64: callq ; 64: ret @@ -226,7 +226,7 @@ declare fastcc %struct.ns* @foo7(%struct.cp* byval align 4, i8 signext) nounwind define void @t14(%struct.__block_literal_2* nocapture %.block_descriptor) nounwind ssp { entry: -; 64: t14: +; 64-LABEL: t14: ; 64: movq 32(%rdi) ; 64-NOT: movq 16(%rdi) ; 64: jmpq *16({{%rdi|%rax}}) @@ -245,11 +245,11 @@ entry: %struct.foo = type { [4 x i32] } define void @t15(%struct.foo* noalias sret %agg.result) nounwind { -; 32: t15: +; 32-LABEL: t15: ; 32: calll {{_?}}f ; 32: ret $4 -; 64: t15: +; 64-LABEL: t15: ; 64: callq {{_?}}f ; 64: ret tail call fastcc void @f(%struct.foo* noalias sret %agg.result) nounwind @@ -260,11 +260,11 @@ declare void @f(%struct.foo* noalias sret) nounwind define void @t16() nounwind ssp { entry: -; 32: t16: +; 32-LABEL: t16: ; 32: calll {{_?}}bar4 ; 32: fstp -; 64: t16: +; 64-LABEL: t16: ; 64: jmp {{_?}}bar4 %0 = tail call double @bar4() nounwind ret void @@ -275,10 +275,10 @@ declare double @bar4() ; rdar://6283267 define void @t17() nounwind ssp { entry: -; 32: t17: +; 32-LABEL: t17: ; 32: jmp {{_?}}bar5 -; 64: t17: +; 64-LABEL: t17: ; 64: xorl %eax, %eax ; 64: jmp {{_?}}bar5 tail call void (...)* @bar5() nounwind @@ -290,11 +290,11 @@ declare void @bar5(...) ; rdar://7774847 define void @t18() nounwind ssp { entry: -; 32: t18: +; 32-LABEL: t18: ; 32: calll {{_?}}bar6 ; 32: fstp %st(0) -; 64: t18: +; 64-LABEL: t18: ; 64: xorl %eax, %eax ; 64: jmp {{_?}}bar6 %0 = tail call double (...)* @bar6() nounwind @@ -305,7 +305,7 @@ declare double @bar6(...) define void @t19() alignstack(32) nounwind { entry: -; CHECK: t19: +; CHECK-LABEL: t19: ; CHECK: andl $-32 ; CHECK: calll {{_?}}foo tail call void @foo() nounwind @@ -318,11 +318,11 @@ entry: define double @t20(double %x) nounwind { entry: -; 32: t20: +; 32-LABEL: t20: ; 32: calll {{_?}}foo20 ; 32: fldl (%esp) -; 64: t20: +; 64-LABEL: t20: ; 64: jmp {{_?}}foo20 %0 = tail call fastcc double @foo20(double %x) nounwind ret double %0 diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 2aca5b8..0741635 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -5,7 +5,7 @@ ; evaluated, however with MachineSink we can sink the other side so ; that it's conditionally evaluated. -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NEXT: testb $1, %dil ; CHECK-NEXT: jne ; CHECK-NEXT: divsd @@ -24,7 +24,7 @@ define double @foo(double %x, double %y, i1 %c) nounwind { ; the conditional branch. ; rdar://8454886 -; CHECK: split: +; CHECK-LABEL: split: ; CHECK-NEXT: testb $1, %dil ; CHECK-NEXT: jne ; CHECK-NEXT: movaps @@ -40,7 +40,7 @@ define double @split(double %x, double %y, i1 %c) nounwind { ; Hoist floating-point constant-pool loads out of loops. -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: movsd ; CHECK: align define void @bar(double* nocapture %p, i64 %n) nounwind { @@ -87,7 +87,7 @@ return: ; Codegen should hoist and CSE these constants. -; CHECK: vv: +; CHECK-LABEL: vv: ; CHECK: LCPI3_0(%rip), %xmm0 ; CHECK: LCPI3_1(%rip), %xmm1 ; CHECK: LCPI3_2(%rip), %xmm2 @@ -151,7 +151,7 @@ declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone ; CodeGen should use the correct register class when extracting ; a load from a zero-extending load for hoisting. -; CHECK: default_get_pch_validity: +; CHECK-LABEL: default_get_pch_validity: ; CHECK: movl cl_options_count(%rip), %ecx @cl_options_count = external constant i32 ; <i32*> [#uses=2] diff --git a/test/CodeGen/X86/splat-scalar-load.ll b/test/CodeGen/X86/splat-scalar-load.ll index 980f18c..4d59b9c 100644 --- a/test/CodeGen/X86/splat-scalar-load.ll +++ b/test/CodeGen/X86/splat-scalar-load.ll @@ -3,7 +3,7 @@ define <2 x i64> @t2() nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: pshufd $85, (%esp), %xmm0 %array = alloca [8 x float], align 4 %arrayidx = getelementptr inbounds [8 x float]* %array, i32 0, i32 1 diff --git a/test/CodeGen/X86/sse-align-12.ll b/test/CodeGen/X86/sse-align-12.ll index 71a42f4..2351fd6 100644 --- a/test/CodeGen/X86/sse-align-12.ll +++ b/test/CodeGen/X86/sse-align-12.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mcpu=nehalem | FileCheck %s -; CHECK: a: +; CHECK-LABEL: a: ; CHECK: movdqu ; CHECK: pshufd define <4 x float> @a(<4 x float>* %y) nounwind { @@ -16,7 +16,7 @@ define <4 x float> @a(<4 x float>* %y) nounwind { ret <4 x float> %s } -; CHECK: b: +; CHECK-LABEL: b: ; CHECK: movups ; CHECK: unpckhps define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind { @@ -32,7 +32,7 @@ define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind { ret <4 x float> %s } -; CHECK: c: +; CHECK-LABEL: c: ; CHECK: movupd ; CHECK: shufpd define <2 x double> @c(<2 x double>* %y) nounwind { @@ -44,7 +44,7 @@ define <2 x double> @c(<2 x double>* %y) nounwind { ret <2 x double> %r } -; CHECK: d: +; CHECK-LABEL: d: ; CHECK: movupd ; CHECK: unpckhpd define <2 x double> @d(<2 x double>* %y, <2 x double> %z) nounwind { diff --git a/test/CodeGen/X86/sse-align-2.ll b/test/CodeGen/X86/sse-align-2.ll index 22cd772..98e75b5 100644 --- a/test/CodeGen/X86/sse-align-2.ll +++ b/test/CodeGen/X86/sse-align-2.ll @@ -6,7 +6,7 @@ define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind { ret <4 x float> %z } -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: movups ; CHECK: ret @@ -16,6 +16,6 @@ define <2 x double> @bar(<2 x double>* %p, <2 x double> %x) nounwind { ret <2 x double> %z } -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: movupd ; CHECK: ret diff --git a/test/CodeGen/X86/sse-commute.ll b/test/CodeGen/X86/sse-commute.ll index 336bf06..1800a6e 100644 --- a/test/CodeGen/X86/sse-commute.ll +++ b/test/CodeGen/X86/sse-commute.ll @@ -3,7 +3,7 @@ ; Commute the comparison to avoid a move. ; PR7500. -; CHECK: a: +; CHECK-LABEL: a: ; CHECK-NOT: mov ; CHECK: pcmpeqd define <2 x double> @a(<2 x double>, <2 x double>) nounwind readnone { diff --git a/test/CodeGen/X86/sse-minmax.ll b/test/CodeGen/X86/sse-minmax.ll index 0ba0215..7a2ea6b 100644 --- a/test/CodeGen/X86/sse-minmax.ll +++ b/test/CodeGen/X86/sse-minmax.ll @@ -12,13 +12,13 @@ ; _y: use -0.0 instead of %y ; _inverse : swap the arms of the select. -; CHECK: ogt: +; CHECK-LABEL: ogt: ; CHECK-NEXT: maxsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt: +; UNSAFE-LABEL: ogt: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt: +; FINITE-LABEL: ogt: ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @ogt(double %x, double %y) nounwind { @@ -27,13 +27,13 @@ define double @ogt(double %x, double %y) nounwind { ret double %d } -; CHECK: olt: +; CHECK-LABEL: olt: ; CHECK-NEXT: minsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt: +; UNSAFE-LABEL: olt: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt: +; FINITE-LABEL: olt: ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @olt(double %x, double %y) nounwind { @@ -42,14 +42,14 @@ define double @olt(double %x, double %y) nounwind { ret double %d } -; CHECK: ogt_inverse: +; CHECK-LABEL: ogt_inverse: ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt_inverse: +; UNSAFE-LABEL: ogt_inverse: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt_inverse: +; FINITE-LABEL: ogt_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -59,14 +59,14 @@ define double @ogt_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: olt_inverse: +; CHECK-LABEL: olt_inverse: ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt_inverse: +; UNSAFE-LABEL: olt_inverse: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt_inverse: +; FINITE-LABEL: olt_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -76,12 +76,12 @@ define double @olt_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: oge: +; CHECK-LABEL: oge: ; CHECK-NEXT: ucomisd %xmm1, %xmm0 -; UNSAFE: oge: +; UNSAFE-LABEL: oge: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge: +; FINITE-LABEL: oge: ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @oge(double %x, double %y) nounwind { @@ -90,11 +90,11 @@ define double @oge(double %x, double %y) nounwind { ret double %d } -; CHECK: ole: +; CHECK-LABEL: ole: ; CHECK-NEXT: ucomisd %xmm0, %xmm1 -; UNSAFE: ole: +; UNSAFE-LABEL: ole: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 -; FINITE: ole: +; FINITE-LABEL: ole: ; FINITE-NEXT: minsd %xmm1, %xmm0 define double @ole(double %x, double %y) nounwind { %c = fcmp ole double %x, %y @@ -102,12 +102,12 @@ define double @ole(double %x, double %y) nounwind { ret double %d } -; CHECK: oge_inverse: +; CHECK-LABEL: oge_inverse: ; CHECK-NEXT: ucomisd %xmm1, %xmm0 -; UNSAFE: oge_inverse: +; UNSAFE-LABEL: oge_inverse: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge_inverse: +; FINITE-LABEL: oge_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -117,12 +117,12 @@ define double @oge_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: ole_inverse: +; CHECK-LABEL: ole_inverse: ; CHECK-NEXT: ucomisd %xmm0, %xmm1 -; UNSAFE: ole_inverse: +; UNSAFE-LABEL: ole_inverse: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ole_inverse: +; FINITE-LABEL: ole_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -132,16 +132,16 @@ define double @ole_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: ogt_x: +; CHECK-LABEL: ogt_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: maxsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt_x: +; UNSAFE-LABEL: ogt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt_x: +; FINITE-LABEL: ogt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -151,16 +151,16 @@ define double @ogt_x(double %x) nounwind { ret double %d } -; CHECK: olt_x: +; CHECK-LABEL: olt_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: minsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt_x: +; UNSAFE-LABEL: olt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt_x: +; FINITE-LABEL: olt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -170,17 +170,17 @@ define double @olt_x(double %x) nounwind { ret double %d } -; CHECK: ogt_inverse_x: +; CHECK-LABEL: ogt_inverse_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt_inverse_x: +; UNSAFE-LABEL: ogt_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt_inverse_x: +; FINITE-LABEL: ogt_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -191,17 +191,17 @@ define double @ogt_inverse_x(double %x) nounwind { ret double %d } -; CHECK: olt_inverse_x: +; CHECK-LABEL: olt_inverse_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt_inverse_x: +; UNSAFE-LABEL: olt_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt_inverse_x: +; FINITE-LABEL: olt_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -212,14 +212,14 @@ define double @olt_inverse_x(double %x) nounwind { ret double %d } -; CHECK: oge_x: +; CHECK-LABEL: oge_x: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: oge_x: +; UNSAFE-LABEL: oge_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge_x: +; FINITE-LABEL: oge_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -229,14 +229,14 @@ define double @oge_x(double %x) nounwind { ret double %d } -; CHECK: ole_x: +; CHECK-LABEL: ole_x: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ole_x: +; UNSAFE-LABEL: ole_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ole_x: +; FINITE-LABEL: ole_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -246,14 +246,14 @@ define double @ole_x(double %x) nounwind { ret double %d } -; CHECK: oge_inverse_x: +; CHECK-LABEL: oge_inverse_x: ; CHECK: ucomisd %xmm -; UNSAFE: oge_inverse_x: +; UNSAFE-LABEL: oge_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge_inverse_x: +; FINITE-LABEL: oge_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -264,14 +264,14 @@ define double @oge_inverse_x(double %x) nounwind { ret double %d } -; CHECK: ole_inverse_x: +; CHECK-LABEL: ole_inverse_x: ; CHECK: ucomisd %xmm -; UNSAFE: ole_inverse_x: +; UNSAFE-LABEL: ole_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ole_inverse_x: +; FINITE-LABEL: ole_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -282,12 +282,12 @@ define double @ole_inverse_x(double %x) nounwind { ret double %d } -; CHECK: ugt: +; CHECK-LABEL: ugt: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ugt: +; UNSAFE-LABEL: ugt: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt: +; FINITE-LABEL: ugt: ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @ugt(double %x, double %y) nounwind { @@ -296,12 +296,12 @@ define double @ugt(double %x, double %y) nounwind { ret double %d } -; CHECK: ult: +; CHECK-LABEL: ult: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: ult: +; UNSAFE-LABEL: ult: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult: +; FINITE-LABEL: ult: ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @ult(double %x, double %y) nounwind { @@ -310,12 +310,12 @@ define double @ult(double %x, double %y) nounwind { ret double %d } -; CHECK: ugt_inverse: +; CHECK-LABEL: ugt_inverse: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ugt_inverse: +; UNSAFE-LABEL: ugt_inverse: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt_inverse: +; FINITE-LABEL: ugt_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -325,12 +325,12 @@ define double @ugt_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: ult_inverse: +; CHECK-LABEL: ult_inverse: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: ult_inverse: +; UNSAFE-LABEL: ult_inverse: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult_inverse: +; FINITE-LABEL: ult_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -340,14 +340,14 @@ define double @ult_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: uge: +; CHECK-LABEL: uge: ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge: +; UNSAFE-LABEL: uge: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge: +; FINITE-LABEL: uge: ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @uge(double %x, double %y) nounwind { @@ -356,14 +356,14 @@ define double @uge(double %x, double %y) nounwind { ret double %d } -; CHECK: ule: +; CHECK-LABEL: ule: ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule: +; UNSAFE-LABEL: ule: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule: +; FINITE-LABEL: ule: ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret define double @ule(double %x, double %y) nounwind { @@ -372,13 +372,13 @@ define double @ule(double %x, double %y) nounwind { ret double %d } -; CHECK: uge_inverse: +; CHECK-LABEL: uge_inverse: ; CHECK-NEXT: minsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge_inverse: +; UNSAFE-LABEL: uge_inverse: ; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge_inverse: +; FINITE-LABEL: uge_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -388,13 +388,13 @@ define double @uge_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: ule_inverse: +; CHECK-LABEL: ule_inverse: ; CHECK-NEXT: maxsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule_inverse: +; UNSAFE-LABEL: ule_inverse: ; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule_inverse: +; FINITE-LABEL: ule_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -404,14 +404,14 @@ define double @ule_inverse(double %x, double %y) nounwind { ret double %d } -; CHECK: ugt_x: +; CHECK-LABEL: ugt_x: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ugt_x: +; UNSAFE-LABEL: ugt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt_x: +; FINITE-LABEL: ugt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -421,14 +421,14 @@ define double @ugt_x(double %x) nounwind { ret double %d } -; CHECK: ult_x: +; CHECK-LABEL: ult_x: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: ult_x: +; UNSAFE-LABEL: ult_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult_x: +; FINITE-LABEL: ult_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -438,14 +438,14 @@ define double @ult_x(double %x) nounwind { ret double %d } -; CHECK: ugt_inverse_x: +; CHECK-LABEL: ugt_inverse_x: ; CHECK: ucomisd %xmm -; UNSAFE: ugt_inverse_x: +; UNSAFE-LABEL: ugt_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt_inverse_x: +; FINITE-LABEL: ugt_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -456,14 +456,14 @@ define double @ugt_inverse_x(double %x) nounwind { ret double %d } -; CHECK: ult_inverse_x: +; CHECK-LABEL: ult_inverse_x: ; CHECK: ucomisd %xmm -; UNSAFE: ult_inverse_x: +; UNSAFE-LABEL: ult_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult_inverse_x: +; FINITE-LABEL: ult_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -474,17 +474,17 @@ define double @ult_inverse_x(double %x) nounwind { ret double %d } -; CHECK: uge_x: +; CHECK-LABEL: uge_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge_x: +; UNSAFE-LABEL: uge_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge_x: +; FINITE-LABEL: uge_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -494,17 +494,17 @@ define double @uge_x(double %x) nounwind { ret double %d } -; CHECK: ule_x: +; CHECK-LABEL: ule_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule_x: +; UNSAFE-LABEL: ule_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule_x: +; FINITE-LABEL: ule_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm1, %xmm0 ; FINITE-NEXT: ret @@ -514,16 +514,16 @@ define double @ule_x(double %x) nounwind { ret double %d } -; CHECK: uge_inverse_x: +; CHECK-LABEL: uge_inverse_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: minsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge_inverse_x: +; UNSAFE-LABEL: uge_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: minsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge_inverse_x: +; FINITE-LABEL: uge_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -534,16 +534,16 @@ define double @uge_inverse_x(double %x) nounwind { ret double %d } -; CHECK: ule_inverse_x: +; CHECK-LABEL: ule_inverse_x: ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; CHECK-NEXT: maxsd %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule_inverse_x: +; UNSAFE-LABEL: ule_inverse_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; UNSAFE-NEXT: maxsd %xmm0, %xmm1 ; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule_inverse_x: +; FINITE-LABEL: ule_inverse_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -554,13 +554,13 @@ define double @ule_inverse_x(double %x) nounwind { ret double %d } -; CHECK: ogt_y: +; CHECK-LABEL: ogt_y: ; CHECK-NEXT: maxsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt_y: +; UNSAFE-LABEL: ogt_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt_y: +; FINITE-LABEL: ogt_y: ; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @ogt_y(double %x) nounwind { @@ -569,13 +569,13 @@ define double @ogt_y(double %x) nounwind { ret double %d } -; CHECK: olt_y: +; CHECK-LABEL: olt_y: ; CHECK-NEXT: minsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt_y: +; UNSAFE-LABEL: olt_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt_y: +; FINITE-LABEL: olt_y: ; FINITE-NEXT: minsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @olt_y(double %x) nounwind { @@ -584,15 +584,15 @@ define double @olt_y(double %x) nounwind { ret double %d } -; CHECK: ogt_inverse_y: +; CHECK-LABEL: ogt_inverse_y: ; CHECK-NEXT: movsd {{[^,]*}}, %xmm1 ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ogt_inverse_y: +; UNSAFE-LABEL: ogt_inverse_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ogt_inverse_y: +; FINITE-LABEL: ogt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -603,15 +603,15 @@ define double @ogt_inverse_y(double %x) nounwind { ret double %d } -; CHECK: olt_inverse_y: +; CHECK-LABEL: olt_inverse_y: ; CHECK-NEXT: movsd {{[^,]*}}, %xmm1 ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: olt_inverse_y: +; UNSAFE-LABEL: olt_inverse_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: olt_inverse_y: +; FINITE-LABEL: olt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -622,12 +622,12 @@ define double @olt_inverse_y(double %x) nounwind { ret double %d } -; CHECK: oge_y: +; CHECK-LABEL: oge_y: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: oge_y: +; UNSAFE-LABEL: oge_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge_y: +; FINITE-LABEL: oge_y: ; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @oge_y(double %x) nounwind { @@ -636,12 +636,12 @@ define double @oge_y(double %x) nounwind { ret double %d } -; CHECK: ole_y: +; CHECK-LABEL: ole_y: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ole_y: +; UNSAFE-LABEL: ole_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ole_y: +; FINITE-LABEL: ole_y: ; FINITE-NEXT: minsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @ole_y(double %x) nounwind { @@ -650,12 +650,12 @@ define double @ole_y(double %x) nounwind { ret double %d } -; CHECK: oge_inverse_y: +; CHECK-LABEL: oge_inverse_y: ; CHECK: ucomisd %xmm -; UNSAFE: oge_inverse_y: +; UNSAFE-LABEL: oge_inverse_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: oge_inverse_y: +; FINITE-LABEL: oge_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -666,12 +666,12 @@ define double @oge_inverse_y(double %x) nounwind { ret double %d } -; CHECK: ole_inverse_y: +; CHECK-LABEL: ole_inverse_y: ; CHECK: ucomisd %xmm -; UNSAFE: ole_inverse_y: +; UNSAFE-LABEL: ole_inverse_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ole_inverse_y: +; FINITE-LABEL: ole_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -682,12 +682,12 @@ define double @ole_inverse_y(double %x) nounwind { ret double %d } -; CHECK: ugt_y: +; CHECK-LABEL: ugt_y: ; CHECK: ucomisd %xmm0, %xmm1 -; UNSAFE: ugt_y: +; UNSAFE-LABEL: ugt_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt_y: +; FINITE-LABEL: ugt_y: ; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @ugt_y(double %x) nounwind { @@ -696,12 +696,12 @@ define double @ugt_y(double %x) nounwind { ret double %d } -; CHECK: ult_y: +; CHECK-LABEL: ult_y: ; CHECK: ucomisd %xmm1, %xmm0 -; UNSAFE: ult_y: +; UNSAFE-LABEL: ult_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult_y: +; FINITE-LABEL: ult_y: ; FINITE-NEXT: minsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @ult_y(double %x) nounwind { @@ -710,12 +710,12 @@ define double @ult_y(double %x) nounwind { ret double %d } -; CHECK: ugt_inverse_y: +; CHECK-LABEL: ugt_inverse_y: ; CHECK: ucomisd %xmm -; UNSAFE: ugt_inverse_y: +; UNSAFE-LABEL: ugt_inverse_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ugt_inverse_y: +; FINITE-LABEL: ugt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -726,12 +726,12 @@ define double @ugt_inverse_y(double %x) nounwind { ret double %d } -; CHECK: ult_inverse_y: +; CHECK-LABEL: ult_inverse_y: ; CHECK: ucomisd %xmm -; UNSAFE: ult_inverse_y: +; UNSAFE-LABEL: ult_inverse_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ult_inverse_y: +; FINITE-LABEL: ult_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -742,15 +742,15 @@ define double @ult_inverse_y(double %x) nounwind { ret double %d } -; CHECK: uge_y: +; CHECK-LABEL: uge_y: ; CHECK-NEXT: movsd {{[^,]*}}, %xmm1 ; CHECK-NEXT: maxsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge_y: +; UNSAFE-LABEL: uge_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge_y: +; FINITE-LABEL: uge_y: ; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @uge_y(double %x) nounwind { @@ -759,15 +759,15 @@ define double @uge_y(double %x) nounwind { ret double %d } -; CHECK: ule_y: +; CHECK-LABEL: ule_y: ; CHECK-NEXT: movsd {{[^,]*}}, %xmm1 ; CHECK-NEXT: minsd %xmm0, %xmm1 ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule_y: +; UNSAFE-LABEL: ule_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule_y: +; FINITE-LABEL: ule_y: ; FINITE-NEXT: minsd {{[^,]*}}, %xmm0 ; FINITE-NEXT: ret define double @ule_y(double %x) nounwind { @@ -776,13 +776,13 @@ define double @ule_y(double %x) nounwind { ret double %d } -; CHECK: uge_inverse_y: +; CHECK-LABEL: uge_inverse_y: ; CHECK-NEXT: minsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: uge_inverse_y: +; UNSAFE-LABEL: uge_inverse_y: ; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: uge_inverse_y: +; FINITE-LABEL: uge_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: minsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -793,13 +793,13 @@ define double @uge_inverse_y(double %x) nounwind { ret double %d } -; CHECK: ule_inverse_y: +; CHECK-LABEL: ule_inverse_y: ; CHECK-NEXT: maxsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret -; UNSAFE: ule_inverse_y: +; UNSAFE-LABEL: ule_inverse_y: ; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret -; FINITE: ule_inverse_y: +; FINITE-LABEL: ule_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 ; FINITE-NEXT: maxsd %xmm0, %xmm1 ; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0 @@ -811,11 +811,11 @@ define double @ule_inverse_y(double %x) nounwind { } ; Test a few more misc. cases. -; CHECK: clampTo3k_a: +; CHECK-LABEL: clampTo3k_a: ; CHECK: minsd -; UNSAFE: clampTo3k_a: +; UNSAFE-LABEL: clampTo3k_a: ; UNSAFE: minsd -; FINITE: clampTo3k_a: +; FINITE-LABEL: clampTo3k_a: ; FINITE: minsd define double @clampTo3k_a(double %x) nounwind readnone { entry: @@ -824,11 +824,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_b: +; CHECK-LABEL: clampTo3k_b: ; CHECK: minsd -; UNSAFE: clampTo3k_b: +; UNSAFE-LABEL: clampTo3k_b: ; UNSAFE: minsd -; FINITE: clampTo3k_b: +; FINITE-LABEL: clampTo3k_b: ; FINITE: minsd define double @clampTo3k_b(double %x) nounwind readnone { entry: @@ -837,11 +837,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_c: +; CHECK-LABEL: clampTo3k_c: ; CHECK: maxsd -; UNSAFE: clampTo3k_c: +; UNSAFE-LABEL: clampTo3k_c: ; UNSAFE: maxsd -; FINITE: clampTo3k_c: +; FINITE-LABEL: clampTo3k_c: ; FINITE: maxsd define double @clampTo3k_c(double %x) nounwind readnone { entry: @@ -850,11 +850,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_d: +; CHECK-LABEL: clampTo3k_d: ; CHECK: maxsd -; UNSAFE: clampTo3k_d: +; UNSAFE-LABEL: clampTo3k_d: ; UNSAFE: maxsd -; FINITE: clampTo3k_d: +; FINITE-LABEL: clampTo3k_d: ; FINITE: maxsd define double @clampTo3k_d(double %x) nounwind readnone { entry: @@ -863,11 +863,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_e: +; CHECK-LABEL: clampTo3k_e: ; CHECK: maxsd -; UNSAFE: clampTo3k_e: +; UNSAFE-LABEL: clampTo3k_e: ; UNSAFE: maxsd -; FINITE: clampTo3k_e: +; FINITE-LABEL: clampTo3k_e: ; FINITE: maxsd define double @clampTo3k_e(double %x) nounwind readnone { entry: @@ -876,11 +876,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_f: +; CHECK-LABEL: clampTo3k_f: ; CHECK: maxsd -; UNSAFE: clampTo3k_f: +; UNSAFE-LABEL: clampTo3k_f: ; UNSAFE: maxsd -; FINITE: clampTo3k_f: +; FINITE-LABEL: clampTo3k_f: ; FINITE: maxsd define double @clampTo3k_f(double %x) nounwind readnone { entry: @@ -889,11 +889,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_g: +; CHECK-LABEL: clampTo3k_g: ; CHECK: minsd -; UNSAFE: clampTo3k_g: +; UNSAFE-LABEL: clampTo3k_g: ; UNSAFE: minsd -; FINITE: clampTo3k_g: +; FINITE-LABEL: clampTo3k_g: ; FINITE: minsd define double @clampTo3k_g(double %x) nounwind readnone { entry: @@ -902,11 +902,11 @@ entry: ret double %x_addr.0 } -; CHECK: clampTo3k_h: +; CHECK-LABEL: clampTo3k_h: ; CHECK: minsd -; UNSAFE: clampTo3k_h: +; UNSAFE-LABEL: clampTo3k_h: ; UNSAFE: minsd -; FINITE: clampTo3k_h: +; FINITE-LABEL: clampTo3k_h: ; FINITE: minsd define double @clampTo3k_h(double %x) nounwind readnone { entry: @@ -915,7 +915,7 @@ entry: ret double %x_addr.0 } -; UNSAFE: maxpd: +; UNSAFE-LABEL: maxpd: ; UNSAFE: maxpd define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { %max_is_x = fcmp oge <2 x double> %x, %y @@ -923,7 +923,7 @@ define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) { ret <2 x double> %max } -; UNSAFE: minpd: +; UNSAFE-LABEL: minpd: ; UNSAFE: minpd define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { %min_is_x = fcmp ole <2 x double> %x, %y @@ -931,7 +931,7 @@ define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) { ret <2 x double> %min } -; UNSAFE: maxps: +; UNSAFE-LABEL: maxps: ; UNSAFE: maxps define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { %max_is_x = fcmp oge <4 x float> %x, %y @@ -939,7 +939,7 @@ define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) { ret <4 x float> %max } -; UNSAFE: minps: +; UNSAFE-LABEL: minps: ; UNSAFE: minps define <4 x float> @minps(<4 x float> %x, <4 x float> %y) { %min_is_x = fcmp ole <4 x float> %x, %y diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index 48638b3..4c95c9f 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -15,7 +15,7 @@ entry: store <8 x i16> %tmp6, <8 x i16>* %dest ret void -; X64: t0: +; X64-LABEL: t0: ; X64: movdqa (%rsi), %xmm0 ; X64: pslldq $2, %xmm0 ; X64: movdqa %xmm0, (%rdi) @@ -28,7 +28,7 @@ define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > ret <8 x i16> %tmp3 -; X64: t1: +; X64-LABEL: t1: ; X64: movdqa (%rdi), %xmm0 ; X64: pinsrw $0, (%rsi), %xmm0 ; X64: ret @@ -37,7 +37,7 @@ define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 > ret <8 x i16> %tmp -; X64: t2: +; X64-LABEL: t2: ; X64: pextrw $1, %xmm1, %eax ; X64: pinsrw $0, %eax, %xmm0 ; X64: pinsrw $3, %eax, %xmm0 @@ -47,7 +47,7 @@ define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 > ret <8 x i16> %tmp -; X64: t3: +; X64-LABEL: t3: ; X64: pextrw $5, %xmm0, %eax ; X64: pshuflw $44, %xmm0, %xmm0 ; X64: pshufhw $27, %xmm0, %xmm0 @@ -58,7 +58,7 @@ define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > ret <8 x i16> %tmp -; X64: t4: +; X64-LABEL: t4: ; X64: pextrw $7, [[XMM0:%xmm[0-9]+]], %eax ; X64: pshufhw $100, [[XMM0]], [[XMM1:%xmm[0-9]+]] ; X64: pinsrw $1, %eax, [[XMM1]] @@ -179,7 +179,7 @@ entry: %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > ret <8 x i16> %tmp7 -; X64: t11: +; X64-LABEL: t11: ; X64: movd %xmm1, %eax ; X64: movlhps %xmm0, %xmm0 ; X64: pshuflw $1, %xmm0, %xmm0 @@ -193,7 +193,7 @@ entry: %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef > ret <8 x i16> %tmp9 -; X64: t12: +; X64-LABEL: t12: ; X64: pextrw $3, %xmm1, %eax ; X64: movlhps %xmm0, %xmm0 ; X64: pshufhw $3, %xmm0, %xmm0 @@ -206,7 +206,7 @@ define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { entry: %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef > ret <8 x i16> %tmp9 -; X64: t13: +; X64-LABEL: t13: ; X64: punpcklqdq %xmm0, %xmm1 ; X64: pextrw $3, %xmm1, %eax ; X64: pshufd $52, %xmm1, %xmm0 @@ -219,7 +219,7 @@ define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { entry: %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef > ret <8 x i16> %tmp9 -; X64: t14: +; X64-LABEL: t14: ; X64: punpcklqdq %xmm0, %xmm1 ; X64: pshufhw $8, %xmm1, %xmm0 ; X64: ret @@ -259,7 +259,7 @@ entry: ; rdar://8520311 define <4 x i32> @t17() nounwind { entry: -; X64: t17: +; X64-LABEL: t17: ; X64: movddup (%rax), %xmm0 %tmp1 = load <4 x float>* undef, align 16 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 4, i32 1, i32 2, i32 3> diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index c6f9f0c..87b64e5 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -6,20 +6,20 @@ define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind { %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1 ret <4 x i32> %tmp1 -; X32: pinsrd_1: +; X32-LABEL: pinsrd_1: ; X32: pinsrd $1, 4(%esp), %xmm0 -; X64: pinsrd_1: +; X64-LABEL: pinsrd_1: ; X64: pinsrd $1, %edi, %xmm0 } define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind { %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1 ret <16 x i8> %tmp1 -; X32: pinsrb_1: +; X32-LABEL: pinsrb_1: ; X32: pinsrb $1, 4(%esp), %xmm0 -; X64: pinsrb_1: +; X64-LABEL: pinsrb_1: ; X64: pinsrb $1, %edi, %xmm0 } @@ -237,12 +237,12 @@ entry: %tmp11 = insertelement <2 x float> undef, float %add.r, i32 0 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1 ret <2 x float> %tmp9 -; X32: buildvector: +; X32-LABEL: buildvector: ; X32-NOT: insertps $0 ; X32: insertps $16 ; X32-NOT: insertps $0 ; X32: ret -; X64: buildvector: +; X64-LABEL: buildvector: ; X64-NOT: insertps $0 ; X64: insertps $16 ; X64-NOT: insertps $0 diff --git a/test/CodeGen/X86/sse_partial_update.ll b/test/CodeGen/X86/sse_partial_update.ll index 655f758..2c16a55 100644 --- a/test/CodeGen/X86/sse_partial_update.ll +++ b/test/CodeGen/X86/sse_partial_update.ll @@ -8,7 +8,7 @@ ; destination of rsqrtss are the same. define void @t1(<4 x float> %a) nounwind uwtable ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: rsqrtss %xmm0, %xmm0 %0 = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a) nounwind %a.addr.0.extract = extractelement <4 x float> %0, i32 0 @@ -23,7 +23,7 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone define void @t2(<4 x float> %a) nounwind uwtable ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: rcpss %xmm0, %xmm0 %0 = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a) nounwind %a.addr.0.extract = extractelement <4 x float> %0, i32 0 diff --git a/test/CodeGen/X86/stack-protector.ll b/test/CodeGen/X86/stack-protector.ll index 6191ce6..a4dbbb9 100644 --- a/test/CodeGen/X86/stack-protector.ll +++ b/test/CodeGen/X86/stack-protector.ll @@ -24,19 +24,19 @@ ; Requires no protector. define void @test1a(i8* %a) nounwind uwtable { entry: -; LINUX-I386: test1a: +; LINUX-I386-LABEL: test1a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test1a: +; LINUX-X64-LABEL: test1a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test1a: +; LINUX-KERNEL-X64-LABEL: test1a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test1a: +; DARWIN-X64-LABEL: test1a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -55,23 +55,23 @@ entry: ; Requires protector. define void @test1b(i8* %a) nounwind uwtable ssp { entry: -; LINUX-I386: test1b: +; LINUX-I386-LABEL: test1b: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test1b: +; LINUX-X64-LABEL: test1b: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test1b: +; LINUX-KERNEL-X64-LABEL: test1b: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test1b: +; DARWIN-X64-LABEL: test1b: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail -; OPENBSD-AMD64: test1b: +; OPENBSD-AMD64-LABEL: test1b: ; OPENBSD-AMD64: movq __guard_local(%rip) ; OPENBSD-AMD64: callq __stack_smash_handler %a.addr = alloca i8*, align 8 @@ -90,19 +90,19 @@ entry: ; Requires protector. define void @test1c(i8* %a) nounwind uwtable sspstrong { entry: -; LINUX-I386: test1c: +; LINUX-I386-LABEL: test1c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test1c: +; LINUX-X64-LABEL: test1c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test1c: +; LINUX-KERNEL-X64-LABEL: test1c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test1c: +; DARWIN-X64-LABEL: test1c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -121,19 +121,19 @@ entry: ; Requires protector. define void @test1d(i8* %a) nounwind uwtable sspreq { entry: -; LINUX-I386: test1d: +; LINUX-I386-LABEL: test1d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test1d: +; LINUX-X64-LABEL: test1d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test1d: +; LINUX-KERNEL-X64-LABEL: test1d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test1d: +; DARWIN-X64-LABEL: test1d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -152,19 +152,19 @@ entry: ; Requires no protector. define void @test2a(i8* %a) nounwind uwtable { entry: -; LINUX-I386: test2a: +; LINUX-I386-LABEL: test2a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test2a: +; LINUX-X64-LABEL: test2a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test2a: +; LINUX-KERNEL-X64-LABEL: test2a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test2a: +; DARWIN-X64-LABEL: test2a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -185,19 +185,19 @@ entry: ; Requires protector. define void @test2b(i8* %a) nounwind uwtable ssp { entry: -; LINUX-I386: test2b: +; LINUX-I386-LABEL: test2b: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test2b: +; LINUX-X64-LABEL: test2b: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test2b: +; LINUX-KERNEL-X64-LABEL: test2b: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test2b: +; DARWIN-X64-LABEL: test2b: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -218,19 +218,19 @@ entry: ; Requires protector. define void @test2c(i8* %a) nounwind uwtable sspstrong { entry: -; LINUX-I386: test2c: +; LINUX-I386-LABEL: test2c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test2c: +; LINUX-X64-LABEL: test2c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test2c: +; LINUX-KERNEL-X64-LABEL: test2c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test2c: +; DARWIN-X64-LABEL: test2c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -251,19 +251,19 @@ entry: ; Requires protector. define void @test2d(i8* %a) nounwind uwtable sspreq { entry: -; LINUX-I386: test2d: +; LINUX-I386-LABEL: test2d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test2d: +; LINUX-X64-LABEL: test2d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test2d: +; LINUX-KERNEL-X64-LABEL: test2d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test2d: +; DARWIN-X64-LABEL: test2d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -284,19 +284,19 @@ entry: ; Requires no protector. define void @test3a(i8* %a) nounwind uwtable { entry: -; LINUX-I386: test3a: +; LINUX-I386-LABEL: test3a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test3a: +; LINUX-X64-LABEL: test3a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test3a: +; LINUX-KERNEL-X64-LABEL: test3a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test3a: +; DARWIN-X64-LABEL: test3a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -315,19 +315,19 @@ entry: ; Requires no protector. define void @test3b(i8* %a) nounwind uwtable ssp { entry: -; LINUX-I386: test3b: +; LINUX-I386-LABEL: test3b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test3b: +; LINUX-X64-LABEL: test3b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test3b: +; LINUX-KERNEL-X64-LABEL: test3b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test3b: +; DARWIN-X64-LABEL: test3b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -346,19 +346,19 @@ entry: ; Requires protector. define void @test3c(i8* %a) nounwind uwtable sspstrong { entry: -; LINUX-I386: test3c: +; LINUX-I386-LABEL: test3c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test3c: +; LINUX-X64-LABEL: test3c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test3c: +; LINUX-KERNEL-X64-LABEL: test3c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test3c: +; DARWIN-X64-LABEL: test3c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -377,19 +377,19 @@ entry: ; Requires protector. define void @test3d(i8* %a) nounwind uwtable sspreq { entry: -; LINUX-I386: test3d: +; LINUX-I386-LABEL: test3d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test3d: +; LINUX-X64-LABEL: test3d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test3d: +; LINUX-KERNEL-X64-LABEL: test3d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test3d: +; DARWIN-X64-LABEL: test3d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -408,19 +408,19 @@ entry: ; Requires no protector. define void @test4a(i8* %a) nounwind uwtable { entry: -; LINUX-I386: test4a: +; LINUX-I386-LABEL: test4a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test4a: +; LINUX-X64-LABEL: test4a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test4a: +; LINUX-KERNEL-X64-LABEL: test4a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test4a: +; DARWIN-X64-LABEL: test4a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -441,19 +441,19 @@ entry: ; Requires no protector. define void @test4b(i8* %a) nounwind uwtable ssp { entry: -; LINUX-I386: test4b: +; LINUX-I386-LABEL: test4b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test4b: +; LINUX-X64-LABEL: test4b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test4b: +; LINUX-KERNEL-X64-LABEL: test4b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test4b: +; DARWIN-X64-LABEL: test4b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -474,19 +474,19 @@ entry: ; Requires protector. define void @test4c(i8* %a) nounwind uwtable sspstrong { entry: -; LINUX-I386: test4c: +; LINUX-I386-LABEL: test4c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test4c: +; LINUX-X64-LABEL: test4c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test4c: +; LINUX-KERNEL-X64-LABEL: test4c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test4c: +; DARWIN-X64-LABEL: test4c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -507,19 +507,19 @@ entry: ; Requires protector. define void @test4d(i8* %a) nounwind uwtable sspreq { entry: -; LINUX-I386: test4d: +; LINUX-I386-LABEL: test4d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test4d: +; LINUX-X64-LABEL: test4d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test4d: +; LINUX-KERNEL-X64-LABEL: test4d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test4d: +; DARWIN-X64-LABEL: test4d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -540,19 +540,19 @@ entry: ; Requires no protector. define void @test5a(i8* %a) nounwind uwtable { entry: -; LINUX-I386: test5a: +; LINUX-I386-LABEL: test5a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test5a: +; LINUX-X64-LABEL: test5a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test5a: +; LINUX-KERNEL-X64-LABEL: test5a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test5a: +; DARWIN-X64-LABEL: test5a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -567,19 +567,19 @@ entry: ; Requires no protector. define void @test5b(i8* %a) nounwind uwtable ssp { entry: -; LINUX-I386: test5b: +; LINUX-I386-LABEL: test5b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test5b: +; LINUX-X64-LABEL: test5b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test5b: +; LINUX-KERNEL-X64-LABEL: test5b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test5b: +; DARWIN-X64-LABEL: test5b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -594,19 +594,19 @@ entry: ; Requires no protector. define void @test5c(i8* %a) nounwind uwtable sspstrong { entry: -; LINUX-I386: test5c: +; LINUX-I386-LABEL: test5c: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test5c: +; LINUX-X64-LABEL: test5c: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test5c: +; LINUX-KERNEL-X64-LABEL: test5c: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test5c: +; DARWIN-X64-LABEL: test5c: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a.addr = alloca i8*, align 8 @@ -621,19 +621,19 @@ entry: ; Requires protector. define void @test5d(i8* %a) nounwind uwtable sspreq { entry: -; LINUX-I386: test5d: +; LINUX-I386-LABEL: test5d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test5d: +; LINUX-X64-LABEL: test5d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test5d: +; LINUX-KERNEL-X64-LABEL: test5d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test5d: +; DARWIN-X64-LABEL: test5d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a.addr = alloca i8*, align 8 @@ -648,19 +648,19 @@ entry: ; Requires no protector. define void @test6a() nounwind uwtable { entry: -; LINUX-I386: test6a: +; LINUX-I386-LABEL: test6a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test6a: +; LINUX-X64-LABEL: test6a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test6a: +; LINUX-KERNEL-X64-LABEL: test6a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test6a: +; DARWIN-X64-LABEL: test6a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %retval = alloca i32, align 4 @@ -679,19 +679,19 @@ entry: ; Requires no protector. define void @test6b() nounwind uwtable ssp { entry: -; LINUX-I386: test6b: +; LINUX-I386-LABEL: test6b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test6b: +; LINUX-X64-LABEL: test6b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test6b: +; LINUX-KERNEL-X64-LABEL: test6b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test6b: +; DARWIN-X64-LABEL: test6b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %retval = alloca i32, align 4 @@ -710,19 +710,19 @@ entry: ; Requires protector. define void @test6c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test6c: +; LINUX-I386-LABEL: test6c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test6c: +; LINUX-X64-LABEL: test6c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test6c: +; LINUX-KERNEL-X64-LABEL: test6c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test6c: +; DARWIN-X64-LABEL: test6c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %retval = alloca i32, align 4 @@ -741,19 +741,19 @@ entry: ; Requires protector. define void @test6d() nounwind uwtable sspreq { entry: -; LINUX-I386: test6d: +; LINUX-I386-LABEL: test6d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test6d: +; LINUX-X64-LABEL: test6d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test6d: +; LINUX-KERNEL-X64-LABEL: test6d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test6d: +; DARWIN-X64-LABEL: test6d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %retval = alloca i32, align 4 @@ -772,19 +772,19 @@ entry: ; Requires no protector. define void @test7a() nounwind uwtable readnone { entry: -; LINUX-I386: test7a: +; LINUX-I386-LABEL: test7a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test7a: +; LINUX-X64-LABEL: test7a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test7a: +; LINUX-KERNEL-X64-LABEL: test7a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test7a: +; DARWIN-X64-LABEL: test7a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -798,19 +798,19 @@ entry: ; Requires no protector. define void @test7b() nounwind uwtable readnone ssp { entry: -; LINUX-I386: test7b: +; LINUX-I386-LABEL: test7b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test7b: +; LINUX-X64-LABEL: test7b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test7b: +; LINUX-KERNEL-X64-LABEL: test7b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test7b: +; DARWIN-X64-LABEL: test7b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -824,19 +824,19 @@ entry: ; Requires protector. define void @test7c() nounwind uwtable readnone sspstrong { entry: -; LINUX-I386: test7c: +; LINUX-I386-LABEL: test7c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test7c: +; LINUX-X64-LABEL: test7c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test7c: +; LINUX-KERNEL-X64-LABEL: test7c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test7c: +; DARWIN-X64-LABEL: test7c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -850,19 +850,19 @@ entry: ; Requires protector. define void @test7d() nounwind uwtable readnone sspreq { entry: -; LINUX-I386: test7d: +; LINUX-I386-LABEL: test7d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test7d: +; LINUX-X64-LABEL: test7d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test7d: +; LINUX-KERNEL-X64-LABEL: test7d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test7d: +; DARWIN-X64-LABEL: test7d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -876,19 +876,19 @@ entry: ; Requires no protector. define void @test8a() nounwind uwtable { entry: -; LINUX-I386: test8a: +; LINUX-I386-LABEL: test8a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test8a: +; LINUX-X64-LABEL: test8a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test8a: +; LINUX-KERNEL-X64-LABEL: test8a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test8a: +; DARWIN-X64-LABEL: test8a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %b = alloca i32, align 4 @@ -901,19 +901,19 @@ entry: ; Requires no protector. define void @test8b() nounwind uwtable ssp { entry: -; LINUX-I386: test8b: +; LINUX-I386-LABEL: test8b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test8b: +; LINUX-X64-LABEL: test8b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test8b: +; LINUX-KERNEL-X64-LABEL: test8b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test8b: +; DARWIN-X64-LABEL: test8b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %b = alloca i32, align 4 @@ -926,19 +926,19 @@ entry: ; Requires protector. define void @test8c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test8c: +; LINUX-I386-LABEL: test8c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test8c: +; LINUX-X64-LABEL: test8c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test8c: +; LINUX-KERNEL-X64-LABEL: test8c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test8c: +; DARWIN-X64-LABEL: test8c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %b = alloca i32, align 4 @@ -951,19 +951,19 @@ entry: ; Requires protector. define void @test8d() nounwind uwtable sspreq { entry: -; LINUX-I386: test8d: +; LINUX-I386-LABEL: test8d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test8d: +; LINUX-X64-LABEL: test8d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test8d: +; LINUX-KERNEL-X64-LABEL: test8d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test8d: +; DARWIN-X64-LABEL: test8d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %b = alloca i32, align 4 @@ -976,19 +976,19 @@ entry: ; Requires no protector. define void @test9a() nounwind uwtable { entry: -; LINUX-I386: test9a: +; LINUX-I386-LABEL: test9a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test9a: +; LINUX-X64-LABEL: test9a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test9a: +; LINUX-KERNEL-X64-LABEL: test9a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test9a: +; DARWIN-X64-LABEL: test9a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca double, align 8 @@ -1005,19 +1005,19 @@ entry: ; Requires no protector. define void @test9b() nounwind uwtable ssp { entry: -; LINUX-I386: test9b: +; LINUX-I386-LABEL: test9b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test9b: +; LINUX-X64-LABEL: test9b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test9b: +; LINUX-KERNEL-X64-LABEL: test9b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test9b: +; DARWIN-X64-LABEL: test9b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca double, align 8 @@ -1034,19 +1034,19 @@ entry: ; Requires protector. define void @test9c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test9c: +; LINUX-I386-LABEL: test9c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test9c: +; LINUX-X64-LABEL: test9c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test9c: +; LINUX-KERNEL-X64-LABEL: test9c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test9c: +; DARWIN-X64-LABEL: test9c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca double, align 8 @@ -1063,19 +1063,19 @@ entry: ; Requires protector. define void @test9d() nounwind uwtable sspreq { entry: -; LINUX-I386: test9d: +; LINUX-I386-LABEL: test9d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test9d: +; LINUX-X64-LABEL: test9d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test9d: +; LINUX-KERNEL-X64-LABEL: test9d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test9d: +; DARWIN-X64-LABEL: test9d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca double, align 8 @@ -1092,19 +1092,19 @@ entry: ; Requires no protector. define void @test10a() nounwind uwtable { entry: -; LINUX-I386: test10a: +; LINUX-I386-LABEL: test10a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test10a: +; LINUX-X64-LABEL: test10a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test10a: +; LINUX-KERNEL-X64-LABEL: test10a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test10a: +; DARWIN-X64-LABEL: test10a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca double, align 8 @@ -1136,19 +1136,19 @@ if.end4: ; preds = %if.else, %if.then3, ; Requires no protector. define void @test10b() nounwind uwtable ssp { entry: -; LINUX-I386: test10b: +; LINUX-I386-LABEL: test10b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test10b: +; LINUX-X64-LABEL: test10b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test10b: +; LINUX-KERNEL-X64-LABEL: test10b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test10b: +; DARWIN-X64-LABEL: test10b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca double, align 8 @@ -1180,19 +1180,19 @@ if.end4: ; preds = %if.else, %if.then3, ; Requires protector. define void @test10c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test10c: +; LINUX-I386-LABEL: test10c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test10c: +; LINUX-X64-LABEL: test10c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test10c: +; LINUX-KERNEL-X64-LABEL: test10c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test10c: +; DARWIN-X64-LABEL: test10c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca double, align 8 @@ -1224,19 +1224,19 @@ if.end4: ; preds = %if.else, %if.then3, ; Requires protector. define void @test10d() nounwind uwtable sspreq { entry: -; LINUX-I386: test10d: +; LINUX-I386-LABEL: test10d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test10d: +; LINUX-X64-LABEL: test10d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test10d: +; LINUX-KERNEL-X64-LABEL: test10d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test10d: +; DARWIN-X64-LABEL: test10d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca double, align 8 @@ -1268,19 +1268,19 @@ if.end4: ; preds = %if.else, %if.then3, ; Requires no protector. define void @test11a() nounwind uwtable { entry: -; LINUX-I386: test11a: +; LINUX-I386-LABEL: test11a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test11a: +; LINUX-X64-LABEL: test11a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test11a: +; LINUX-KERNEL-X64-LABEL: test11a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test11a: +; DARWIN-X64-LABEL: test11a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1297,19 +1297,19 @@ entry: ; Requires no protector. define void @test11b() nounwind uwtable ssp { entry: -; LINUX-I386: test11b: +; LINUX-I386-LABEL: test11b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test11b: +; LINUX-X64-LABEL: test11b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test11b: +; LINUX-KERNEL-X64-LABEL: test11b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test11b: +; DARWIN-X64-LABEL: test11b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1326,19 +1326,19 @@ entry: ; Requires protector. define void @test11c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test11c: +; LINUX-I386-LABEL: test11c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test11c: +; LINUX-X64-LABEL: test11c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test11c: +; LINUX-KERNEL-X64-LABEL: test11c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test11c: +; DARWIN-X64-LABEL: test11c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1355,19 +1355,19 @@ entry: ; Requires protector. define void @test11d() nounwind uwtable sspreq { entry: -; LINUX-I386: test11d: +; LINUX-I386-LABEL: test11d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test11d: +; LINUX-X64-LABEL: test11d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test11d: +; LINUX-KERNEL-X64-LABEL: test11d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test11d: +; DARWIN-X64-LABEL: test11d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1384,19 +1384,19 @@ entry: ; Requires no protector. define void @test12a() nounwind uwtable { entry: -; LINUX-I386: test12a: +; LINUX-I386-LABEL: test12a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test12a: +; LINUX-X64-LABEL: test12a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test12a: +; LINUX-KERNEL-X64-LABEL: test12a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test12a: +; DARWIN-X64-LABEL: test12a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1412,19 +1412,19 @@ entry: ; Requires no protector. define void @test12b() nounwind uwtable ssp { entry: -; LINUX-I386: test12b: +; LINUX-I386-LABEL: test12b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test12b: +; LINUX-X64-LABEL: test12b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test12b: +; LINUX-KERNEL-X64-LABEL: test12b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test12b: +; DARWIN-X64-LABEL: test12b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1440,19 +1440,19 @@ entry: ; Requires protector. define void @test12c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test12c: +; LINUX-I386-LABEL: test12c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test12c: +; LINUX-X64-LABEL: test12c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test12c: +; LINUX-KERNEL-X64-LABEL: test12c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test12c: +; DARWIN-X64-LABEL: test12c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1468,19 +1468,19 @@ entry: ; Requires protector. define void @test12d() nounwind uwtable sspreq { entry: -; LINUX-I386: test12d: +; LINUX-I386-LABEL: test12d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test12d: +; LINUX-X64-LABEL: test12d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test12d: +; LINUX-KERNEL-X64-LABEL: test12d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test12d: +; DARWIN-X64-LABEL: test12d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1496,19 +1496,19 @@ entry: ; Requires no protector. define void @test13a() nounwind uwtable { entry: -; LINUX-I386: test13a: +; LINUX-I386-LABEL: test13a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test13a: +; LINUX-X64-LABEL: test13a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test13a: +; LINUX-KERNEL-X64-LABEL: test13a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test13a: +; DARWIN-X64-LABEL: test13a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1522,19 +1522,19 @@ entry: ; Requires no protector. define void @test13b() nounwind uwtable ssp { entry: -; LINUX-I386: test13b: +; LINUX-I386-LABEL: test13b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test13b: +; LINUX-X64-LABEL: test13b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test13b: +; LINUX-KERNEL-X64-LABEL: test13b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test13b: +; DARWIN-X64-LABEL: test13b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -1548,19 +1548,19 @@ entry: ; Requires protector. define void @test13c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test13c: +; LINUX-I386-LABEL: test13c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test13c: +; LINUX-X64-LABEL: test13c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test13c: +; LINUX-KERNEL-X64-LABEL: test13c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test13c: +; DARWIN-X64-LABEL: test13c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1574,19 +1574,19 @@ entry: ; Requires protector. define void @test13d() nounwind uwtable sspreq { entry: -; LINUX-I386: test13d: +; LINUX-I386-LABEL: test13d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test13d: +; LINUX-X64-LABEL: test13d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test13d: +; LINUX-KERNEL-X64-LABEL: test13d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test13d: +; DARWIN-X64-LABEL: test13d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -1600,19 +1600,19 @@ entry: ; Requires no protector. define void @test14a() nounwind uwtable { entry: -; LINUX-I386: test14a: +; LINUX-I386-LABEL: test14a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test14a: +; LINUX-X64-LABEL: test14a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test14a: +; LINUX-KERNEL-X64-LABEL: test14a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test14a: +; DARWIN-X64-LABEL: test14a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1626,19 +1626,19 @@ entry: ; Requires no protector. define void @test14b() nounwind uwtable ssp { entry: -; LINUX-I386: test14b: +; LINUX-I386-LABEL: test14b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test14b: +; LINUX-X64-LABEL: test14b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test14b: +; LINUX-KERNEL-X64-LABEL: test14b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test14b: +; DARWIN-X64-LABEL: test14b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1652,19 +1652,19 @@ entry: ; Requires protector. define void @test14c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test14c: +; LINUX-I386-LABEL: test14c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test14c: +; LINUX-X64-LABEL: test14c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test14c: +; LINUX-KERNEL-X64-LABEL: test14c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test14c: +; DARWIN-X64-LABEL: test14c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1678,19 +1678,19 @@ entry: ; Requires protector. define void @test14d() nounwind uwtable sspreq { entry: -; LINUX-I386: test14d: +; LINUX-I386-LABEL: test14d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test14d: +; LINUX-X64-LABEL: test14d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test14d: +; LINUX-KERNEL-X64-LABEL: test14d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test14d: +; DARWIN-X64-LABEL: test14d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1705,19 +1705,19 @@ entry: ; Requires no protector. define void @test15a() nounwind uwtable { entry: -; LINUX-I386: test15a: +; LINUX-I386-LABEL: test15a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test15a: +; LINUX-X64-LABEL: test15a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test15a: +; LINUX-KERNEL-X64-LABEL: test15a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test15a: +; DARWIN-X64-LABEL: test15a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1736,19 +1736,19 @@ entry: ; Requires no protector. define void @test15b() nounwind uwtable ssp { entry: -; LINUX-I386: test15b: +; LINUX-I386-LABEL: test15b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test15b: +; LINUX-X64-LABEL: test15b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test15b: +; LINUX-KERNEL-X64-LABEL: test15b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test15b: +; DARWIN-X64-LABEL: test15b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1767,19 +1767,19 @@ entry: ; Requires protector. define void @test15c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test15c: +; LINUX-I386-LABEL: test15c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test15c: +; LINUX-X64-LABEL: test15c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test15c: +; LINUX-KERNEL-X64-LABEL: test15c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test15c: +; DARWIN-X64-LABEL: test15c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1798,19 +1798,19 @@ entry: ; Requires protector. define void @test15d() nounwind uwtable sspreq { entry: -; LINUX-I386: test15d: +; LINUX-I386-LABEL: test15d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test15d: +; LINUX-X64-LABEL: test15d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test15d: +; LINUX-KERNEL-X64-LABEL: test15d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test15d: +; DARWIN-X64-LABEL: test15d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1829,19 +1829,19 @@ entry: ; Requires no protector. define void @test16a() nounwind uwtable { entry: -; LINUX-I386: test16a: +; LINUX-I386-LABEL: test16a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test16a: +; LINUX-X64-LABEL: test16a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test16a: +; LINUX-KERNEL-X64-LABEL: test16a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test16a: +; DARWIN-X64-LABEL: test16a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1857,19 +1857,19 @@ entry: ; Requires no protector. define void @test16b() nounwind uwtable ssp { entry: -; LINUX-I386: test16b: +; LINUX-I386-LABEL: test16b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test16b: +; LINUX-X64-LABEL: test16b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test16b: +; LINUX-KERNEL-X64-LABEL: test16b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test16b: +; DARWIN-X64-LABEL: test16b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -1885,19 +1885,19 @@ entry: ; Requires protector. define void @test16c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test16c: +; LINUX-I386-LABEL: test16c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test16c: +; LINUX-X64-LABEL: test16c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test16c: +; LINUX-KERNEL-X64-LABEL: test16c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test16c: +; DARWIN-X64-LABEL: test16c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1913,19 +1913,19 @@ entry: ; Requires protector. define void @test16d() nounwind uwtable sspreq { entry: -; LINUX-I386: test16d: +; LINUX-I386-LABEL: test16d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test16d: +; LINUX-X64-LABEL: test16d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test16d: +; LINUX-KERNEL-X64-LABEL: test16d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test16d: +; DARWIN-X64-LABEL: test16d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -1940,19 +1940,19 @@ entry: ; Requires no protector. define void @test17a() nounwind uwtable { entry: -; LINUX-I386: test17a: +; LINUX-I386-LABEL: test17a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test17a: +; LINUX-X64-LABEL: test17a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test17a: +; LINUX-KERNEL-X64-LABEL: test17a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test17a: +; DARWIN-X64-LABEL: test17a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.vec, align 16 @@ -1967,19 +1967,19 @@ entry: ; Requires no protector. define void @test17b() nounwind uwtable ssp { entry: -; LINUX-I386: test17b: +; LINUX-I386-LABEL: test17b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test17b: +; LINUX-X64-LABEL: test17b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test17b: +; LINUX-KERNEL-X64-LABEL: test17b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test17b: +; DARWIN-X64-LABEL: test17b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.vec, align 16 @@ -1994,19 +1994,19 @@ entry: ; Requires protector. define void @test17c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test17c: +; LINUX-I386-LABEL: test17c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test17c: +; LINUX-X64-LABEL: test17c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test17c: +; LINUX-KERNEL-X64-LABEL: test17c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test17c: +; DARWIN-X64-LABEL: test17c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.vec, align 16 @@ -2021,19 +2021,19 @@ entry: ; Requires protector. define void @test17d() nounwind uwtable sspreq { entry: -; LINUX-I386: test17d: +; LINUX-I386-LABEL: test17d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test17d: +; LINUX-X64-LABEL: test17d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test17d: +; LINUX-KERNEL-X64-LABEL: test17d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test17d: +; DARWIN-X64-LABEL: test17d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.vec, align 16 @@ -2048,19 +2048,19 @@ entry: ; Requires no protector. define i32 @test18a() uwtable { entry: -; LINUX-I386: test18a: +; LINUX-I386-LABEL: test18a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test18a: +; LINUX-X64-LABEL: test18a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test18a: +; LINUX-KERNEL-X64-LABEL: test18a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test18a: +; DARWIN-X64-LABEL: test18a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -2084,19 +2084,19 @@ lpad: ; Requires no protector. define i32 @test18b() uwtable ssp { entry: -; LINUX-I386: test18b: +; LINUX-I386-LABEL: test18b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test18b: +; LINUX-X64-LABEL: test18b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test18b: +; LINUX-KERNEL-X64-LABEL: test18b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test18b: +; DARWIN-X64-LABEL: test18b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32, align 4 @@ -2120,19 +2120,19 @@ lpad: ; Requires protector. define i32 @test18c() uwtable sspstrong { entry: -; LINUX-I386: test18c: +; LINUX-I386-LABEL: test18c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test18c: +; LINUX-X64-LABEL: test18c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test18c: +; LINUX-KERNEL-X64-LABEL: test18c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test18c: +; DARWIN-X64-LABEL: test18c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -2156,19 +2156,19 @@ lpad: ; Requires protector. define i32 @test18d() uwtable sspreq { entry: -; LINUX-I386: test18d: +; LINUX-I386-LABEL: test18d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test18d: +; LINUX-X64-LABEL: test18d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test18d: +; LINUX-KERNEL-X64-LABEL: test18d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test18d: +; DARWIN-X64-LABEL: test18d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32, align 4 @@ -2193,19 +2193,19 @@ lpad: ; Requires no protector. define i32 @test19a() uwtable { entry: -; LINUX-I386: test19a: +; LINUX-I386-LABEL: test19a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test19a: +; LINUX-X64-LABEL: test19a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test19a: +; LINUX-KERNEL-X64-LABEL: test19a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test19a: +; DARWIN-X64-LABEL: test19a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -2232,19 +2232,19 @@ lpad: ; Requires no protector. define i32 @test19b() uwtable ssp { entry: -; LINUX-I386: test19b: +; LINUX-I386-LABEL: test19b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test19b: +; LINUX-X64-LABEL: test19b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test19b: +; LINUX-KERNEL-X64-LABEL: test19b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test19b: +; DARWIN-X64-LABEL: test19b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.pair, align 4 @@ -2271,19 +2271,19 @@ lpad: ; Requires protector. define i32 @test19c() uwtable sspstrong { entry: -; LINUX-I386: test19c: +; LINUX-I386-LABEL: test19c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test19c: +; LINUX-X64-LABEL: test19c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test19c: +; LINUX-KERNEL-X64-LABEL: test19c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test19c: +; DARWIN-X64-LABEL: test19c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -2310,19 +2310,19 @@ lpad: ; Requires protector. define i32 @test19d() uwtable sspreq { entry: -; LINUX-I386: test19d: +; LINUX-I386-LABEL: test19d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test19d: +; LINUX-X64-LABEL: test19d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test19d: +; LINUX-KERNEL-X64-LABEL: test19d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test19d: +; DARWIN-X64-LABEL: test19d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %c = alloca %struct.pair, align 4 @@ -2348,19 +2348,19 @@ lpad: ; Requires no protector. define void @test20a() nounwind uwtable { entry: -; LINUX-I386: test20a: +; LINUX-I386-LABEL: test20a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test20a: +; LINUX-X64-LABEL: test20a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test20a: +; LINUX-KERNEL-X64-LABEL: test20a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test20a: +; DARWIN-X64-LABEL: test20a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32*, align 8 @@ -2378,19 +2378,19 @@ entry: ; Requires no protector. define void @test20b() nounwind uwtable ssp { entry: -; LINUX-I386: test20b: +; LINUX-I386-LABEL: test20b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test20b: +; LINUX-X64-LABEL: test20b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test20b: +; LINUX-KERNEL-X64-LABEL: test20b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test20b: +; DARWIN-X64-LABEL: test20b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32*, align 8 @@ -2408,19 +2408,19 @@ entry: ; Requires protector. define void @test20c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test20c: +; LINUX-I386-LABEL: test20c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test20c: +; LINUX-X64-LABEL: test20c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test20c: +; LINUX-KERNEL-X64-LABEL: test20c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test20c: +; DARWIN-X64-LABEL: test20c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32*, align 8 @@ -2438,19 +2438,19 @@ entry: ; Requires protector. define void @test20d() nounwind uwtable sspreq { entry: -; LINUX-I386: test20d: +; LINUX-I386-LABEL: test20d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test20d: +; LINUX-X64-LABEL: test20d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test20d: +; LINUX-KERNEL-X64-LABEL: test20d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test20d: +; DARWIN-X64-LABEL: test20d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32*, align 8 @@ -2468,19 +2468,19 @@ entry: ; Requires no protector. define void @test21a() nounwind uwtable { entry: -; LINUX-I386: test21a: +; LINUX-I386-LABEL: test21a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test21a: +; LINUX-X64-LABEL: test21a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test21a: +; LINUX-KERNEL-X64-LABEL: test21a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test21a: +; DARWIN-X64-LABEL: test21a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32*, align 8 @@ -2499,19 +2499,19 @@ entry: ; Requires no protector. define void @test21b() nounwind uwtable ssp { entry: -; LINUX-I386: test21b: +; LINUX-I386-LABEL: test21b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test21b: +; LINUX-X64-LABEL: test21b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test21b: +; LINUX-KERNEL-X64-LABEL: test21b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test21b: +; DARWIN-X64-LABEL: test21b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca i32*, align 8 @@ -2530,19 +2530,19 @@ entry: ; Requires protector. define void @test21c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test21c: +; LINUX-I386-LABEL: test21c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test21c: +; LINUX-X64-LABEL: test21c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test21c: +; LINUX-KERNEL-X64-LABEL: test21c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test21c: +; DARWIN-X64-LABEL: test21c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32*, align 8 @@ -2561,19 +2561,19 @@ entry: ; Requires protector. define void @test21d() nounwind uwtable sspreq { entry: -; LINUX-I386: test21d: +; LINUX-I386-LABEL: test21d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test21d: +; LINUX-X64-LABEL: test21d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test21d: +; LINUX-KERNEL-X64-LABEL: test21d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test21d: +; DARWIN-X64-LABEL: test21d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca i32*, align 8 @@ -2592,19 +2592,19 @@ entry: ; Requires no protector. define signext i8 @test22a() nounwind uwtable { entry: -; LINUX-I386: test22a: +; LINUX-I386-LABEL: test22a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test22a: +; LINUX-X64-LABEL: test22a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test22a: +; LINUX-KERNEL-X64-LABEL: test22a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test22a: +; DARWIN-X64-LABEL: test22a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca %class.A, align 1 @@ -2619,19 +2619,19 @@ entry: ; Requires no protector. define signext i8 @test22b() nounwind uwtable ssp { entry: -; LINUX-I386: test22b: +; LINUX-I386-LABEL: test22b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test22b: +; LINUX-X64-LABEL: test22b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test22b: +; LINUX-KERNEL-X64-LABEL: test22b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test22b: +; DARWIN-X64-LABEL: test22b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca %class.A, align 1 @@ -2646,19 +2646,19 @@ entry: ; Requires protector. define signext i8 @test22c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test22c: +; LINUX-I386-LABEL: test22c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test22c: +; LINUX-X64-LABEL: test22c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test22c: +; LINUX-KERNEL-X64-LABEL: test22c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test22c: +; DARWIN-X64-LABEL: test22c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca %class.A, align 1 @@ -2673,19 +2673,19 @@ entry: ; Requires protector. define signext i8 @test22d() nounwind uwtable sspreq { entry: -; LINUX-I386: test22d: +; LINUX-I386-LABEL: test22d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test22d: +; LINUX-X64-LABEL: test22d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test22d: +; LINUX-KERNEL-X64-LABEL: test22d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test22d: +; DARWIN-X64-LABEL: test22d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca %class.A, align 1 @@ -2700,19 +2700,19 @@ entry: ; Requires no protector. define signext i8 @test23a() nounwind uwtable { entry: -; LINUX-I386: test23a: +; LINUX-I386-LABEL: test23a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test23a: +; LINUX-X64-LABEL: test23a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test23a: +; LINUX-KERNEL-X64-LABEL: test23a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test23a: +; DARWIN-X64-LABEL: test23a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca %struct.deep, align 1 @@ -2731,19 +2731,19 @@ entry: ; Requires no protector. define signext i8 @test23b() nounwind uwtable ssp { entry: -; LINUX-I386: test23b: +; LINUX-I386-LABEL: test23b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test23b: +; LINUX-X64-LABEL: test23b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test23b: +; LINUX-KERNEL-X64-LABEL: test23b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test23b: +; DARWIN-X64-LABEL: test23b: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %x = alloca %struct.deep, align 1 @@ -2762,19 +2762,19 @@ entry: ; Requires protector. define signext i8 @test23c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test23c: +; LINUX-I386-LABEL: test23c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test23c: +; LINUX-X64-LABEL: test23c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test23c: +; LINUX-KERNEL-X64-LABEL: test23c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test23c: +; DARWIN-X64-LABEL: test23c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca %struct.deep, align 1 @@ -2793,19 +2793,19 @@ entry: ; Requires protector. define signext i8 @test23d() nounwind uwtable sspreq { entry: -; LINUX-I386: test23d: +; LINUX-I386-LABEL: test23d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test23d: +; LINUX-X64-LABEL: test23d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test23d: +; LINUX-KERNEL-X64-LABEL: test23d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test23d: +; DARWIN-X64-LABEL: test23d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %x = alloca %struct.deep, align 1 @@ -2824,19 +2824,19 @@ entry: ; Requires no protector. define void @test24a(i32 %n) nounwind uwtable { entry: -; LINUX-I386: test24a: +; LINUX-I386-LABEL: test24a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test24a: +; LINUX-X64-LABEL: test24a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test24a: +; LINUX-KERNEL-X64-LABEL: test24a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test24a: +; DARWIN-X64-LABEL: test24a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %n.addr = alloca i32, align 4 @@ -2855,19 +2855,19 @@ entry: ; Requires protector. define void @test24b(i32 %n) nounwind uwtable ssp { entry: -; LINUX-I386: test24b: +; LINUX-I386-LABEL: test24b: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test24b: +; LINUX-X64-LABEL: test24b: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test24b: +; LINUX-KERNEL-X64-LABEL: test24b: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test24b: +; DARWIN-X64-LABEL: test24b: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %n.addr = alloca i32, align 4 @@ -2886,19 +2886,19 @@ entry: ; Requires protector. define void @test24c(i32 %n) nounwind uwtable sspstrong { entry: -; LINUX-I386: test24c: +; LINUX-I386-LABEL: test24c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test24c: +; LINUX-X64-LABEL: test24c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test24c: +; LINUX-KERNEL-X64-LABEL: test24c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test24c: +; DARWIN-X64-LABEL: test24c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %n.addr = alloca i32, align 4 @@ -2917,19 +2917,19 @@ entry: ; Requires protector. define void @test24d(i32 %n) nounwind uwtable sspreq { entry: -; LINUX-I386: test24d: +; LINUX-I386-LABEL: test24d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test24d: +; LINUX-X64-LABEL: test24d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test24d: +; LINUX-KERNEL-X64-LABEL: test24d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test24d: +; DARWIN-X64-LABEL: test24d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %n.addr = alloca i32, align 4 @@ -2948,19 +2948,19 @@ entry: ; Requires no protector. define i32 @test25a() nounwind uwtable { entry: -; LINUX-I386: test25a: +; LINUX-I386-LABEL: test25a: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test25a: +; LINUX-X64-LABEL: test25a: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test25a: +; LINUX-KERNEL-X64-LABEL: test25a: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test25a: +; DARWIN-X64-LABEL: test25a: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %a = alloca [4 x i32], align 16 @@ -2974,19 +2974,19 @@ entry: ; Requires no protector, except for Darwin which _does_ require a protector. define i32 @test25b() nounwind uwtable ssp { entry: -; LINUX-I386: test25b: +; LINUX-I386-LABEL: test25b: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test25b: +; LINUX-X64-LABEL: test25b: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test25b: +; LINUX-KERNEL-X64-LABEL: test25b: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test25b: +; DARWIN-X64-LABEL: test25b: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca [4 x i32], align 16 @@ -3000,19 +3000,19 @@ entry: ; Requires protector. define i32 @test25c() nounwind uwtable sspstrong { entry: -; LINUX-I386: test25c: +; LINUX-I386-LABEL: test25c: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test25c: +; LINUX-X64-LABEL: test25c: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test25c: +; LINUX-KERNEL-X64-LABEL: test25c: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test25c: +; DARWIN-X64-LABEL: test25c: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca [4 x i32], align 16 @@ -3026,19 +3026,19 @@ entry: ; Requires protector. define i32 @test25d() nounwind uwtable sspreq { entry: -; LINUX-I386: test25d: +; LINUX-I386-LABEL: test25d: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test25d: +; LINUX-X64-LABEL: test25d: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test25d: +; LINUX-KERNEL-X64-LABEL: test25d: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test25d: +; DARWIN-X64-LABEL: test25d: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %a = alloca [4 x i32], align 16 @@ -3054,19 +3054,19 @@ entry: ; Requires no protector. define void @test26() nounwind uwtable sspstrong { entry: -; LINUX-I386: test26: +; LINUX-I386-LABEL: test26: ; LINUX-I386-NOT: calll __stack_chk_fail ; LINUX-I386: .cfi_endproc -; LINUX-X64: test26: +; LINUX-X64-LABEL: test26: ; LINUX-X64-NOT: callq __stack_chk_fail ; LINUX-X64: .cfi_endproc -; LINUX-KERNEL-X64: test26: +; LINUX-KERNEL-X64-LABEL: test26: ; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail ; LINUX-KERNEL-X64: .cfi_endproc -; DARWIN-X64: test26: +; DARWIN-X64-LABEL: test26: ; DARWIN-X64-NOT: callq ___stack_chk_fail ; DARWIN-X64: .cfi_endproc %c = alloca %struct.nest, align 4 @@ -3085,19 +3085,19 @@ entry: ; Requires protector. define i32 @test27(i32 %arg) nounwind uwtable sspstrong { bb: -; LINUX-I386: test27: +; LINUX-I386-LABEL: test27: ; LINUX-I386: mov{{l|q}} %gs: ; LINUX-I386: calll __stack_chk_fail -; LINUX-X64: test27: +; LINUX-X64-LABEL: test27: ; LINUX-X64: mov{{l|q}} %fs: ; LINUX-X64: callq __stack_chk_fail -; LINUX-KERNEL-X64: test27: +; LINUX-KERNEL-X64-LABEL: test27: ; LINUX-KERNEL-X64: mov{{l|q}} %gs: ; LINUX-KERNEL-X64: callq __stack_chk_fail -; DARWIN-X64: test27: +; DARWIN-X64-LABEL: test27: ; DARWIN-X64: mov{{l|q}} ___stack_chk_guard ; DARWIN-X64: callq ___stack_chk_fail %tmp = alloca %struct.small*, align 8 diff --git a/test/CodeGen/X86/stdcall-notailcall.ll b/test/CodeGen/X86/stdcall-notailcall.ll index 8e33c30..8f522cd 100644 --- a/test/CodeGen/X86/stdcall-notailcall.ll +++ b/test/CodeGen/X86/stdcall-notailcall.ll @@ -2,7 +2,7 @@ %struct.I = type { i32 (...)** } define x86_stdcallcc void @bar(%struct.I* nocapture %this) ssp align 2 { -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK-NOT: jmp ; CHECK: ret $4 entry: diff --git a/test/CodeGen/X86/store_op_load_fold.ll b/test/CodeGen/X86/store_op_load_fold.ll index 41b0a9c..bbeb744 100644 --- a/test/CodeGen/X86/store_op_load_fold.ll +++ b/test/CodeGen/X86/store_op_load_fold.ll @@ -5,7 +5,7 @@ @X = internal global i16 0 ; <i16*> [#uses=2] define void @foo() nounwind { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK-NOT: mov ; CHECK: add ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/sub-with-overflow.ll b/test/CodeGen/X86/sub-with-overflow.ll index db8313c..baaee35 100644 --- a/test/CodeGen/X86/sub-with-overflow.ll +++ b/test/CodeGen/X86/sub-with-overflow.ll @@ -18,7 +18,7 @@ overflow: %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind ret i1 false -; CHECK: func1: +; CHECK-LABEL: func1: ; CHECK: subl 20(%esp) ; CHECK-NEXT: jno } @@ -38,7 +38,7 @@ carry: %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind ret i1 false -; CHECK: func2: +; CHECK-LABEL: func2: ; CHECK: subl 20(%esp) ; CHECK-NEXT: jae } @@ -53,7 +53,7 @@ entry: %obit = extractvalue {i32, i1} %t, 1 ret i1 %obit -; CHECK: func3: +; CHECK-LABEL: func3: ; CHECK: decl ; CHECK-NEXT: seto } diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index 75a728c..73d93ff 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -13,7 +13,7 @@ declare i1 @qux() ; BranchFolding should tail-merge the stores since they all precede ; direct branches to the same place. -; CHECK: tail_merge_me: +; CHECK-LABEL: tail_merge_me: ; CHECK-NOT: GHJK ; CHECK: movl $0, GHJK(%rip) ; CHECK-NEXT: movl $1, HABC(%rip) @@ -60,7 +60,7 @@ declare i8* @choose(i8*, i8*) ; BranchFolding should tail-duplicate the indirect jump to avoid ; redundant branching. -; CHECK: tail_duplicate_me: +; CHECK-LABEL: tail_duplicate_me: ; CHECK: movl $0, GHJK(%rip) ; CHECK-NEXT: jmpq *%r ; CHECK: movl $0, GHJK(%rip) @@ -107,7 +107,7 @@ altret: ; BranchFolding shouldn't try to merge the tails of two blocks ; with only a branch in common, regardless of the fallthrough situation. -; CHECK: dont_merge_oddly: +; CHECK-LABEL: dont_merge_oddly: ; CHECK-NOT: ret ; CHECK: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} ; CHECK-NEXT: jbe .LBB2_3 @@ -153,7 +153,7 @@ bb30: ; Do any-size tail-merging when two candidate blocks will both require ; an unconditional jump to complete a two-way conditional branch. -; CHECK: c_expand_expr_stmt: +; CHECK-LABEL: c_expand_expr_stmt: ; ; This test only works when register allocation happens to use %rax for both ; load addresses. @@ -275,7 +275,7 @@ declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind ; instructions are involved. This function should have only ; one ret instruction. -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: callq func ; CHECK-NEXT: .LBB4_2: ; CHECK-NEXT: popq @@ -298,7 +298,7 @@ declare void @func() ; one - One instruction may be tail-duplicated even with optsize. -; CHECK: one: +; CHECK-LABEL: one: ; CHECK: movl $0, XYZ(%rip) ; CHECK: movl $0, XYZ(%rip) @@ -335,7 +335,7 @@ return: ; tail instead of one. This is too much to be merged, given ; the optsize attribute. -; CHECK: two: +; CHECK-LABEL: two: ; CHECK-NOT: XYZ ; CHECK: ret ; CHECK: movl $0, XYZ(%rip) @@ -374,7 +374,7 @@ return: ; two_nosize - Same as two, but without the optsize attribute. ; Now two instructions are enough to be tail-duplicated. -; CHECK: two_nosize: +; CHECK-LABEL: two_nosize: ; CHECK: movl $0, XYZ(%rip) ; CHECK: movl $1, XYZ(%rip) ; CHECK: movl $0, XYZ(%rip) @@ -412,7 +412,7 @@ return: ; Tail-merging should merge the two ret instructions since one side ; can fall-through into the ret and the other side has to branch anyway. -; CHECK: TESTE: +; CHECK-LABEL: TESTE: ; CHECK: ret ; CHECK-NOT: ret ; CHECK: size TESTE diff --git a/test/CodeGen/X86/tailcall-cgp-dup.ll b/test/CodeGen/X86/tailcall-cgp-dup.ll index a80b90f..a51bc88 100644 --- a/test/CodeGen/X86/tailcall-cgp-dup.ll +++ b/test/CodeGen/X86/tailcall-cgp-dup.ll @@ -4,7 +4,7 @@ ; rdar://9147433 define i32 @foo(i32 %x) nounwind ssp { -; CHECK: foo: +; CHECK-LABEL: foo: entry: switch i32 %x, label %return [ i32 1, label %sw.bb @@ -69,7 +69,7 @@ declare i8* @bar(i8*) uwtable optsize noinline ssp define hidden %0* @thingWithValue(i8* %self) uwtable ssp { entry: -; CHECK: thingWithValue: +; CHECK-LABEL: thingWithValue: ; CHECK: jmp _bar br i1 undef, label %if.then.i, label %if.else.i diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll index 7621602..75a6d87 100644 --- a/test/CodeGen/X86/tailcallbyval64.ll +++ b/test/CodeGen/X86/tailcallbyval64.ll @@ -3,7 +3,7 @@ ; FIXME: Win64 does not support byval. ; Expect the entry point. -; CHECK: tailcaller: +; CHECK-LABEL: tailcaller: ; Expect 2 rep;movs because of tail call byval lowering. ; CHECK: rep; diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll index 04c4e95..9ef0d27 100644 --- a/test/CodeGen/X86/tailcallfp2.ll +++ b/test/CodeGen/X86/tailcallfp2.ll @@ -3,7 +3,7 @@ declare i32 @putchar(i32) define fastcc i32 @checktail(i32 %x, i32* %f, i32 %g) nounwind { -; CHECK: checktail: +; CHECK-LABEL: checktail: %tmp1 = icmp sgt i32 %x, 0 br i1 %tmp1, label %if-then, label %if-else diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll index 5bc28ec..c9b76c8 100644 --- a/test/CodeGen/X86/test-shrink.ll +++ b/test/CodeGen/X86/test-shrink.ll @@ -2,10 +2,10 @@ ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64 ; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 -; CHECK-64: g64xh: +; CHECK-64-LABEL: g64xh: ; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret -; CHECK-32: g64xh: +; CHECK-32-LABEL: g64xh: ; CHECK-32: testb $8, %ah ; CHECK-32: ret define void @g64xh(i64 inreg %x) nounwind { @@ -19,10 +19,10 @@ yes: no: ret void } -; CHECK-64: g64xl: +; CHECK-64-LABEL: g64xl: ; CHECK-64: testb $8, [[A0L:%dil|%cl]] ; CHECK-64: ret -; CHECK-32: g64xl: +; CHECK-32-LABEL: g64xl: ; CHECK-32: testb $8, %al ; CHECK-32: ret define void @g64xl(i64 inreg %x) nounwind { @@ -36,10 +36,10 @@ yes: no: ret void } -; CHECK-64: g32xh: +; CHECK-64-LABEL: g32xh: ; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret -; CHECK-32: g32xh: +; CHECK-32-LABEL: g32xh: ; CHECK-32: testb $8, %ah ; CHECK-32: ret define void @g32xh(i32 inreg %x) nounwind { @@ -53,10 +53,10 @@ yes: no: ret void } -; CHECK-64: g32xl: +; CHECK-64-LABEL: g32xl: ; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret -; CHECK-32: g32xl: +; CHECK-32-LABEL: g32xl: ; CHECK-32: testb $8, %al ; CHECK-32: ret define void @g32xl(i32 inreg %x) nounwind { @@ -70,10 +70,10 @@ yes: no: ret void } -; CHECK-64: g16xh: +; CHECK-64-LABEL: g16xh: ; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret -; CHECK-32: g16xh: +; CHECK-32-LABEL: g16xh: ; CHECK-32: testb $8, %ah ; CHECK-32: ret define void @g16xh(i16 inreg %x) nounwind { @@ -87,10 +87,10 @@ yes: no: ret void } -; CHECK-64: g16xl: +; CHECK-64-LABEL: g16xl: ; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret -; CHECK-32: g16xl: +; CHECK-32-LABEL: g16xl: ; CHECK-32: testb $8, %al ; CHECK-32: ret define void @g16xl(i16 inreg %x) nounwind { @@ -104,10 +104,10 @@ yes: no: ret void } -; CHECK-64: g64x16: +; CHECK-64-LABEL: g64x16: ; CHECK-64: testw $-32640, %[[A0W:di|cx]] ; CHECK-64: ret -; CHECK-32: g64x16: +; CHECK-32-LABEL: g64x16: ; CHECK-32: testw $-32640, %ax ; CHECK-32: ret define void @g64x16(i64 inreg %x) nounwind { @@ -121,10 +121,10 @@ yes: no: ret void } -; CHECK-64: g32x16: +; CHECK-64-LABEL: g32x16: ; CHECK-64: testw $-32640, %[[A0W]] ; CHECK-64: ret -; CHECK-32: g32x16: +; CHECK-32-LABEL: g32x16: ; CHECK-32: testw $-32640, %ax ; CHECK-32: ret define void @g32x16(i32 inreg %x) nounwind { @@ -138,10 +138,10 @@ yes: no: ret void } -; CHECK-64: g64x32: +; CHECK-64-LABEL: g64x32: ; CHECK-64: testl $268468352, %e[[A0W]] ; CHECK-64: ret -; CHECK-32: g64x32: +; CHECK-32-LABEL: g64x32: ; CHECK-32: testl $268468352, %eax ; CHECK-32: ret define void @g64x32(i64 inreg %x) nounwind { diff --git a/test/CodeGen/X86/tls-local-dynamic.ll b/test/CodeGen/X86/tls-local-dynamic.ll index c5fd16b..4841e52 100644 --- a/test/CodeGen/X86/tls-local-dynamic.ll +++ b/test/CodeGen/X86/tls-local-dynamic.ll @@ -10,7 +10,7 @@ entry: ret i32* @x ; FIXME: This function uses a single thread-local variable, ; so we might want to fall back to general-dynamic here. -; CHECK: get_x: +; CHECK-LABEL: get_x: ; CHECK: leaq x@TLSLD(%rip), %rdi ; CHECK-NEXT: callq __tls_get_addr@PLT ; CHECK: x@DTPOFF @@ -26,7 +26,7 @@ entry: %cmp = icmp eq i32 %i, 1 br i1 %cmp, label %return, label %if.else ; This bb does not access TLS, so should not call __tls_get_addr. -; CHECK: f: +; CHECK-LABEL: f: ; CHECK-NOT: __tls_get_addr ; CHECK: je diff --git a/test/CodeGen/X86/tls-models.ll b/test/CodeGen/X86/tls-models.ll index 7c527e2..8e3e958 100644 --- a/test/CodeGen/X86/tls-models.ll +++ b/test/CodeGen/X86/tls-models.ll @@ -25,15 +25,15 @@ entry: ret i32* @external_gd ; Non-PIC code can use initial-exec, PIC code has to use general dynamic. - ; X64: f1: + ; X64-LABEL: f1: ; X64: external_gd@GOTTPOFF - ; X32: f1: + ; X32-LABEL: f1: ; X32: external_gd@INDNTPOFF - ; X64_PIC: f1: + ; X64_PIC-LABEL: f1: ; X64_PIC: external_gd@TLSGD - ; X32_PIC: f1: + ; X32_PIC-LABEL: f1: ; X32_PIC: external_gd@TLSGD - ; DARWIN: f1: + ; DARWIN-LABEL: f1: ; DARWIN: _external_gd@TLVP } @@ -42,15 +42,15 @@ entry: ret i32* @internal_gd ; Non-PIC code can use local exec, PIC code can use local dynamic. - ; X64: f2: + ; X64-LABEL: f2: ; X64: internal_gd@TPOFF - ; X32: f2: + ; X32-LABEL: f2: ; X32: internal_gd@NTPOFF - ; X64_PIC: f2: + ; X64_PIC-LABEL: f2: ; X64_PIC: internal_gd@TLSLD - ; X32_PIC: f2: + ; X32_PIC-LABEL: f2: ; X32_PIC: internal_gd@TLSLDM - ; DARWIN: f2: + ; DARWIN-LABEL: f2: ; DARWIN: _internal_gd@TLVP } @@ -62,15 +62,15 @@ entry: ret i32* @external_ld ; Non-PIC code can use initial exec, PIC code use local dynamic as specified. - ; X64: f3: + ; X64-LABEL: f3: ; X64: external_ld@GOTTPOFF - ; X32: f3: + ; X32-LABEL: f3: ; X32: external_ld@INDNTPOFF - ; X64_PIC: f3: + ; X64_PIC-LABEL: f3: ; X64_PIC: external_ld@TLSLD - ; X32_PIC: f3: + ; X32_PIC-LABEL: f3: ; X32_PIC: external_ld@TLSLDM - ; DARWIN: f3: + ; DARWIN-LABEL: f3: ; DARWIN: _external_ld@TLVP } @@ -79,15 +79,15 @@ entry: ret i32* @internal_ld ; Non-PIC code can use local exec, PIC code can use local dynamic. - ; X64: f4: + ; X64-LABEL: f4: ; X64: internal_ld@TPOFF - ; X32: f4: + ; X32-LABEL: f4: ; X32: internal_ld@NTPOFF - ; X64_PIC: f4: + ; X64_PIC-LABEL: f4: ; X64_PIC: internal_ld@TLSLD - ; X32_PIC: f4: + ; X32_PIC-LABEL: f4: ; X32_PIC: internal_ld@TLSLDM - ; DARWIN: f4: + ; DARWIN-LABEL: f4: ; DARWIN: _internal_ld@TLVP } @@ -99,15 +99,15 @@ entry: ret i32* @external_ie ; Non-PIC and PIC code will use initial exec as specified. - ; X64: f5: + ; X64-LABEL: f5: ; X64: external_ie@GOTTPOFF - ; X32: f5: + ; X32-LABEL: f5: ; X32: external_ie@INDNTPOFF - ; X64_PIC: f5: + ; X64_PIC-LABEL: f5: ; X64_PIC: external_ie@GOTTPOFF - ; X32_PIC: f5: + ; X32_PIC-LABEL: f5: ; X32_PIC: external_ie@GOTNTPOFF - ; DARWIN: f5: + ; DARWIN-LABEL: f5: ; DARWIN: _external_ie@TLVP } @@ -116,15 +116,15 @@ entry: ret i32* @internal_ie ; Non-PIC code can use local exec, PIC code use initial exec as specified. - ; X64: f6: + ; X64-LABEL: f6: ; X64: internal_ie@TPOFF - ; X32: f6: + ; X32-LABEL: f6: ; X32: internal_ie@NTPOFF - ; X64_PIC: f6: + ; X64_PIC-LABEL: f6: ; X64_PIC: internal_ie@GOTTPOFF - ; X32_PIC: f6: + ; X32_PIC-LABEL: f6: ; X32_PIC: internal_ie@GOTNTPOFF - ; DARWIN: f6: + ; DARWIN-LABEL: f6: ; DARWIN: _internal_ie@TLVP } @@ -136,15 +136,15 @@ entry: ret i32* @external_le ; Non-PIC and PIC code will use local exec as specified. - ; X64: f7: + ; X64-LABEL: f7: ; X64: external_le@TPOFF - ; X32: f7: + ; X32-LABEL: f7: ; X32: external_le@NTPOFF - ; X64_PIC: f7: + ; X64_PIC-LABEL: f7: ; X64_PIC: external_le@TPOFF - ; X32_PIC: f7: + ; X32_PIC-LABEL: f7: ; X32_PIC: external_le@NTPOFF - ; DARWIN: f7: + ; DARWIN-LABEL: f7: ; DARWIN: _external_le@TLVP } @@ -153,14 +153,14 @@ entry: ret i32* @internal_le ; Non-PIC and PIC code will use local exec as specified. - ; X64: f8: + ; X64-LABEL: f8: ; X64: internal_le@TPOFF - ; X32: f8: + ; X32-LABEL: f8: ; X32: internal_le@NTPOFF - ; X64_PIC: f8: + ; X64_PIC-LABEL: f8: ; X64_PIC: internal_le@TPOFF - ; X32_PIC: f8: + ; X32_PIC-LABEL: f8: ; X32_PIC: internal_le@NTPOFF - ; DARWIN: f8: + ; DARWIN-LABEL: f8: ; DARWIN: _internal_le@TLVP } diff --git a/test/CodeGen/X86/tls-pic.ll b/test/CodeGen/X86/tls-pic.ll index b823f0a..0c79da6 100644 --- a/test/CodeGen/X86/tls-pic.ll +++ b/test/CodeGen/X86/tls-pic.ll @@ -11,11 +11,11 @@ entry: ret i32 %tmp1 } -; X32: f1: +; X32-LABEL: f1: ; X32: leal i@TLSGD(,%ebx), %eax ; X32: calll ___tls_get_addr@PLT -; X64: f1: +; X64-LABEL: f1: ; X64: leaq i@TLSGD(%rip), %rdi ; X64: callq __tls_get_addr@PLT @@ -27,11 +27,11 @@ entry: ret i32* @i } -; X32: f2: +; X32-LABEL: f2: ; X32: leal i@TLSGD(,%ebx), %eax ; X32: calll ___tls_get_addr@PLT -; X64: f2: +; X64-LABEL: f2: ; X64: leaq i@TLSGD(%rip), %rdi ; X64: callq __tls_get_addr@PLT @@ -43,11 +43,11 @@ entry: ret i32 %tmp1 } -; X32: f3: +; X32-LABEL: f3: ; X32: leal i@TLSGD(,%ebx), %eax ; X32: calll ___tls_get_addr@PLT -; X64: f3: +; X64-LABEL: f3: ; X64: leaq i@TLSGD(%rip), %rdi ; X64: callq __tls_get_addr@PLT @@ -57,11 +57,11 @@ entry: ret i32* @i } -; X32: f4: +; X32-LABEL: f4: ; X32: leal i@TLSGD(,%ebx), %eax ; X32: calll ___tls_get_addr@PLT -; X64: f4: +; X64-LABEL: f4: ; X64: leaq i@TLSGD(%rip), %rdi ; X64: callq __tls_get_addr@PLT @@ -74,13 +74,13 @@ entry: ret i32 %add } -; X32: f5: +; X32-LABEL: f5: ; X32: leal {{[jk]}}@TLSLDM(%ebx) ; X32: calll ___tls_get_addr@PLT ; X32: movl {{[jk]}}@DTPOFF(%e ; X32: addl {{[jk]}}@DTPOFF(%e -; X64: f5: +; X64-LABEL: f5: ; X64: leaq {{[jk]}}@TLSLD(%rip), %rdi ; X64: callq __tls_get_addr@PLT ; X64: movl {{[jk]}}@DTPOFF(%r diff --git a/test/CodeGen/X86/tls-pie.ll b/test/CodeGen/X86/tls-pie.ll index 3fca9f5..d1e09c2 100644 --- a/test/CodeGen/X86/tls-pie.ll +++ b/test/CodeGen/X86/tls-pie.ll @@ -7,10 +7,10 @@ @i2 = external thread_local global i32 define i32 @f1() { -; X32: f1: +; X32-LABEL: f1: ; X32: movl %gs:i@NTPOFF, %eax ; X32-NEXT: ret -; X64: f1: +; X64-LABEL: f1: ; X64: movl %fs:i@TPOFF, %eax ; X64-NEXT: ret @@ -20,11 +20,11 @@ entry: } define i32* @f2() { -; X32: f2: +; X32-LABEL: f2: ; X32: movl %gs:0, %eax ; X32-NEXT: leal i@NTPOFF(%eax), %eax ; X32-NEXT: ret -; X64: f2: +; X64-LABEL: f2: ; X64: movq %fs:0, %rax ; X64-NEXT: leaq i@TPOFF(%rax), %rax ; X64-NEXT: ret @@ -34,7 +34,7 @@ entry: } define i32 @f3() { -; X32: f3: +; X32-LABEL: f3: ; X32: calll .L{{[0-9]+}}$pb ; X32-NEXT: .L{{[0-9]+}}$pb: ; X32-NEXT: popl %eax @@ -43,7 +43,7 @@ define i32 @f3() { ; X32-NEXT: movl i2@GOTNTPOFF(%eax), %eax ; X32-NEXT: movl %gs:(%eax), %eax ; X32-NEXT: ret -; X64: f3: +; X64-LABEL: f3: ; X64: movq i2@GOTTPOFF(%rip), %rax ; X64-NEXT: movl %fs:(%rax), %eax ; X64-NEXT: ret @@ -54,7 +54,7 @@ entry: } define i32* @f4() { -; X32: f4: +; X32-LABEL: f4: ; X32: calll .L{{[0-9]+}}$pb ; X32-NEXT: .L{{[0-9]+}}$pb: ; X32-NEXT: popl %ecx @@ -63,7 +63,7 @@ define i32* @f4() { ; X32-NEXT: movl %gs:0, %eax ; X32-NEXT: addl i2@GOTNTPOFF(%ecx), %eax ; X32-NEXT: ret -; X64: f4: +; X64-LABEL: f4: ; X64: movq %fs:0, %rax ; X64-NEXT: addq i2@GOTTPOFF(%rip), %rax ; X64-NEXT: ret diff --git a/test/CodeGen/X86/tls.ll b/test/CodeGen/X86/tls.ll index 8cdecd8..24284e5 100644 --- a/test/CodeGen/X86/tls.ll +++ b/test/CodeGen/X86/tls.ll @@ -12,19 +12,19 @@ @b1 = thread_local global i8 0 define i32 @f1() { -; X32_LINUX: f1: +; X32_LINUX-LABEL: f1: ; X32_LINUX: movl %gs:i1@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f1: +; X64_LINUX-LABEL: f1: ; X64_LINUX: movl %fs:i1@TPOFF, %eax ; X64_LINUX-NEXT: ret -; X32_WIN: f1: +; X32_WIN-LABEL: f1: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movl _i1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f1: +; X64_WIN-LABEL: f1: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -37,21 +37,21 @@ entry: } define i32* @f2() { -; X32_LINUX: f2: +; X32_LINUX-LABEL: f2: ; X32_LINUX: movl %gs:0, %eax ; X32_LINUX-NEXT: leal i1@NTPOFF(%eax), %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f2: +; X64_LINUX-LABEL: f2: ; X64_LINUX: movq %fs:0, %rax ; X64_LINUX-NEXT: leaq i1@TPOFF(%rax), %rax ; X64_LINUX-NEXT: ret -; X32_WIN: f2: +; X32_WIN-LABEL: f2: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: leal _i1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f2: +; X64_WIN-LABEL: f2: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -63,21 +63,21 @@ entry: } define i32 @f3() nounwind { -; X32_LINUX: f3: +; X32_LINUX-LABEL: f3: ; X32_LINUX: movl i2@INDNTPOFF, %eax ; X32_LINUX-NEXT: movl %gs:(%eax), %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f3: +; X64_LINUX-LABEL: f3: ; X64_LINUX: movq i2@GOTTPOFF(%rip), %rax ; X64_LINUX-NEXT: movl %fs:(%rax), %eax ; X64_LINUX-NEXT: ret -; X32_WIN: f3: +; X32_WIN-LABEL: f3: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movl _i2@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f3: +; X64_WIN-LABEL: f3: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -90,21 +90,21 @@ entry: } define i32* @f4() { -; X32_LINUX: f4: +; X32_LINUX-LABEL: f4: ; X32_LINUX: movl %gs:0, %eax ; X32_LINUX-NEXT: addl i2@INDNTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f4: +; X64_LINUX-LABEL: f4: ; X64_LINUX: movq %fs:0, %rax ; X64_LINUX-NEXT: addq i2@GOTTPOFF(%rip), %rax ; X64_LINUX-NEXT: ret -; X32_WIN: f4: +; X32_WIN-LABEL: f4: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: leal _i2@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f4: +; X64_WIN-LABEL: f4: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -116,19 +116,19 @@ entry: } define i32 @f5() nounwind { -; X32_LINUX: f5: +; X32_LINUX-LABEL: f5: ; X32_LINUX: movl %gs:i3@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f5: +; X64_LINUX-LABEL: f5: ; X64_LINUX: movl %fs:i3@TPOFF, %eax ; X64_LINUX-NEXT: ret -; X32_WIN: f5: +; X32_WIN-LABEL: f5: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movl _i3@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f5: +; X64_WIN-LABEL: f5: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -141,21 +141,21 @@ entry: } define i32* @f6() { -; X32_LINUX: f6: +; X32_LINUX-LABEL: f6: ; X32_LINUX: movl %gs:0, %eax ; X32_LINUX-NEXT: leal i3@NTPOFF(%eax), %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f6: +; X64_LINUX-LABEL: f6: ; X64_LINUX: movq %fs:0, %rax ; X64_LINUX-NEXT: leaq i3@TPOFF(%rax), %rax ; X64_LINUX-NEXT: ret -; X32_WIN: f6: +; X32_WIN-LABEL: f6: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: leal _i3@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f6: +; X64_WIN-LABEL: f6: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -167,10 +167,10 @@ entry: } define i32 @f7() { -; X32_LINUX: f7: +; X32_LINUX-LABEL: f7: ; X32_LINUX: movl %gs:i4@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f7: +; X64_LINUX-LABEL: f7: ; X64_LINUX: movl %fs:i4@TPOFF, %eax ; X64_LINUX-NEXT: ret @@ -180,11 +180,11 @@ entry: } define i32* @f8() { -; X32_LINUX: f8: +; X32_LINUX-LABEL: f8: ; X32_LINUX: movl %gs:0, %eax ; X32_LINUX-NEXT: leal i4@NTPOFF(%eax), %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f8: +; X64_LINUX-LABEL: f8: ; X64_LINUX: movq %fs:0, %rax ; X64_LINUX-NEXT: leaq i4@TPOFF(%rax), %rax ; X64_LINUX-NEXT: ret @@ -194,10 +194,10 @@ entry: } define i32 @f9() { -; X32_LINUX: f9: +; X32_LINUX-LABEL: f9: ; X32_LINUX: movl %gs:i5@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f9: +; X64_LINUX-LABEL: f9: ; X64_LINUX: movl %fs:i5@TPOFF, %eax ; X64_LINUX-NEXT: ret @@ -207,11 +207,11 @@ entry: } define i32* @f10() { -; X32_LINUX: f10: +; X32_LINUX-LABEL: f10: ; X32_LINUX: movl %gs:0, %eax ; X32_LINUX-NEXT: leal i5@NTPOFF(%eax), %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f10: +; X64_LINUX-LABEL: f10: ; X64_LINUX: movq %fs:0, %rax ; X64_LINUX-NEXT: leaq i5@TPOFF(%rax), %rax ; X64_LINUX-NEXT: ret @@ -221,23 +221,23 @@ entry: } define i16 @f11() { -; X32_LINUX: f11: +; X32_LINUX-LABEL: f11: ; X32_LINUX: movzwl %gs:s1@NTPOFF, %eax ; Why is this kill line here, but no where else? ; X32_LINUX-NEXT: # kill ; X32_LINUX-NEXT: ret -; X64_LINUX: f11: +; X64_LINUX-LABEL: f11: ; X64_LINUX: movzwl %fs:s1@TPOFF, %eax ; X64_LINUX-NEXT: # kill ; X64_LINUX-NEXT: ret -; X32_WIN: f11: +; X32_WIN-LABEL: f11: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movzwl _s1@SECREL32(%eax), %eax ; X32_WIN-NEXT: # kill ; X32_WIN-NEXT: ret -; X64_WIN: f11: +; X64_WIN-LABEL: f11: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -251,19 +251,19 @@ entry: } define i32 @f12() { -; X32_LINUX: f12: +; X32_LINUX-LABEL: f12: ; X32_LINUX: movswl %gs:s1@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f12: +; X64_LINUX-LABEL: f12: ; X64_LINUX: movswl %fs:s1@TPOFF, %eax ; X64_LINUX-NEXT: ret -; X32_WIN: f12: +; X32_WIN-LABEL: f12: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movswl _s1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f12: +; X64_WIN-LABEL: f12: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -277,19 +277,19 @@ entry: } define i8 @f13() { -; X32_LINUX: f13: +; X32_LINUX-LABEL: f13: ; X32_LINUX: movb %gs:b1@NTPOFF, %al ; X32_LINUX-NEXT: ret -; X64_LINUX: f13: +; X64_LINUX-LABEL: f13: ; X64_LINUX: movb %fs:b1@TPOFF, %al ; X64_LINUX-NEXT: ret -; X32_WIN: f13: +; X32_WIN-LABEL: f13: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movb _b1@SECREL32(%eax), %al ; X32_WIN-NEXT: ret -; X64_WIN: f13: +; X64_WIN-LABEL: f13: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax @@ -302,19 +302,19 @@ entry: } define i32 @f14() { -; X32_LINUX: f14: +; X32_LINUX-LABEL: f14: ; X32_LINUX: movsbl %gs:b1@NTPOFF, %eax ; X32_LINUX-NEXT: ret -; X64_LINUX: f14: +; X64_LINUX-LABEL: f14: ; X64_LINUX: movsbl %fs:b1@TPOFF, %eax ; X64_LINUX-NEXT: ret -; X32_WIN: f14: +; X32_WIN-LABEL: f14: ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax ; X32_WIN-NEXT: movsbl _b1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret -; X64_WIN: f14: +; X64_WIN-LABEL: f14: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax diff --git a/test/CodeGen/X86/tlv-1.ll b/test/CodeGen/X86/tlv-1.ll index f970011..66e2f81 100644 --- a/test/CodeGen/X86/tlv-1.ll +++ b/test/CodeGen/X86/tlv-1.ll @@ -5,7 +5,7 @@ @c = external thread_local global %struct.A, align 4 define void @main() nounwind ssp { -; CHECK: main: +; CHECK-LABEL: main: entry: call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false) unreachable diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll index 52d1dc2..ba5a790 100644 --- a/test/CodeGen/X86/umul-with-overflow.ll +++ b/test/CodeGen/X86/umul-with-overflow.ll @@ -6,7 +6,7 @@ define zeroext i1 @a(i32 %x) nounwind { %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil -; CHECK: a: +; CHECK-LABEL: a: ; CHECK: mull ; CHECK: seto %al ; CHECK: movzbl %al, %eax diff --git a/test/CodeGen/X86/unwind-init.ll b/test/CodeGen/X86/unwind-init.ll index e34178d..d0915e2 100644 --- a/test/CodeGen/X86/unwind-init.ll +++ b/test/CodeGen/X86/unwind-init.ll @@ -12,7 +12,7 @@ define void @calls_unwind_init() { ret void } -; X8664: calls_unwind_init: +; X8664-LABEL: calls_unwind_init: ; X8664: pushq %rbp ; X8664: pushq %r15 ; X8664: pushq %r14 @@ -25,7 +25,7 @@ define void @calls_unwind_init() { ; X8664: popq %r14 ; X8664: popq %r15 -; X8632: calls_unwind_init: +; X8632-LABEL: calls_unwind_init: ; X8632: pushl %ebp ; X8632: pushl %ebx ; X8632: pushl %edi diff --git a/test/CodeGen/X86/vec-sign.ll b/test/CodeGen/X86/vec-sign.ll index 31b9c2e..b3d85fd 100644 --- a/test/CodeGen/X86/vec-sign.ll +++ b/test/CodeGen/X86/vec-sign.ll @@ -2,7 +2,7 @@ define <4 x i32> @signd(<4 x i32> %a, <4 x i32> %b) nounwind { entry: -; CHECK: signd: +; CHECK-LABEL: signd: ; CHECK: psignd ; CHECK-NOT: sub ; CHECK: ret @@ -17,7 +17,7 @@ entry: define <4 x i32> @blendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind { entry: -; CHECK: blendvb: +; CHECK-LABEL: blendvb: ; CHECK: pblendvb ; CHECK: ret %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> diff --git a/test/CodeGen/X86/vec_insert-2.ll b/test/CodeGen/X86/vec_insert-2.ll index dee91fd..bfac1ba 100644 --- a/test/CodeGen/X86/vec_insert-2.ll +++ b/test/CodeGen/X86/vec_insert-2.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X64 %s define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind { -; X32: t1: +; X32-LABEL: t1: ; X32: shufps $36 ; X32: ret @@ -11,7 +11,7 @@ define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind { } define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind { -; X32: t2: +; X32-LABEL: t2: ; X32: shufps $36 ; X32: ret @@ -20,11 +20,11 @@ define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind { } define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind { -; X32: t3: +; X32-LABEL: t3: ; X32: movhpd ; X32: ret -; X64: t3: +; X64-LABEL: t3: ; X64: unpcklpd ; X64: ret @@ -33,7 +33,7 @@ define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind { } define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind { -; X32: t4: +; X32-LABEL: t4: ; X32: pinsrw ; X32: ret diff --git a/test/CodeGen/X86/vec_insert-5.ll b/test/CodeGen/X86/vec_insert-5.ll index bd4a06d..5cb9f69 100644 --- a/test/CodeGen/X86/vec_insert-5.ll +++ b/test/CodeGen/X86/vec_insert-5.ll @@ -9,7 +9,7 @@ define void @t1(i32 %a, x86_mmx* %P) nounwind { store x86_mmx %tmp23, x86_mmx* %P ret void -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK-NOT: %mm ; CHECK: shll $12 ; CHECK-NOT: %mm @@ -20,7 +20,7 @@ define <4 x float> @t2(<4 x float>* %P) nounwind { %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 > ret <4 x float> %tmp2 -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: pslldq $12 } @@ -29,7 +29,7 @@ define <4 x float> @t3(<4 x float>* %P) nounwind { %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 > ret <4 x float> %tmp2 -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: psrldq $8 } @@ -38,7 +38,7 @@ define <4 x float> @t4(<4 x float>* %P) nounwind { %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 > ret <4 x float> %tmp2 -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: psrldq $12 } @@ -46,7 +46,7 @@ define <16 x i8> @t5(<16 x i8> %x) nounwind { %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17> ret <16 x i8> %s -; CHECK: t5: +; CHECK-LABEL: t5: ; CHECK: psrldq $1 } @@ -54,7 +54,7 @@ define <16 x i8> @t6(<16 x i8> %x) nounwind { %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ret <16 x i8> %s -; CHECK: t6: +; CHECK-LABEL: t6: ; CHECK: palignr $1 } @@ -62,6 +62,6 @@ define <16 x i8> @t7(<16 x i8> %x) nounwind { %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2> ret <16 x i8> %s -; CHECK: t7: +; CHECK-LABEL: t7: ; CHECK: pslldq $13 } diff --git a/test/CodeGen/X86/vec_shuffle-14.ll b/test/CodeGen/X86/vec_shuffle-14.ll index 94da5d3..95e9a18 100644 --- a/test/CodeGen/X86/vec_shuffle-14.ll +++ b/test/CodeGen/X86/vec_shuffle-14.ll @@ -7,10 +7,10 @@ entry: %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] ret <4 x i32> %tmp6 -; X86-32: t1: +; X86-32-LABEL: t1: ; X86-32: movd 4(%esp), %xmm0 -; X86-64: t1: +; X86-64-LABEL: t1: ; X86-64: movd %e{{..}}, %xmm0 } @@ -20,10 +20,10 @@ entry: %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] ret <2 x i64> %tmp6 -; X86-32: t2: +; X86-32-LABEL: t2: ; X86-32: movq 4(%esp), %xmm0 -; X86-64: t2: +; X86-64-LABEL: t2: ; X86-64: movd %r{{..}}, %xmm0 } @@ -35,11 +35,11 @@ entry: %tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1] ret <2 x i64> %tmp8 -; X86-32: t3: +; X86-32-LABEL: t3: ; X86-32: movl 4(%esp) ; X86-32: movq -; X86-64: t3: +; X86-64-LABEL: t3: ; X86-64: movq ({{.*}}), %xmm0 } @@ -50,10 +50,10 @@ entry: %tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1] ret <2 x i64> %tmp7 -; X86-32: t4: +; X86-32-LABEL: t4: ; X86-32: movq %xmm0, %xmm0 -; X86-64: t4: +; X86-64-LABEL: t4: ; X86-64: movq {{.*}}, %xmm0 } @@ -62,9 +62,9 @@ entry: %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] ret <2 x i64> %tmp6 -; X86-32: t5: +; X86-32-LABEL: t5: ; X86-32: movq %xmm0, %xmm0 -; X86-64: t5: +; X86-64-LABEL: t5: ; X86-64: movq {{.*}}, %xmm0 } diff --git a/test/CodeGen/X86/vec_shuffle-16.ll b/test/CodeGen/X86/vec_shuffle-16.ll index 09d4c1a..9aeb942 100644 --- a/test/CodeGen/X86/vec_shuffle-16.ll +++ b/test/CodeGen/X86/vec_shuffle-16.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse ; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2 -; sse: t1: -; sse2: t1: +; sse-LABEL: t1: +; sse2-LABEL: t1: define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind { ; sse: shufps ; sse2: pshufd @@ -11,8 +11,8 @@ define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind { ret <4 x float> %tmp1 } -; sse: t2: -; sse2: t2: +; sse-LABEL: t2: +; sse2-LABEL: t2: define <4 x float> @t2(<4 x float> %A, <4 x float> %B) nounwind { ; sse: shufps ; sse2: pshufd @@ -21,8 +21,8 @@ define <4 x float> @t2(<4 x float> %A, <4 x float> %B) nounwind { ret <4 x float> %tmp } -; sse: t3: -; sse2: t3: +; sse-LABEL: t3: +; sse2-LABEL: t3: define <4 x float> @t3(<4 x float> %A, <4 x float> %B) nounwind { ; sse: shufps ; sse2: pshufd @@ -31,8 +31,8 @@ define <4 x float> @t3(<4 x float> %A, <4 x float> %B) nounwind { ret <4 x float> %tmp } -; sse: t4: -; sse2: t4: +; sse-LABEL: t4: +; sse2-LABEL: t4: define <4 x float> @t4(<4 x float> %A, <4 x float> %B) nounwind { ; sse: shufps diff --git a/test/CodeGen/X86/vec_shuffle-39.ll b/test/CodeGen/X86/vec_shuffle-39.ll index ee8d2d5..1560454 100644 --- a/test/CodeGen/X86/vec_shuffle-39.ll +++ b/test/CodeGen/X86/vec_shuffle-39.ll @@ -3,7 +3,7 @@ define <4 x float> @t1(<4 x float> %a, <1 x i64>* nocapture %p) nounwind { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: movlps (%rdi), %xmm0 ; CHECK: ret %p.val = load <1 x i64>* %p, align 1 @@ -15,7 +15,7 @@ entry: define <4 x float> @t1a(<4 x float> %a, <1 x i64>* nocapture %p) nounwind { entry: -; CHECK: t1a: +; CHECK-LABEL: t1a: ; CHECK: movlps (%rdi), %xmm0 ; CHECK: ret %0 = bitcast <1 x i64>* %p to double* @@ -28,7 +28,7 @@ entry: define void @t2(<1 x i64>* nocapture %p, <4 x float> %a) nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: movlps %xmm0, (%rdi) ; CHECK: ret %cast.i = bitcast <4 x float> %a to <2 x i64> @@ -40,7 +40,7 @@ entry: define void @t2a(<1 x i64>* nocapture %p, <4 x float> %a) nounwind { entry: -; CHECK: t2a: +; CHECK-LABEL: t2a: ; CHECK: movlps %xmm0, (%rdi) ; CHECK: ret %0 = bitcast <1 x i64>* %p to double* @@ -53,7 +53,7 @@ entry: ; rdar://10436044 define <2 x double> @t3() nounwind readonly { bb: -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: punpcklqdq %xmm1, %xmm0 ; CHECK: movq (%rax), %xmm1 ; CHECK: movsd %xmm1, %xmm0 @@ -71,7 +71,7 @@ bb: ; rdar://10450317 define <2 x i64> @t4() nounwind readonly { bb: -; CHECK: t4: +; CHECK-LABEL: t4: ; CHECK: punpcklqdq %xmm0, %xmm1 ; CHECK: movq (%rax), %xmm0 ; CHECK: movsd %xmm1, %xmm0 diff --git a/test/CodeGen/X86/vec_splat-3.ll b/test/CodeGen/X86/vec_splat-3.ll index cf0ecf4..60e3005 100644 --- a/test/CodeGen/X86/vec_splat-3.ll +++ b/test/CodeGen/X86/vec_splat-3.ll @@ -5,7 +5,7 @@ define <8 x i16> @shuf_8i16_0(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_0: +; CHECK-LABEL: shuf_8i16_0: ; CHECK: pshuflw $0 } @@ -13,7 +13,7 @@ define <8 x i16> @shuf_8i16_1(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_1: +; CHECK-LABEL: shuf_8i16_1: ; CHECK: pshuflw $5 } @@ -21,7 +21,7 @@ define <8 x i16> @shuf_8i16_2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_2: +; CHECK-LABEL: shuf_8i16_2: ; CHECK: punpcklwd ; CHECK-NEXT: pshufd $-86 } @@ -30,7 +30,7 @@ define <8 x i16> @shuf_8i16_3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_3: +; CHECK-LABEL: shuf_8i16_3: ; CHECK: pshuflw $15 } @@ -38,7 +38,7 @@ define <8 x i16> @shuf_8i16_4(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_4: +; CHECK-LABEL: shuf_8i16_4: ; CHECK: movhlps } @@ -46,7 +46,7 @@ define <8 x i16> @shuf_8i16_5(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_5: +; CHECK-LABEL: shuf_8i16_5: ; CHECK: punpckhwd ; CHECK-NEXT: pshufd $85 } @@ -55,7 +55,7 @@ define <8 x i16> @shuf_8i16_6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 6, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_6: +; CHECK-LABEL: shuf_8i16_6: ; CHECK: punpckhwd ; CHECK-NEXT: pshufd $-86 } @@ -64,7 +64,7 @@ define <8 x i16> @shuf_8i16_7(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x i16> %tmp6 -; CHECK: shuf_8i16_7: +; CHECK-LABEL: shuf_8i16_7: ; CHECK: punpckhwd ; CHECK-NEXT: pshufd $-1 } @@ -74,7 +74,7 @@ define <16 x i8> @shuf_16i8_8(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_8: +; CHECK-LABEL: shuf_16i8_8: ; CHECK: punpcklbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $0 @@ -84,7 +84,7 @@ define <16 x i8> @shuf_16i8_9(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_9: +; CHECK-LABEL: shuf_16i8_9: ; CHECK: punpcklbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $85 @@ -94,7 +94,7 @@ define <16 x i8> @shuf_16i8_10(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_10: +; CHECK-LABEL: shuf_16i8_10: ; CHECK: punpcklbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $-86 @@ -104,7 +104,7 @@ define <16 x i8> @shuf_16i8_11(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 3, i32 undef, i32 undef, i32 3, i32 undef, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_11: +; CHECK-LABEL: shuf_16i8_11: ; CHECK: punpcklbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $-1 @@ -115,7 +115,7 @@ define <16 x i8> @shuf_16i8_12(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_12: +; CHECK-LABEL: shuf_16i8_12: ; CHECK: pshufd $5 } @@ -123,7 +123,7 @@ define <16 x i8> @shuf_16i8_13(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_13: +; CHECK-LABEL: shuf_16i8_13: ; CHECK: punpcklbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $85 @@ -133,7 +133,7 @@ define <16 x i8> @shuf_16i8_14(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 6, i32 undef, i32 undef, i32 6, i32 undef, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_14: +; CHECK-LABEL: shuf_16i8_14: ; CHECK: punpcklbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $-86 @@ -143,7 +143,7 @@ define <16 x i8> @shuf_16i8_15(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_15: +; CHECK-LABEL: shuf_16i8_15: ; CHECK: punpcklbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $-1 @@ -153,7 +153,7 @@ define <16 x i8> @shuf_16i8_16(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 8, i32 undef, i32 undef, i32 8, i32 undef, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_16: +; CHECK-LABEL: shuf_16i8_16: ; CHECK: punpckhbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $0 @@ -163,7 +163,7 @@ define <16 x i8> @shuf_16i8_17(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 9, i32 undef, i32 undef, i32 9, i32 undef, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_17: +; CHECK-LABEL: shuf_16i8_17: ; CHECK: punpckhbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $85 @@ -173,7 +173,7 @@ define <16 x i8> @shuf_16i8_18(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 10, i32 undef, i32 undef, i32 10, i32 undef, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_18: +; CHECK-LABEL: shuf_16i8_18: ; CHECK: punpckhbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $-86 @@ -183,7 +183,7 @@ define <16 x i8> @shuf_16i8_19(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 11, i32 undef, i32 undef, i32 11, i32 undef, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_19: +; CHECK-LABEL: shuf_16i8_19: ; CHECK: punpckhbw ; CHECK-NEXT: punpcklbw ; CHECK-NEXT: pshufd $-1 @@ -193,7 +193,7 @@ define <16 x i8> @shuf_16i8_20(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 12, i32 undef, i32 undef, i32 12, i32 undef, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_20: +; CHECK-LABEL: shuf_16i8_20: ; CHECK: punpckhbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $0 @@ -203,7 +203,7 @@ define <16 x i8> @shuf_16i8_21(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 13, i32 undef, i32 undef, i32 13, i32 undef, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_21: +; CHECK-LABEL: shuf_16i8_21: ; CHECK: punpckhbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $85 @@ -213,7 +213,7 @@ define <16 x i8> @shuf_16i8_22(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 14, i32 undef, i32 undef, i32 14, i32 undef, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_22: +; CHECK-LABEL: shuf_16i8_22: ; CHECK: punpckhbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $-86 @@ -223,7 +223,7 @@ define <16 x i8> @shuf_16i8_23(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone { %tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 15, i32 undef, i32 undef, i32 15, i32 undef, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15> ret <16 x i8> %tmp6 -; CHECK: shuf_16i8_23: +; CHECK-LABEL: shuf_16i8_23: ; CHECK: punpckhbw ; CHECK-NEXT: punpckhbw ; CHECK-NEXT: pshufd $-1 diff --git a/test/CodeGen/X86/vector-gep.ll b/test/CodeGen/X86/vector-gep.ll index ec93ce0..b87d844 100644 --- a/test/CodeGen/X86/vector-gep.ll +++ b/test/CodeGen/X86/vector-gep.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck %s ; RUN: opt -instsimplify -disable-output < %s -;CHECK: AGEP0: +;CHECK-LABEL: AGEP0: define <4 x i32*> @AGEP0(i32* %ptr) nounwind { entry: %vecinit.i = insertelement <4 x i32*> undef, i32* %ptr, i32 0 @@ -16,7 +16,7 @@ entry: ;CHECK: ret } -;CHECK: AGEP1: +;CHECK-LABEL: AGEP1: define i32 @AGEP1(<4 x i32*> %param) nounwind { entry: ;CHECK: padd @@ -27,7 +27,7 @@ entry: ;CHECK: ret } -;CHECK: AGEP2: +;CHECK-LABEL: AGEP2: define i32 @AGEP2(<4 x i32*> %param, <4 x i32> %off) nounwind { entry: ;CHECK: pslld $2 @@ -39,7 +39,7 @@ entry: ;CHECK: ret } -;CHECK: AGEP3: +;CHECK-LABEL: AGEP3: define <4 x i32*> @AGEP3(<4 x i32*> %param, <4 x i32> %off) nounwind { entry: ;CHECK: pslld $2 @@ -51,7 +51,7 @@ entry: ;CHECK: ret } -;CHECK: AGEP4: +;CHECK-LABEL: AGEP4: define <4 x i16*> @AGEP4(<4 x i16*> %param, <4 x i32> %off) nounwind { entry: ; Multiply offset by two (add it to itself). @@ -63,7 +63,7 @@ entry: ;CHECK: ret } -;CHECK: AGEP5: +;CHECK-LABEL: AGEP5: define <4 x i8*> @AGEP5(<4 x i8*> %param, <4 x i8> %off) nounwind { entry: ;CHECK: paddd @@ -74,7 +74,7 @@ entry: ; The size of each element is 1 byte. No need to multiply by element size. -;CHECK: AGEP6: +;CHECK-LABEL: AGEP6: define <4 x i8*> @AGEP6(<4 x i8*> %param, <4 x i32> %off) nounwind { entry: ;CHECK-NOT: pslld diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll index e775750..b6e4b5b 100644 --- a/test/CodeGen/X86/vshift-1.ll +++ b/test/CodeGen/X86/vshift-1.ll @@ -5,7 +5,7 @@ define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: -; CHECK: shift1a: +; CHECK-LABEL: shift1a: ; CHECK: psllq %shl = shl <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %shl, <2 x i64>* %dst @@ -14,7 +14,7 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: -; CHECK: shift1b: +; CHECK-LABEL: shift1b: ; CHECK: movd ; CHECK: psllq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 @@ -27,7 +27,7 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: -; CHECK: shift2a: +; CHECK-LABEL: shift2a: ; CHECK: pslld %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 > store <4 x i32> %shl, <4 x i32>* %dst @@ -36,7 +36,7 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: -; CHECK: shift2b: +; CHECK-LABEL: shift2b: ; CHECK: movd ; CHECK: pslld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 @@ -50,7 +50,7 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: -; CHECK: shift3a: +; CHECK-LABEL: shift3a: ; CHECK: psllw %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %shl, <8 x i16>* %dst @@ -60,7 +60,7 @@ entry: ; Make sure the shift amount is properly zero extended. define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: -; CHECK: shift3b: +; CHECK-LABEL: shift3b: ; CHECK: movzwl ; CHECK: movd ; CHECK-NEXT: psllw diff --git a/test/CodeGen/X86/vshift-2.ll b/test/CodeGen/X86/vshift-2.ll index 9496893..0b1597c 100644 --- a/test/CodeGen/X86/vshift-2.ll +++ b/test/CodeGen/X86/vshift-2.ll @@ -5,7 +5,7 @@ define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: -; CHECK: shift1a: +; CHECK-LABEL: shift1a: ; CHECK: psrlq %lshr = lshr <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %lshr, <2 x i64>* %dst @@ -14,7 +14,7 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: -; CHECK: shift1b: +; CHECK-LABEL: shift1b: ; CHECK: movd ; CHECK: psrlq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 @@ -26,7 +26,7 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: -; CHECK: shift2a: +; CHECK-LABEL: shift2a: ; CHECK: psrld %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 > store <4 x i32> %lshr, <4 x i32>* %dst @@ -35,7 +35,7 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: -; CHECK: shift2b: +; CHECK-LABEL: shift2b: ; CHECK: movd ; CHECK: psrld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 @@ -50,7 +50,7 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: -; CHECK: shift3a: +; CHECK-LABEL: shift3a: ; CHECK: psrlw %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %lshr, <8 x i16>* %dst @@ -60,7 +60,7 @@ entry: ; properly zero extend the shift amount define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: -; CHECK: shift3b: +; CHECK-LABEL: shift3b: ; CHECK: movzwl ; CHECK: movd ; CHECK: psrlw diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll index b2b48b9..9b484a7 100644 --- a/test/CodeGen/X86/vshift-3.ll +++ b/test/CodeGen/X86/vshift-3.ll @@ -8,7 +8,7 @@ ; shift1a can't use a packed shift define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: -; CHECK: shift1a: +; CHECK-LABEL: shift1a: ; CHECK: sarl %ashr = ashr <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %ashr, <2 x i64>* %dst @@ -17,7 +17,7 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: -; CHECK: shift2a: +; CHECK-LABEL: shift2a: ; CHECK: psrad $5 %ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 > store <4 x i32> %ashr, <4 x i32>* %dst @@ -26,7 +26,7 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: -; CHECK: shift2b: +; CHECK-LABEL: shift2b: ; CHECK: movd ; CHECK: psrad %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 @@ -40,7 +40,7 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: -; CHECK: shift3a: +; CHECK-LABEL: shift3a: ; CHECK: psraw $5 %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %ashr, <8 x i16>* %dst @@ -49,7 +49,7 @@ entry: define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: -; CHECK: shift3b: +; CHECK-LABEL: shift3b: ; CHECK: movzwl ; CHECK: movd ; CHECK: psraw diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll index 8e24fda..c597c25 100644 --- a/test/CodeGen/X86/vshift-4.ll +++ b/test/CodeGen/X86/vshift-4.ll @@ -5,7 +5,7 @@ define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: -; CHECK: shift1a: +; CHECK-LABEL: shift1a: ; CHECK: psllq %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> %shl = shl <2 x i64> %val, %shamt @@ -16,7 +16,7 @@ entry: ; shift1b can't use a packed shift define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: -; CHECK: shift1b: +; CHECK-LABEL: shift1b: ; CHECK: shll %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> %shl = shl <2 x i64> %val, %shamt @@ -26,7 +26,7 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: -; CHECK: shift2a: +; CHECK-LABEL: shift2a: ; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt @@ -36,7 +36,7 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: -; CHECK: shift2b: +; CHECK-LABEL: shift2b: ; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt @@ -46,7 +46,7 @@ entry: define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: -; CHECK: shift2c: +; CHECK-LABEL: shift2c: ; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt @@ -56,7 +56,7 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { entry: -; CHECK: shift3a: +; CHECK-LABEL: shift3a: ; CHECK: movzwl ; CHECK: psllw %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> @@ -67,7 +67,7 @@ entry: define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: -; CHECK: shift3b: +; CHECK-LABEL: shift3b: ; CHECK: movzwl ; CHECK: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll index f6c311d..562e520 100644 --- a/test/CodeGen/X86/vshift-5.ll +++ b/test/CodeGen/X86/vshift-5.ll @@ -4,7 +4,7 @@ define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { entry: -; CHECK: shift5a: +; CHECK-LABEL: shift5a: ; CHECK: movd ; CHECK: pslld %amt = load i32* %pamt @@ -18,7 +18,7 @@ entry: define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { entry: -; CHECK: shift5b: +; CHECK-LABEL: shift5b: ; CHECK: movd ; CHECK: psrad %amt = load i32* %pamt @@ -32,7 +32,7 @@ entry: define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: -; CHECK: shift5c: +; CHECK-LABEL: shift5c: ; CHECK: movd ; CHECK: pslld %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 @@ -45,7 +45,7 @@ entry: define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: -; CHECK: shift5d: +; CHECK-LABEL: shift5d: ; CHECK: movd ; CHECK: psrad %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 diff --git a/test/CodeGen/X86/widen_extract-1.ll b/test/CodeGen/X86/widen_extract-1.ll index 8672742..c4fe43a 100644 --- a/test/CodeGen/X86/widen_extract-1.ll +++ b/test/CodeGen/X86/widen_extract-1.ll @@ -3,7 +3,7 @@ define void @convert(<2 x double>* %dst.addr, <3 x double> %src) { entry: -; CHECK: convert: +; CHECK-LABEL: convert: ; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}} ; CHECK-NEXT: movapd %val = shufflevector <3 x double> %src, <3 x double> undef, <2 x i32> < i32 0, i32 1> diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index 224898c..2781dcf 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -148,7 +148,7 @@ define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) no ret void } -; CHECK: add31i8: +; CHECK-LABEL: add31i8: %i8vec31 = type <31 x i8> define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp) nounwind { ; CHECK: movdqa diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll index 7bebb27..c7d2044 100644 --- a/test/CodeGen/X86/widen_shuffle-1.ll +++ b/test/CodeGen/X86/widen_shuffle-1.ll @@ -3,7 +3,7 @@ ; widening shuffle v3float and then a add define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { entry: -; CHECK: shuf: +; CHECK-LABEL: shuf: ; CHECK: extractps ; CHECK: extractps %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2> @@ -17,7 +17,7 @@ entry: ; widening shuffle v3float with a different mask and then a add define void @shuf2(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { entry: -; CHECK: shuf2: +; CHECK-LABEL: shuf2: ; CHECK: extractps ; CHECK: extractps %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2> @@ -32,7 +32,7 @@ entry: ; opA with opB, the DAG will produce new operations with opA. define void @shuf3(<4 x float> %tmp10, <4 x float> %vecinit15, <4 x float>* %dst) nounwind { entry: -; CHECK: shuf3: +; CHECK-LABEL: shuf3: ; CHECK: shufps %shuffle.i.i.i12 = shufflevector <4 x float> %tmp10, <4 x float> %vecinit15, <4 x i32> <i32 0, i32 1, i32 4, i32 5> %tmp25.i.i = shufflevector <4 x float> %shuffle.i.i.i12, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2> @@ -52,7 +52,7 @@ entry: ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS define <8 x i8> @shuf4(<4 x i8> %a, <4 x i8> %b) nounwind readnone { -; CHECK: shuf4: +; CHECK-LABEL: shuf4: ; CHECK-NOT: punpckldq %vshuf = shufflevector <4 x i8> %a, <4 x i8> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ret <8 x i8> %vshuf @@ -61,7 +61,7 @@ define <8 x i8> @shuf4(<4 x i8> %a, <4 x i8> %b) nounwind readnone { ; PR11389: another CONCAT_VECTORS case define void @shuf5(<8 x i8>* %p) nounwind { -; CHECK: shuf5: +; CHECK-LABEL: shuf5: %v = shufflevector <2 x i8> <i8 4, i8 33>, <2 x i8> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> store <8 x i8> %v, <8 x i8>* %p, align 8 ret void diff --git a/test/CodeGen/X86/win64_vararg.ll b/test/CodeGen/X86/win64_vararg.ll index 52bc509..74b7cea 100644 --- a/test/CodeGen/X86/win64_vararg.ll +++ b/test/CodeGen/X86/win64_vararg.ll @@ -19,7 +19,7 @@ entry: declare void @llvm.va_start(i8*) nounwind -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: pushq ; CHECK: leaq 56(%rsp), define i8* @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind { @@ -30,7 +30,7 @@ entry: ret i8* %ap1 } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: pushq ; CHECK: leaq 48(%rsp), define i8* @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind { @@ -41,7 +41,7 @@ entry: ret i8* %ap1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: pushq ; CHECK: leaq 40(%rsp), define i8* @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind { diff --git a/test/CodeGen/X86/x86-64-and-mask.ll b/test/CodeGen/X86/x86-64-and-mask.ll index 1de406c..e8c628d 100644 --- a/test/CodeGen/X86/x86-64-and-mask.ll +++ b/test/CodeGen/X86/x86-64-and-mask.ll @@ -14,7 +14,7 @@ entry: } ; This copy can't be coalesced away because it needs the implicit zero-extend. -; CHECK: bbb: +; CHECK-LABEL: bbb: ; CHECK: movl %edi, %edi define void @bbb(i64 %x) nounwind { @@ -26,7 +26,7 @@ define void @bbb(i64 %x) nounwind { ; This should use a 32-bit and with implicit zero-extension, not a 64-bit and ; with a separate mov to materialize the mask. ; rdar://7527390 -; CHECK: ccc: +; CHECK-LABEL: ccc: ; CHECK: andl $-1048593, %edi declare void @foo(i64 %x) nounwind @@ -38,7 +38,7 @@ define void @ccc(i64 %x) nounwind { } ; This requires a mov and a 64-bit and. -; CHECK: ddd: +; CHECK-LABEL: ddd: ; CHECK: movabsq $4294967296, %r ; CHECK: andq %rax, %rdi diff --git a/test/CodeGen/X86/x86-64-sret-return.ll b/test/CodeGen/X86/x86-64-sret-return.ll index bc8a543..2d00114 100644 --- a/test/CodeGen/X86/x86-64-sret-return.ll +++ b/test/CodeGen/X86/x86-64-sret-return.ll @@ -4,11 +4,11 @@ %struct.foo = type { [4 x i64] } -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: movq %rdi, %rax ; For the x32 ABI, pointers are 32-bit so 32-bit instructions will be used -; X32ABI: bar: +; X32ABI-LABEL: bar: ; X32ABI: movl %edi, %eax define void @bar(%struct.foo* noalias sret %agg.result, %struct.foo* %d) nounwind { @@ -60,11 +60,11 @@ return: ; preds = %entry ret void } -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: movq %rdi, %rax ; For the x32 ABI, pointers are 32-bit so 32-bit instructions will be used -; X32ABI: foo: +; X32ABI-LABEL: foo: ; X32ABI: movl %edi, %eax define void @foo({ i64 }* noalias nocapture sret %agg.result) nounwind { diff --git a/test/CodeGen/X86/x86-shifts.ll b/test/CodeGen/X86/x86-shifts.ll index 20bccab..af57e5c 100644 --- a/test/CodeGen/X86/x86-shifts.ll +++ b/test/CodeGen/X86/x86-shifts.ll @@ -156,7 +156,7 @@ entry: define <16 x i8> @shl9(<16 x i8> %A) nounwind { %B = shl <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <16 x i8> %B -; CHECK: shl9: +; CHECK-LABEL: shl9: ; CHECK: psllw $3 ; CHECK: pand ; CHECK: ret @@ -165,7 +165,7 @@ define <16 x i8> @shl9(<16 x i8> %A) nounwind { define <16 x i8> @shr9(<16 x i8> %A) nounwind { %B = lshr <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <16 x i8> %B -; CHECK: shr9: +; CHECK-LABEL: shr9: ; CHECK: psrlw $3 ; CHECK: pand ; CHECK: ret @@ -174,7 +174,7 @@ define <16 x i8> @shr9(<16 x i8> %A) nounwind { define <16 x i8> @sra_v16i8_7(<16 x i8> %A) nounwind { %B = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> ret <16 x i8> %B -; CHECK: sra_v16i8_7: +; CHECK-LABEL: sra_v16i8_7: ; CHECK: pxor ; CHECK: pcmpgtb ; CHECK: ret @@ -183,7 +183,7 @@ define <16 x i8> @sra_v16i8_7(<16 x i8> %A) nounwind { define <16 x i8> @sra_v16i8(<16 x i8> %A) nounwind { %B = ashr <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> ret <16 x i8> %B -; CHECK: sra_v16i8: +; CHECK-LABEL: sra_v16i8: ; CHECK: psrlw $3 ; CHECK: pand ; CHECK: pxor diff --git a/test/CodeGen/X86/xmulo.ll b/test/CodeGen/X86/xmulo.ll index 486dafe..71efac4 100644 --- a/test/CodeGen/X86/xmulo.ll +++ b/test/CodeGen/X86/xmulo.ll @@ -8,7 +8,7 @@ declare i32 @printf(i8*, ...) @.str = private unnamed_addr constant [10 x i8] c"%llx, %d\0A\00", align 1 define i32 @t1() nounwind { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: movl $0, 12(%esp) ; CHECK: movl $0, 8(%esp) ; CHECK: movl $72, 4(%esp) @@ -22,7 +22,7 @@ define i32 @t1() nounwind { } define i32 @t2() nounwind { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: movl $0, 12(%esp) ; CHECK: movl $0, 8(%esp) ; CHECK: movl $0, 4(%esp) @@ -36,7 +36,7 @@ define i32 @t2() nounwind { } define i32 @t3() nounwind { -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: movl $1, 12(%esp) ; CHECK: movl $-1, 8(%esp) ; CHECK: movl $-9, 4(%esp) diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll index fd1b006..dd1fcca 100644 --- a/test/CodeGen/X86/xor-icmp.ll +++ b/test/CodeGen/X86/xor-icmp.ll @@ -4,14 +4,14 @@ define i32 @t(i32 %a, i32 %b) nounwind ssp { entry: -; X32: t: +; X32-LABEL: t: ; X32: xorb ; X32-NOT: andb ; X32-NOT: shrb ; X32: testb $64 ; X32: je -; X64: t: +; X64-LABEL: t: ; X64-NOT: setne ; X64: xorl ; X64: testb $64 @@ -37,7 +37,7 @@ declare i32 @foo(...) declare i32 @bar(...) define i32 @t2(i32 %x, i32 %y) nounwind ssp { -; X32: t2: +; X32-LABEL: t2: ; X32: cmpl ; X32: sete ; X32: cmpl @@ -45,7 +45,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp { ; X32-NOT: xor ; X32: je -; X64: t2: +; X64-LABEL: t2: ; X64: testl ; X64: sete ; X64: testl diff --git a/test/CodeGen/X86/zero-remat.ll b/test/CodeGen/X86/zero-remat.ll index 5d25a2d..e3c3c5e 100644 --- a/test/CodeGen/X86/zero-remat.ll +++ b/test/CodeGen/X86/zero-remat.ll @@ -11,12 +11,12 @@ define double @foo() nounwind { call void @bar(double 0.0) ret double 0.0 -;CHECK-32: foo: +;CHECK-32-LABEL: foo: ;CHECK-32: call ;CHECK-32: fldz ;CHECK-32: ret -;CHECK-64: foo: +;CHECK-64-LABEL: foo: ;CHECK-64: xorps ;CHECK-64: call ;CHECK-64: xorps @@ -28,12 +28,12 @@ define float @foof() nounwind { call void @barf(float 0.0) ret float 0.0 -;CHECK-32: foof: +;CHECK-32-LABEL: foof: ;CHECK-32: call ;CHECK-32: fldz ;CHECK-32: ret -;CHECK-64: foof: +;CHECK-64-LABEL: foof: ;CHECK-64: xorps ;CHECK-64: call ;CHECK-64: xorps diff --git a/test/CodeGen/X86/zext-extract_subreg.ll b/test/CodeGen/X86/zext-extract_subreg.ll index 7fa0574..43e79c7 100644 --- a/test/CodeGen/X86/zext-extract_subreg.ll +++ b/test/CodeGen/X86/zext-extract_subreg.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s define void @t() nounwind ssp { -; CHECK: t: +; CHECK-LABEL: t: entry: br i1 undef, label %return, label %if.end.i diff --git a/test/CodeGen/X86/zext-shl.ll b/test/CodeGen/X86/zext-shl.ll index 928848e..ac3ecc8 100644 --- a/test/CodeGen/X86/zext-shl.ll +++ b/test/CodeGen/X86/zext-shl.ll @@ -2,7 +2,7 @@ define i32 @t1(i8 zeroext %x) nounwind readnone ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: shll ; CHECK-NOT: movzwl ; CHECK: ret @@ -14,7 +14,7 @@ entry: define i32 @t2(i8 zeroext %x) nounwind readnone ssp { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: shrl ; CHECK-NOT: movzwl ; CHECK: ret diff --git a/test/CodeGen/X86/zext-trunc.ll b/test/CodeGen/X86/zext-trunc.ll index b9ffbe8..32afd6b 100644 --- a/test/CodeGen/X86/zext-trunc.ll +++ b/test/CodeGen/X86/zext-trunc.ll @@ -2,7 +2,7 @@ ; rdar://7570931 define i64 @foo(i64 %a, i64 %b) nounwind { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: leal ; CHECK-NOT: movl ; CHECK: ret |