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authorEvan Cheng <evan.cheng@apple.com>2009-04-14 16:57:43 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-04-14 16:57:43 +0000
commitb3f5bfe37f7d0c2b77bda1530da6d98f5ccb5ae6 (patch)
tree63f0132d9b13191c76f51826d0f0fb912499fdd9 /test/CodeGen/X86
parent85be408a324490ea28514287dee05afac97d4317 (diff)
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Some of GR8_NOREX registers are only available in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/2009-04-14-IllegalRegs.ll35
1 files changed, 35 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2009-04-14-IllegalRegs.ll b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
new file mode 100644
index 0000000..5dda4e9
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -fast -regalloc=local | not grep sil
+; rdar://6787136
+
+ %struct.X = type { i8, [32 x i8] }
+@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @z to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @z() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %xxx = alloca %struct.X ; <%struct.X*> [#uses=6]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %2 = getelementptr [32 x i8]* %1, i32 0, i32 31 ; <i8*> [#uses=1]
+ store i8 48, i8* %2, align 1
+ %3 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %4 = getelementptr [32 x i8]* %3, i32 0, i32 31 ; <i8*> [#uses=1]
+ %5 = load i8* %4, align 1 ; <i8> [#uses=1]
+ %6 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %7 = getelementptr [32 x i8]* %6, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 %5, i8* %7, align 1
+ %8 = getelementptr %struct.X* %xxx, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 15, i8* %8, align 1
+ %9 = call i32 (...)* bitcast (i32 (%struct.X*, %struct.X*)* @f to i32 (...)*)(%struct.X* byval align 4 %xxx, %struct.X* byval align 4 %xxx) nounwind ; <i32> [#uses=1]
+ store i32 %9, i32* %0, align 4
+ %10 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %10, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+declare i32 @f(%struct.X* byval align 4, %struct.X* byval align 4) nounwind ssp