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author | Dan Gohman <gohman@apple.com> | 2009-09-18 19:59:53 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-09-18 19:59:53 +0000 |
commit | e220c4b3d97bbdc9f6e8cf040942514612349c41 (patch) | |
tree | a3bf7029b426ca3c6c29ba626b0842677bb13ae3 /test/CodeGen/X86 | |
parent | a2dc2825fc4474f9e1abe865100202c9104944d1 (diff) | |
download | external_llvm-e220c4b3d97bbdc9f6e8cf040942514612349c41.zip external_llvm-e220c4b3d97bbdc9f6e8cf040942514612349c41.tar.gz external_llvm-e220c4b3d97bbdc9f6e8cf040942514612349c41.tar.bz2 |
Add support for using the FLAGS result of or, xor, and and instructions
on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82263 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r-- | test/CodeGen/X86/2008-10-16-SpillerBug.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/peep-test-3.ll | 88 | ||||
-rw-r--r-- | test/CodeGen/X86/stack-color-with-reg.ll | 5 |
3 files changed, 91 insertions, 4 deletions
diff --git a/test/CodeGen/X86/2008-10-16-SpillerBug.ll b/test/CodeGen/X86/2008-10-16-SpillerBug.ll index 7582f63..b8ca364 100644 --- a/test/CodeGen/X86/2008-10-16-SpillerBug.ll +++ b/test/CodeGen/X86/2008-10-16-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edx} +; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edi} %struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 } %struct.XXDAlphaTest = type { float, i16, i8, i8 } diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll new file mode 100644 index 0000000..a96351a --- /dev/null +++ b/test/CodeGen/X86/peep-test-3.ll @@ -0,0 +1,88 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +; LLVM should omit the testl and use the flags result from the orl. + +; CHECK: or: +define void @or(float* %A, i32 %IA, i32 %N) nounwind { +entry: + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: orl %ecx, %edx +; CHECK-NEXT: je .LBB1_2 + %3 = or i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* %A, align 4 + ret void + +return: ; preds = %entry + ret void +} +; CHECK: xor: +define void @xor(float* %A, i32 %IA, i32 %N) nounwind { +entry: + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] +; CHECK: xorl $1, %e +; CHECK-NEXT: je .LBB2_2 + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] + %3 = xor i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* %A, align 4 + ret void + +return: ; preds = %entry + ret void +} +; CHECK: and: +define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { +entry: + store i8 0, i8* %p + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: andl $3, % +; CHECK-NEXT: movb % +; CHECK-NEXT: je .LBB3_2 + %3 = and i32 %2, %1 ; <i32> [#uses=1] + %t = trunc i32 %3 to i8 + store i8 %t, i8* %p + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* null, align 4 + ret void + +return: ; preds = %entry + ret void +} + +; Just like @and, but without the trunc+store. This should use a testl +; instead of an andl. +; CHECK: test: +define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { +entry: + store i8 0, i8* %p + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: testb $3, % +; CHECK-NEXT: je .LBB4_2 + %3 = and i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* null, align 4 + ret void + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll index f085b3f..a8ae8e8 100644 --- a/test/CodeGen/X86/stack-color-with-reg.ll +++ b/test/CodeGen/X86/stack-color-with-reg.ll @@ -1,7 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t -; RUN: grep stackcoloring %t | grep "loads eliminated" -; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 181 +; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 8 +; RUN: grep asm-printer %t | grep 182 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 |