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authorDan Gohman <gohman@apple.com>2008-10-04 00:31:14 +0000
committerDan Gohman <gohman@apple.com>2008-10-04 00:31:14 +0000
commit022b21ff7c047f8c1615a6588052c55427bcd9b0 (patch)
tree26da2035d0b767936c607a58c261ee6d5a4cdead /test/CodeGen
parent880ae364ba4ed3d63542a2ef934980c70e8bb9d7 (diff)
downloadexternal_llvm-022b21ff7c047f8c1615a6588052c55427bcd9b0.zip
external_llvm-022b21ff7c047f8c1615a6588052c55427bcd9b0.tar.gz
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Fix a bug in the local allocator's liveness computation where it
was setting kill flags on tied uses in two-address instructions. The kill flags were causing the allocator to think it could allocate the use and its tied def in different registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57039 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/X86/local-liveness.ll31
1 files changed, 31 insertions, 0 deletions
diff --git a/test/CodeGen/X86/local-liveness.ll b/test/CodeGen/X86/local-liveness.ll
new file mode 100644
index 0000000..f176ec2
--- /dev/null
+++ b/test/CodeGen/X86/local-liveness.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %esi}
+
+; Local regalloc shouldn't assume that both the uses of the
+; sub instruction are kills, because one of them is tied
+; to an output. Previously, it was allocating both inputs
+; in the same register.
+
+define i32 @func_3() nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %g_323 = alloca i8 ; <i8*> [#uses=2]
+ %p_5 = alloca i64, align 8 ; <i64*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i64 0, i64* %p_5, align 8
+ store i8 1, i8* %g_323, align 1
+ %1 = load i8* %g_323, align 1 ; <i8> [#uses=1]
+ %2 = sext i8 %1 to i64 ; <i64> [#uses=1]
+ %3 = load i64* %p_5, align 8 ; <i64> [#uses=1]
+ %4 = sub i64 %3, %2 ; <i64> [#uses=1]
+ %5 = icmp sge i64 %4, 0 ; <i1> [#uses=1]
+ %6 = zext i1 %5 to i32 ; <i32> [#uses=1]
+ store i32 %6, i32* %0, align 4
+ %7 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %7, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}