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| author | Evan Cheng <evan.cheng@apple.com> | 2009-01-19 19:06:11 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-01-19 19:06:11 +0000 |
| commit | 2722e7b1394e675114d2338ce61a92814d66d126 (patch) | |
| tree | 6d5fa0e75ac8a8732c078504ae8cc185c32e2842 /test/CodeGen | |
| parent | c1a168a0fcbc7483a879e617e91824c4a7e6eece (diff) | |
| download | external_llvm-2722e7b1394e675114d2338ce61a92814d66d126.zip external_llvm-2722e7b1394e675114d2338ce61a92814d66d126.tar.gz external_llvm-2722e7b1394e675114d2338ce61a92814d66d126.tar.bz2 | |
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/rem-2.ll | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/test/CodeGen/X86/rem-2.ll b/test/CodeGen/X86/rem-2.ll new file mode 100644 index 0000000..3e17fc0 --- /dev/null +++ b/test/CodeGen/X86/rem-2.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep cltd + +define i32 @test(i32 %X) nounwind readnone { +entry: + %0 = srem i32 41, %X + ret i32 %0 +} |