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author | Chris Lattner <sabre@nondot.org> | 2008-10-17 17:59:52 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-10-17 17:59:52 +0000 |
commit | 316a137b40071451f6a47b6d056f45e2c3eba6f6 (patch) | |
tree | d287fc02926f1c844ff4027f65da561b1ceaac5f /test/CodeGen | |
parent | a92185de521df0e6fa4ad9e01a20105570c35295 (diff) | |
download | external_llvm-316a137b40071451f6a47b6d056f45e2c3eba6f6.zip external_llvm-316a137b40071451f6a47b6d056f45e2c3eba6f6.tar.gz external_llvm-316a137b40071451f6a47b6d056f45e2c3eba6f6.tar.bz2 |
Fix a bug where the x86 backend would reject 64-bit r constraints when
in 32-bit mode instead of assigning a register pair. This has nothing to
do with PR2356, but I happened to notice it while working on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57704 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll new file mode 100644 index 0000000..eb2ec37 --- /dev/null +++ b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86-64 + +define void @test(i64 %x) nounwind { +entry: + tail call void asm sideeffect "ASM: $0", "r,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind + ret void +} + |