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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-08-18 13:08:57 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-08-18 13:08:57 +0000 |
| commit | 3491d67d3a50e81e3f65c1bdf01dd7962dc10c46 (patch) | |
| tree | c912b891381b21b8888f7db0b15c9d4ab13358ea /test/CodeGen | |
| parent | ff79bc6e189f4d38021bba6a99d1d9e1af999df3 (diff) | |
| download | external_llvm-3491d67d3a50e81e3f65c1bdf01dd7962dc10c46.zip external_llvm-3491d67d3a50e81e3f65c1bdf01dd7962dc10c46.tar.gz external_llvm-3491d67d3a50e81e3f65c1bdf01dd7962dc10c46.tar.bz2 | |
AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/avx512-mov.ll | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx512-mov.ll b/test/CodeGen/X86/avx512-mov.ll new file mode 100644 index 0000000..3070862 --- /dev/null +++ b/test/CodeGen/X86/avx512-mov.ll @@ -0,0 +1,75 @@ +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s + +; CHECK-LABEL: @test1 +; CHECK: vmovdz %xmm0, %eax +; CHECK: ret +define i32 @test1(float %x) { + %res = bitcast float %x to i32 + ret i32 %res +} + +; CHECK-LABEL: @test2 +; CHECK: vmovdz %edi +; CHECK: ret +define <4 x i32> @test2(i32 %x) { + %res = insertelement <4 x i32>undef, i32 %x, i32 0 + ret <4 x i32>%res +} + +; CHECK-LABEL: @test3 +; CHECK: vmovqz %rdi +; CHECK: ret +define <2 x i64> @test3(i64 %x) { + %res = insertelement <2 x i64>undef, i64 %x, i32 0 + ret <2 x i64>%res +} + +; CHECK-LABEL: @test4 +; CHECK: vmovdz (%rdi) +; CHECK: ret +define <4 x i32> @test4(i32* %x) { + %y = load i32* %x + %res = insertelement <4 x i32>undef, i32 %y, i32 0 + ret <4 x i32>%res +} + +; CHECK-LABEL: @test5 +; CHECK: vmovssz %xmm0, (%rdi) +; CHECK: ret +define void @test5(float %x, float* %y) { + store float %x, float* %y, align 4 + ret void +} + +; CHECK-LABEL: @test6 +; CHECK: vmovsdz %xmm0, (%rdi) +; CHECK: ret +define void @test6(double %x, double* %y) { + store double %x, double* %y, align 8 + ret void +} + +; CHECK-LABEL: @test7 +; CHECK: vmovssz (%rdi), %xmm0 +; CHECK: ret +define float @test7(i32* %x) { + %y = load i32* %x + %res = bitcast i32 %y to float + ret float %res +} + +; CHECK-LABEL: @test8 +; CHECK: vmovdz %xmm0, %eax +; CHECK: ret +define i32 @test8(<4 x i32> %x) { + %res = extractelement <4 x i32> %x, i32 0 + ret i32 %res +} + +; CHECK-LABEL: @test9 +; CHECK: vmovqz %xmm0, %rax +; CHECK: ret +define i64 @test9(<2 x i64> %x) { + %res = extractelement <2 x i64> %x, i32 0 + ret i64 %res +} |