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| author | Tim Northover <tnorthover@apple.com> | 2013-09-22 08:21:56 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-09-22 08:21:56 +0000 |
| commit | 3e84ad28d4d3ceee25771b1e30315c20b7608c39 (patch) | |
| tree | 8c7736799f6055bce7c663d2865140c69015356e /test/CodeGen | |
| parent | 7d052f272d3f9ad0acdebf6811e29d529f70c1e1 (diff) | |
| download | external_llvm-3e84ad28d4d3ceee25771b1e30315c20b7608c39.zip external_llvm-3e84ad28d4d3ceee25771b1e30315c20b7608c39.tar.gz external_llvm-3e84ad28d4d3ceee25771b1e30315c20b7608c39.tar.bz2 | |
ISelDAG: spot chain cycles involving MachineNodes
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.
Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.
This should fix PR15840.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191165 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/i486-fence-loop.ll | 27 |
2 files changed, 28 insertions, 1 deletions
diff --git a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll b/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll index a883d79..cd8a16f 100644 --- a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll +++ b/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll @@ -15,7 +15,7 @@ entry: ; CHECK: lock ; CHECK-NEXT: orl {{.*}}, (%esp) -; CHECK-NEXT: cmpl $0 +; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]] if.then: ; preds = %entry tail call void bitcast (void (...)* @foo to void ()*)() nounwind diff --git a/test/CodeGen/X86/i486-fence-loop.ll b/test/CodeGen/X86/i486-fence-loop.ll new file mode 100644 index 0000000..d809619 --- /dev/null +++ b/test/CodeGen/X86/i486-fence-loop.ll @@ -0,0 +1,27 @@ +; RUN: llc -march=x86 -mcpu=i486 -o - %s | FileCheck %s + +; Main test here was that ISelDAG could cope with a MachineNode in the chain +; from the first load to the "X86ISD::SUB". Previously it thought that meant no +; cycle could be formed so it tried to use "sub (%eax), [[RHS]]". + +define void @gst_atomic_queue_push(i32* %addr) { +; CHECK-LABEL: gst_atomic_queue_push: +; CHECK: movl (%eax), [[LHS:%e[a-z]+]] +; CHECK: lock +; CHECK-NEXT: orl +; CHECK: movl (%eax), [[RHS:%e[a-z]+]] +; CHECK: cmpl [[LHS]], [[RHS]] + +entry: + br label %while.body + +while.body: + %0 = load volatile i32* %addr, align 4 + fence seq_cst + %1 = load volatile i32* %addr, align 4 + %cmp = icmp sgt i32 %1, %0 + br i1 %cmp, label %while.body, label %if.then + +if.then: + ret void +}
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