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| author | Chris Lattner <sabre@nondot.org> | 2008-04-27 00:37:18 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-04-27 00:37:18 +0000 |
| commit | 4486c2ee43064fb60afad606262474cb993dd188 (patch) | |
| tree | 4ea3e1952e67a7ec106e63b63ad6996a7f3d6ab6 /test/CodeGen | |
| parent | 786c4281ce5f801746cb649d5e0e502b5d0bbd97 (diff) | |
| download | external_llvm-4486c2ee43064fb60afad606262474cb993dd188.zip external_llvm-4486c2ee43064fb60afad606262474cb993dd188.tar.gz external_llvm-4486c2ee43064fb60afad606262474cb993dd188.tar.bz2 | |
Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible. This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:
void test () {
asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}
Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.
Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??
Incidentally, this was the todo in
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
Please do NOT pull this into Tak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll | 7 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll | 11 |
2 files changed, 14 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll index 8405703..656b831 100644 --- a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll +++ b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll @@ -1,15 +1,14 @@ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {foo r3, r4} -; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {bar r3, r} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {bari r3, 47} ; PR1351 -define i32 @test1(i32 %Y, i32 %X) { +define i32 @test1(i32 %Y, i32 %X) nounwind { %tmp1 = tail call i32 asm "foo${1:I} $0, $1", "=r,rI"( i32 %X ) ret i32 %tmp1 } -;; TODO: We'd actually prefer this to be 'bari r3, 47', but 'bar r3, rN' is also ok. -define i32 @test2(i32 %Y, i32 %X) { +define i32 @test2(i32 %Y, i32 %X) nounwind { %tmp1 = tail call i32 asm "bar${1:I} $0, $1", "=r,rI"( i32 47 ) ret i32 %tmp1 } diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll new file mode 100644 index 0000000..82721a5 --- /dev/null +++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc | grep {1 \$2 3} +; rdar://5720231 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" + +define void @test() nounwind { +entry: + tail call void asm sideeffect " ${0:c} $1 ${2:c} ", "imr,imr,i,~{dirflag},~{fpsr},~{flags}"( i32 1, i32 2, i32 3 ) nounwind + ret void +} + |