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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-04-06 23:57:33 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-04-06 23:57:33 +0000 |
commit | 53d4bcf35e7bc362e9340085264c2f4acd3c912b (patch) | |
tree | cf7bbcd228d9e6d8946bbda34ed8dd4df523fd1b /test/CodeGen | |
parent | 2b9355f2d9888d6a011353610b9ca24818de59a2 (diff) | |
download | external_llvm-53d4bcf35e7bc362e9340085264c2f4acd3c912b.zip external_llvm-53d4bcf35e7bc362e9340085264c2f4acd3c912b.tar.gz external_llvm-53d4bcf35e7bc362e9340085264c2f4acd3c912b.tar.bz2 |
Implement LowerReturn_64 for SPARC v9.
Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.
The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.
The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:
struct ifp {
int i;
float f;
};
struct ifp f(void);
LLVM IR:
define inreg { i32, float } @f() {
...
ret { i32, float } %retval
}
The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.
Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/SPARC/64abi.ll | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/test/CodeGen/SPARC/64abi.ll b/test/CodeGen/SPARC/64abi.ll index 5c1c27a..d447ec7 100644 --- a/test/CodeGen/SPARC/64abi.ll +++ b/test/CodeGen/SPARC/64abi.ll @@ -132,3 +132,87 @@ define i32 @inreg_ii(i32 inreg %a0, ; high bits of %i0 %rv = sub i32 %a1, %a0 ret i32 %rv } + +; Structs up to 32 bytes in size can be returned in registers. +; CHECK: ret_i64_pair +; CHECK: ldx [%i2], %i0 +; CHECK: ldx [%i3], %i1 +define { i64, i64 } @ret_i64_pair(i32 %a0, i32 %a1, i64* %p, i64* %q) { + %r1 = load i64* %p + %rv1 = insertvalue { i64, i64 } undef, i64 %r1, 0 + store i64 0, i64* %p + %r2 = load i64* %q + %rv2 = insertvalue { i64, i64 } %rv1, i64 %r2, 1 + ret { i64, i64 } %rv2 +} + +; This is not a C struct, each member uses 8 bytes. +; CHECK: ret_i32_float_pair +; CHECK: ld [%i2], %i0 +; CHECK: ld [%i3], %f3 +define { i32, float } @ret_i32_float_pair(i32 %a0, i32 %a1, + i32* %p, float* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, float } undef, i32 %r1, 0 + store i32 0, i32* %p + %r2 = load float* %q + %rv2 = insertvalue { i32, float } %rv1, float %r2, 1 + ret { i32, float } %rv2 +} + +; This is a C struct, each member uses 4 bytes. +; CHECK: ret_i32_float_packed +; CHECK: ld [%i2], [[R:%[gilo][0-7]]] +; CHECK: sllx [[R]], 32, %i0 +; CHECK: ld [%i3], %f1 +define inreg { i32, float } @ret_i32_float_packed(i32 %a0, i32 %a1, + i32* %p, float* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, float } undef, i32 %r1, 0 + store i32 0, i32* %p + %r2 = load float* %q + %rv2 = insertvalue { i32, float } %rv1, float %r2, 1 + ret { i32, float } %rv2 +} + +; The C frontend should use i64 to return { i32, i32 } structs, but verify that +; we don't miscompile thi case where both struct elements are placed in %i0. +; CHECK: ret_i32_packed +; CHECK: ld [%i2], [[R1:%[gilo][0-7]]] +; CHECK: ld [%i3], [[R2:%[gilo][0-7]]] +; CHECK: sllx [[R2]], 32, [[R3:%[gilo][0-7]]] +; CHECK: or [[R3]], [[R1]], %i0 +define inreg { i32, i32 } @ret_i32_packed(i32 %a0, i32 %a1, + i32* %p, i32* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, i32 } undef, i32 %r1, 1 + store i32 0, i32* %p + %r2 = load i32* %q + %rv2 = insertvalue { i32, i32 } %rv1, i32 %r2, 0 + ret { i32, i32 } %rv2 +} + +; The return value must be sign-extended to 64 bits. +; CHECK: ret_sext +; CHECK: sra %i0, 0, %i0 +define signext i32 @ret_sext(i32 %a0) { + ret i32 %a0 +} + +; CHECK: ret_zext +; CHECK: srl %i0, 0, %i0 +define zeroext i32 @ret_zext(i32 %a0) { + ret i32 %a0 +} + +; CHECK: ret_nosext +; CHECK-NOT: sra +define signext i32 @ret_nosext(i32 signext %a0) { + ret i32 %a0 +} + +; CHECK: ret_nozext +; CHECK-NOT: srl +define signext i32 @ret_nozext(i32 signext %a0) { + ret i32 %a0 +} |